Subversion Repositories QNX 8.QNX8 LLVM/Clang compiler suite

Rev

Blame | Last modification | View Log | Download | RSS feed

  1. //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. //
  9. // This file defines interfaces to access the target independent code generation
  10. // passes provided by the LLVM backend.
  11. //
  12. //===----------------------------------------------------------------------===//
  13.  
  14. #ifndef LLVM_CODEGEN_PASSES_H
  15. #define LLVM_CODEGEN_PASSES_H
  16.  
  17. #include "llvm/Support/CodeGen.h"
  18. #include "llvm/Support/Discriminator.h"
  19. #include "llvm/CodeGen/RegAllocCommon.h"
  20.  
  21. #include <functional>
  22. #include <string>
  23.  
  24. namespace llvm {
  25.  
  26. class FunctionPass;
  27. class MachineFunction;
  28. class MachineFunctionPass;
  29. class ModulePass;
  30. class Pass;
  31. class TargetMachine;
  32. class raw_ostream;
  33.  
  34. } // End llvm namespace
  35.  
  36. // List of target independent CodeGen pass IDs.
  37. namespace llvm {
  38.  
  39.   /// AtomicExpandPass - At IR level this pass replace atomic instructions with
  40.   /// __atomic_* library calls, or target specific instruction which implement the
  41.   /// same semantics in a way which better fits the target backend.
  42.   FunctionPass *createAtomicExpandPass();
  43.  
  44.   /// createUnreachableBlockEliminationPass - The LLVM code generator does not
  45.   /// work well with unreachable basic blocks (what live ranges make sense for a
  46.   /// block that cannot be reached?).  As such, a code generator should either
  47.   /// not instruction select unreachable blocks, or run this pass as its
  48.   /// last LLVM modifying pass to clean up blocks that are not reachable from
  49.   /// the entry block.
  50.   FunctionPass *createUnreachableBlockEliminationPass();
  51.  
  52.   /// createBasicBlockSections Pass - This pass assigns sections to machine
  53.   /// basic blocks and is enabled with -fbasic-block-sections.
  54.   MachineFunctionPass *createBasicBlockSectionsPass();
  55.  
  56.   /// createMachineFunctionSplitterPass - This pass splits machine functions
  57.   /// using profile information.
  58.   MachineFunctionPass *createMachineFunctionSplitterPass();
  59.  
  60.   /// MachineFunctionPrinter pass - This pass prints out the machine function to
  61.   /// the given stream as a debugging tool.
  62.   MachineFunctionPass *
  63.   createMachineFunctionPrinterPass(raw_ostream &OS,
  64.                                    const std::string &Banner ="");
  65.  
  66.   /// StackFramePrinter pass - This pass prints out the machine function's
  67.   /// stack frame to the given stream as a debugging tool.
  68.   MachineFunctionPass *createStackFrameLayoutAnalysisPass();
  69.  
  70.   /// MIRPrinting pass - this pass prints out the LLVM IR into the given stream
  71.   /// using the MIR serialization format.
  72.   MachineFunctionPass *createPrintMIRPass(raw_ostream &OS);
  73.  
  74.   /// This pass resets a MachineFunction when it has the FailedISel property
  75.   /// as if it was just created.
  76.   /// If EmitFallbackDiag is true, the pass will emit a
  77.   /// DiagnosticInfoISelFallback for every MachineFunction it resets.
  78.   /// If AbortOnFailedISel is true, abort compilation instead of resetting.
  79.   MachineFunctionPass *createResetMachineFunctionPass(bool EmitFallbackDiag,
  80.                                                       bool AbortOnFailedISel);
  81.  
  82.   /// createCodeGenPreparePass - Transform the code to expose more pattern
  83.   /// matching during instruction selection.
  84.   FunctionPass *createCodeGenPreparePass();
  85.  
  86.   /// This pass implements generation of target-specific intrinsics to support
  87.   /// handling of complex number arithmetic
  88.   FunctionPass *createComplexDeinterleavingPass(const TargetMachine *TM);
  89.  
  90.   /// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg
  91.   /// load-linked/store-conditional loops.
  92.   extern char &AtomicExpandID;
  93.  
  94.   /// MachineLoopInfo - This pass is a loop analysis pass.
  95.   extern char &MachineLoopInfoID;
  96.  
  97.   /// MachineDominators - This pass is a machine dominators analysis pass.
  98.   extern char &MachineDominatorsID;
  99.  
  100.   /// MachineDominanaceFrontier - This pass is a machine dominators analysis.
  101.   extern char &MachineDominanceFrontierID;
  102.  
  103.   /// MachineRegionInfo - This pass computes SESE regions for machine functions.
  104.   extern char &MachineRegionInfoPassID;
  105.  
  106.   /// EdgeBundles analysis - Bundle machine CFG edges.
  107.   extern char &EdgeBundlesID;
  108.  
  109.   /// LiveVariables pass - This pass computes the set of blocks in which each
  110.   /// variable is life and sets machine operand kill flags.
  111.   extern char &LiveVariablesID;
  112.  
  113.   /// PHIElimination - This pass eliminates machine instruction PHI nodes
  114.   /// by inserting copy instructions.  This destroys SSA information, but is the
  115.   /// desired input for some register allocators.  This pass is "required" by
  116.   /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
  117.   extern char &PHIEliminationID;
  118.  
  119.   /// LiveIntervals - This analysis keeps track of the live ranges of virtual
  120.   /// and physical registers.
  121.   extern char &LiveIntervalsID;
  122.  
  123.   /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
  124.   extern char &LiveStacksID;
  125.  
  126.   /// TwoAddressInstruction - This pass reduces two-address instructions to
  127.   /// use two operands. This destroys SSA information but it is desired by
  128.   /// register allocators.
  129.   extern char &TwoAddressInstructionPassID;
  130.  
  131.   /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
  132.   extern char &ProcessImplicitDefsID;
  133.  
  134.   /// RegisterCoalescer - This pass merges live ranges to eliminate copies.
  135.   extern char &RegisterCoalescerID;
  136.  
  137.   /// MachineScheduler - This pass schedules machine instructions.
  138.   extern char &MachineSchedulerID;
  139.  
  140.   /// PostMachineScheduler - This pass schedules machine instructions postRA.
  141.   extern char &PostMachineSchedulerID;
  142.  
  143.   /// SpillPlacement analysis. Suggest optimal placement of spill code between
  144.   /// basic blocks.
  145.   extern char &SpillPlacementID;
  146.  
  147.   /// ShrinkWrap pass. Look for the best place to insert save and restore
  148.   // instruction and update the MachineFunctionInfo with that information.
  149.   extern char &ShrinkWrapID;
  150.  
  151.   /// LiveRangeShrink pass. Move instruction close to its definition to shrink
  152.   /// the definition's live range.
  153.   extern char &LiveRangeShrinkID;
  154.  
  155.   /// Greedy register allocator.
  156.   extern char &RAGreedyID;
  157.  
  158.   /// Basic register allocator.
  159.   extern char &RABasicID;
  160.  
  161.   /// VirtRegRewriter pass. Rewrite virtual registers to physical registers as
  162.   /// assigned in VirtRegMap.
  163.   extern char &VirtRegRewriterID;
  164.   FunctionPass *createVirtRegRewriter(bool ClearVirtRegs = true);
  165.  
  166.   /// UnreachableMachineBlockElimination - This pass removes unreachable
  167.   /// machine basic blocks.
  168.   extern char &UnreachableMachineBlockElimID;
  169.  
  170.   /// DeadMachineInstructionElim - This pass removes dead machine instructions.
  171.   extern char &DeadMachineInstructionElimID;
  172.  
  173.   /// This pass adds dead/undef flags after analyzing subregister lanes.
  174.   extern char &DetectDeadLanesID;
  175.  
  176.   /// This pass perform post-ra machine sink for COPY instructions.
  177.   extern char &PostRAMachineSinkingID;
  178.  
  179.   /// This pass adds flow sensitive discriminators.
  180.   extern char &MIRAddFSDiscriminatorsID;
  181.  
  182.   /// This pass reads flow sensitive profile.
  183.   extern char &MIRProfileLoaderPassID;
  184.  
  185.   /// FastRegisterAllocation Pass - This pass register allocates as fast as
  186.   /// possible. It is best suited for debug code where live ranges are short.
  187.   ///
  188.   FunctionPass *createFastRegisterAllocator();
  189.   FunctionPass *createFastRegisterAllocator(RegClassFilterFunc F,
  190.                                             bool ClearVirtRegs);
  191.  
  192.   /// BasicRegisterAllocation Pass - This pass implements a degenerate global
  193.   /// register allocator using the basic regalloc framework.
  194.   ///
  195.   FunctionPass *createBasicRegisterAllocator();
  196.   FunctionPass *createBasicRegisterAllocator(RegClassFilterFunc F);
  197.  
  198.   /// Greedy register allocation pass - This pass implements a global register
  199.   /// allocator for optimized builds.
  200.   ///
  201.   FunctionPass *createGreedyRegisterAllocator();
  202.   FunctionPass *createGreedyRegisterAllocator(RegClassFilterFunc F);
  203.  
  204.   /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
  205.   /// Quadratic Prograaming (PBQP) based register allocator.
  206.   ///
  207.   FunctionPass *createDefaultPBQPRegisterAllocator();
  208.  
  209.   /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code,
  210.   /// and eliminates abstract frame references.
  211.   extern char &PrologEpilogCodeInserterID;
  212.   MachineFunctionPass *createPrologEpilogInserterPass();
  213.  
  214.   /// ExpandPostRAPseudos - This pass expands pseudo instructions after
  215.   /// register allocation.
  216.   extern char &ExpandPostRAPseudosID;
  217.  
  218.   /// PostRAHazardRecognizer - This pass runs the post-ra hazard
  219.   /// recognizer.
  220.   extern char &PostRAHazardRecognizerID;
  221.  
  222.   /// PostRAScheduler - This pass performs post register allocation
  223.   /// scheduling.
  224.   extern char &PostRASchedulerID;
  225.  
  226.   /// BranchFolding - This pass performs machine code CFG based
  227.   /// optimizations to delete branches to branches, eliminate branches to
  228.   /// successor blocks (creating fall throughs), and eliminating branches over
  229.   /// branches.
  230.   extern char &BranchFolderPassID;
  231.  
  232.   /// BranchRelaxation - This pass replaces branches that need to jump further
  233.   /// than is supported by a branch instruction.
  234.   extern char &BranchRelaxationPassID;
  235.  
  236.   /// MachineFunctionPrinterPass - This pass prints out MachineInstr's.
  237.   extern char &MachineFunctionPrinterPassID;
  238.  
  239.   /// MIRPrintingPass - this pass prints out the LLVM IR using the MIR
  240.   /// serialization format.
  241.   extern char &MIRPrintingPassID;
  242.  
  243.   /// TailDuplicate - Duplicate blocks with unconditional branches
  244.   /// into tails of their predecessors.
  245.   extern char &TailDuplicateID;
  246.  
  247.   /// Duplicate blocks with unconditional branches into tails of their
  248.   /// predecessors. Variant that works before register allocation.
  249.   extern char &EarlyTailDuplicateID;
  250.  
  251.   /// MachineTraceMetrics - This pass computes critical path and CPU resource
  252.   /// usage in an ensemble of traces.
  253.   extern char &MachineTraceMetricsID;
  254.  
  255.   /// EarlyIfConverter - This pass performs if-conversion on SSA form by
  256.   /// inserting cmov instructions.
  257.   extern char &EarlyIfConverterID;
  258.  
  259.   /// EarlyIfPredicator - This pass performs if-conversion on SSA form by
  260.   /// predicating if/else block and insert select at the join point.
  261.   extern char &EarlyIfPredicatorID;
  262.  
  263.   /// This pass performs instruction combining using trace metrics to estimate
  264.   /// critical-path and resource depth.
  265.   extern char &MachineCombinerID;
  266.  
  267.   /// StackSlotColoring - This pass performs stack coloring and merging.
  268.   /// It merges disjoint allocas to reduce the stack size.
  269.   extern char &StackColoringID;
  270.  
  271.   /// StackFramePrinter - This pass prints the stack frame layout and variable
  272.   /// mappings.
  273.   extern char &StackFrameLayoutAnalysisPassID;
  274.  
  275.   /// IfConverter - This pass performs machine code if conversion.
  276.   extern char &IfConverterID;
  277.  
  278.   FunctionPass *createIfConverter(
  279.       std::function<bool(const MachineFunction &)> Ftor);
  280.  
  281.   /// MachineBlockPlacement - This pass places basic blocks based on branch
  282.   /// probabilities.
  283.   extern char &MachineBlockPlacementID;
  284.  
  285.   /// MachineBlockPlacementStats - This pass collects statistics about the
  286.   /// basic block placement using branch probabilities and block frequency
  287.   /// information.
  288.   extern char &MachineBlockPlacementStatsID;
  289.  
  290.   /// GCLowering Pass - Used by gc.root to perform its default lowering
  291.   /// operations.
  292.   FunctionPass *createGCLoweringPass();
  293.  
  294.   /// GCLowering Pass - Used by gc.root to perform its default lowering
  295.   /// operations.
  296.   extern char &GCLoweringID;
  297.  
  298.   /// ShadowStackGCLowering - Implements the custom lowering mechanism
  299.   /// used by the shadow stack GC.  Only runs on functions which opt in to
  300.   /// the shadow stack collector.
  301.   FunctionPass *createShadowStackGCLoweringPass();
  302.  
  303.   /// ShadowStackGCLowering - Implements the custom lowering mechanism
  304.   /// used by the shadow stack GC.
  305.   extern char &ShadowStackGCLoweringID;
  306.  
  307.   /// GCMachineCodeAnalysis - Target-independent pass to mark safe points
  308.   /// in machine code. Must be added very late during code generation, just
  309.   /// prior to output, and importantly after all CFG transformations (such as
  310.   /// branch folding).
  311.   extern char &GCMachineCodeAnalysisID;
  312.  
  313.   /// Creates a pass to print GC metadata.
  314.   ///
  315.   FunctionPass *createGCInfoPrinter(raw_ostream &OS);
  316.  
  317.   /// MachineCSE - This pass performs global CSE on machine instructions.
  318.   extern char &MachineCSEID;
  319.  
  320.   /// MIRCanonicalizer - This pass canonicalizes MIR by renaming vregs
  321.   /// according to the semantics of the instruction as well as hoists
  322.   /// code.
  323.   extern char &MIRCanonicalizerID;
  324.  
  325.   /// ImplicitNullChecks - This pass folds null pointer checks into nearby
  326.   /// memory operations.
  327.   extern char &ImplicitNullChecksID;
  328.  
  329.   /// This pass performs loop invariant code motion on machine instructions.
  330.   extern char &MachineLICMID;
  331.  
  332.   /// This pass performs loop invariant code motion on machine instructions.
  333.   /// This variant works before register allocation. \see MachineLICMID.
  334.   extern char &EarlyMachineLICMID;
  335.  
  336.   /// MachineSinking - This pass performs sinking on machine instructions.
  337.   extern char &MachineSinkingID;
  338.  
  339.   /// MachineCopyPropagation - This pass performs copy propagation on
  340.   /// machine instructions.
  341.   extern char &MachineCopyPropagationID;
  342.  
  343.   MachineFunctionPass *createMachineCopyPropagationPass(bool UseCopyInstr);
  344.  
  345.   /// MachineLateInstrsCleanup - This pass removes redundant identical
  346.   /// instructions after register allocation and rematerialization.
  347.   extern char &MachineLateInstrsCleanupID;
  348.  
  349.   /// PeepholeOptimizer - This pass performs peephole optimizations -
  350.   /// like extension and comparison eliminations.
  351.   extern char &PeepholeOptimizerID;
  352.  
  353.   /// OptimizePHIs - This pass optimizes machine instruction PHIs
  354.   /// to take advantage of opportunities created during DAG legalization.
  355.   extern char &OptimizePHIsID;
  356.  
  357.   /// StackSlotColoring - This pass performs stack slot coloring.
  358.   extern char &StackSlotColoringID;
  359.  
  360.   /// This pass lays out funclets contiguously.
  361.   extern char &FuncletLayoutID;
  362.  
  363.   /// This pass inserts the XRay instrumentation sleds if they are supported by
  364.   /// the target platform.
  365.   extern char &XRayInstrumentationID;
  366.  
  367.   /// This pass inserts FEntry calls
  368.   extern char &FEntryInserterID;
  369.  
  370.   /// This pass implements the "patchable-function" attribute.
  371.   extern char &PatchableFunctionID;
  372.  
  373.   /// createStackProtectorPass - This pass adds stack protectors to functions.
  374.   ///
  375.   FunctionPass *createStackProtectorPass();
  376.  
  377.   /// createMachineVerifierPass - This pass verifies cenerated machine code
  378.   /// instructions for correctness.
  379.   ///
  380.   FunctionPass *createMachineVerifierPass(const std::string& Banner);
  381.  
  382.   /// createDwarfEHPass - This pass mulches exception handling code into a form
  383.   /// adapted to code generation.  Required if using dwarf exception handling.
  384.   FunctionPass *createDwarfEHPass(CodeGenOpt::Level OptLevel);
  385.  
  386.   /// createWinEHPass - Prepares personality functions used by MSVC on Windows,
  387.   /// in addition to the Itanium LSDA based personalities.
  388.   FunctionPass *createWinEHPass(bool DemoteCatchSwitchPHIOnly = false);
  389.  
  390.   /// createSjLjEHPreparePass - This pass adapts exception handling code to use
  391.   /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
  392.   ///
  393.   FunctionPass *createSjLjEHPreparePass(const TargetMachine *TM);
  394.  
  395.   /// createWasmEHPass - This pass adapts exception handling code to use
  396.   /// WebAssembly's exception handling scheme.
  397.   FunctionPass *createWasmEHPass();
  398.  
  399.   /// LocalStackSlotAllocation - This pass assigns local frame indices to stack
  400.   /// slots relative to one another and allocates base registers to access them
  401.   /// when it is estimated by the target to be out of range of normal frame
  402.   /// pointer or stack pointer index addressing.
  403.   extern char &LocalStackSlotAllocationID;
  404.  
  405.   /// This pass expands pseudo-instructions, reserves registers and adjusts
  406.   /// machine frame information.
  407.   extern char &FinalizeISelID;
  408.  
  409.   /// UnpackMachineBundles - This pass unpack machine instruction bundles.
  410.   extern char &UnpackMachineBundlesID;
  411.  
  412.   FunctionPass *
  413.   createUnpackMachineBundles(std::function<bool(const MachineFunction &)> Ftor);
  414.  
  415.   /// FinalizeMachineBundles - This pass finalize machine instruction
  416.   /// bundles (created earlier, e.g. during pre-RA scheduling).
  417.   extern char &FinalizeMachineBundlesID;
  418.  
  419.   /// StackMapLiveness - This pass analyses the register live-out set of
  420.   /// stackmap/patchpoint intrinsics and attaches the calculated information to
  421.   /// the intrinsic for later emission to the StackMap.
  422.   extern char &StackMapLivenessID;
  423.  
  424.   // MachineSanitizerBinaryMetadata - appends/finalizes sanitizer binary
  425.   // metadata after llvm SanitizerBinaryMetadata pass.
  426.   extern char &MachineSanitizerBinaryMetadataID;
  427.  
  428.   /// RemoveRedundantDebugValues pass.
  429.   extern char &RemoveRedundantDebugValuesID;
  430.  
  431.   /// MachineCFGPrinter pass.
  432.   extern char &MachineCFGPrinterID;
  433.  
  434.   /// LiveDebugValues pass
  435.   extern char &LiveDebugValuesID;
  436.  
  437.   /// createJumpInstrTables - This pass creates jump-instruction tables.
  438.   ModulePass *createJumpInstrTablesPass();
  439.  
  440.   /// InterleavedAccess Pass - This pass identifies and matches interleaved
  441.   /// memory accesses to target specific intrinsics.
  442.   ///
  443.   FunctionPass *createInterleavedAccessPass();
  444.  
  445.   /// InterleavedLoadCombines Pass - This pass identifies interleaved loads and
  446.   /// combines them into wide loads detectable by InterleavedAccessPass
  447.   ///
  448.   FunctionPass *createInterleavedLoadCombinePass();
  449.  
  450.   /// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all
  451.   /// TLS variables for the emulated TLS model.
  452.   ///
  453.   ModulePass *createLowerEmuTLSPass();
  454.  
  455.   /// This pass lowers the \@llvm.load.relative and \@llvm.objc.* intrinsics to
  456.   /// instructions.  This is unsafe to do earlier because a pass may combine the
  457.   /// constant initializer into the load, which may result in an overflowing
  458.   /// evaluation.
  459.   ModulePass *createPreISelIntrinsicLoweringPass();
  460.  
  461.   /// GlobalMerge - This pass merges internal (by default) globals into structs
  462.   /// to enable reuse of a base pointer by indexed addressing modes.
  463.   /// It can also be configured to focus on size optimizations only.
  464.   ///
  465.   Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset,
  466.                               bool OnlyOptimizeForSize = false,
  467.                               bool MergeExternalByDefault = false);
  468.  
  469.   /// This pass splits the stack into a safe stack and an unsafe stack to
  470.   /// protect against stack-based overflow vulnerabilities.
  471.   FunctionPass *createSafeStackPass();
  472.  
  473.   /// This pass detects subregister lanes in a virtual register that are used
  474.   /// independently of other lanes and splits them into separate virtual
  475.   /// registers.
  476.   extern char &RenameIndependentSubregsID;
  477.  
  478.   /// This pass is executed POST-RA to collect which physical registers are
  479.   /// preserved by given machine function.
  480.   FunctionPass *createRegUsageInfoCollector();
  481.  
  482.   /// Return a MachineFunction pass that identifies call sites
  483.   /// and propagates register usage information of callee to caller
  484.   /// if available with PysicalRegisterUsageInfo pass.
  485.   FunctionPass *createRegUsageInfoPropPass();
  486.  
  487.   /// This pass performs software pipelining on machine instructions.
  488.   extern char &MachinePipelinerID;
  489.  
  490.   /// This pass frees the memory occupied by the MachineFunction.
  491.   FunctionPass *createFreeMachineFunctionPass();
  492.  
  493.   /// This pass performs outlining on machine instructions directly before
  494.   /// printing assembly.
  495.   ModulePass *createMachineOutlinerPass(bool RunOnAllFunctions = true);
  496.  
  497.   /// This pass expands the experimental reduction intrinsics into sequences of
  498.   /// shuffles.
  499.   FunctionPass *createExpandReductionsPass();
  500.  
  501.   // This pass replaces intrinsics operating on vector operands with calls to
  502.   // the corresponding function in a vector library (e.g., SVML, libmvec).
  503.   FunctionPass *createReplaceWithVeclibLegacyPass();
  504.  
  505.   /// This pass expands the vector predication intrinsics into unpredicated
  506.   /// instructions with selects or just the explicit vector length into the
  507.   /// predicate mask.
  508.   FunctionPass *createExpandVectorPredicationPass();
  509.  
  510.   // Expands large div/rem instructions.
  511.   FunctionPass *createExpandLargeDivRemPass();
  512.  
  513.   // Expands large div/rem instructions.
  514.   FunctionPass *createExpandLargeFpConvertPass();
  515.  
  516.   // This pass expands memcmp() to load/stores.
  517.   FunctionPass *createExpandMemCmpPass();
  518.  
  519.   /// Creates Break False Dependencies pass. \see BreakFalseDeps.cpp
  520.   FunctionPass *createBreakFalseDeps();
  521.  
  522.   // This pass expands indirectbr instructions.
  523.   FunctionPass *createIndirectBrExpandPass();
  524.  
  525.   /// Creates CFI Fixup pass. \see CFIFixup.cpp
  526.   FunctionPass *createCFIFixup();
  527.  
  528.   /// Creates CFI Instruction Inserter pass. \see CFIInstrInserter.cpp
  529.   FunctionPass *createCFIInstrInserter();
  530.  
  531.   /// Creates CFGuard longjmp target identification pass.
  532.   /// \see CFGuardLongjmp.cpp
  533.   FunctionPass *createCFGuardLongjmpPass();
  534.  
  535.   /// Creates EHContGuard catchret target identification pass.
  536.   /// \see EHContGuardCatchret.cpp
  537.   FunctionPass *createEHContGuardCatchretPass();
  538.  
  539.   /// Create Hardware Loop pass. \see HardwareLoops.cpp
  540.   FunctionPass *createHardwareLoopsPass();
  541.  
  542.   /// This pass inserts pseudo probe annotation for callsite profiling.
  543.   FunctionPass *createPseudoProbeInserter();
  544.  
  545.   /// Create IR Type Promotion pass. \see TypePromotion.cpp
  546.   FunctionPass *createTypePromotionLegacyPass();
  547.  
  548.   /// Add Flow Sensitive Discriminators. PassNum specifies the
  549.   /// sequence number of this pass (starting from 1).
  550.   FunctionPass *
  551.   createMIRAddFSDiscriminatorsPass(sampleprof::FSDiscriminatorPass P);
  552.  
  553.   /// Read Flow Sensitive Profile.
  554.   FunctionPass *createMIRProfileLoaderPass(std::string File,
  555.                                            std::string RemappingFile,
  556.                                            sampleprof::FSDiscriminatorPass P);
  557.  
  558.   /// Creates MIR Debugify pass. \see MachineDebugify.cpp
  559.   ModulePass *createDebugifyMachineModulePass();
  560.  
  561.   /// Creates MIR Strip Debug pass. \see MachineStripDebug.cpp
  562.   /// If OnlyDebugified is true then it will only strip debug info if it was
  563.   /// added by a Debugify pass. The module will be left unchanged if the debug
  564.   /// info was generated by another source such as clang.
  565.   ModulePass *createStripDebugMachineModulePass(bool OnlyDebugified);
  566.  
  567.   /// Creates MIR Check Debug pass. \see MachineCheckDebugify.cpp
  568.   ModulePass *createCheckDebugMachineModulePass();
  569.  
  570.   /// The pass fixups statepoint machine instruction to replace usage of
  571.   /// caller saved registers with stack slots.
  572.   extern char &FixupStatepointCallerSavedID;
  573.  
  574.   /// The pass transforms load/store <256 x i32> to AMX load/store intrinsics
  575.   /// or split the data to two <128 x i32>.
  576.   FunctionPass *createX86LowerAMXTypePass();
  577.  
  578.   /// The pass insert tile config intrinsics for AMX fast register allocation.
  579.   FunctionPass *createX86PreAMXConfigPass();
  580.  
  581.   /// The pass transforms amx intrinsics to scalar operation if the function has
  582.   /// optnone attribute or it is O0.
  583.   FunctionPass *createX86LowerAMXIntrinsicsPass();
  584.  
  585.   /// When learning an eviction policy, extract score(reward) information,
  586.   /// otherwise this does nothing
  587.   FunctionPass *createRegAllocScoringPass();
  588.  
  589.   /// JMC instrument pass.
  590.   ModulePass *createJMCInstrumenterPass();
  591.  
  592.   /// This pass converts conditional moves to conditional jumps when profitable.
  593.   FunctionPass *createSelectOptimizePass();
  594. } // End llvm namespace
  595.  
  596. #endif
  597.