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  1. //===- MachineSSAContext.h --------------------------------------*- C++ -*-===//
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. /// \file
  9. ///
  10. /// This file declares a specialization of the GenericSSAContext<X>
  11. /// template class for Machine IR.
  12. ///
  13. //===----------------------------------------------------------------------===//
  14.  
  15. #ifndef LLVM_CODEGEN_MACHINESSACONTEXT_H
  16. #define LLVM_CODEGEN_MACHINESSACONTEXT_H
  17.  
  18. #include "llvm/CodeGen/MachineBasicBlock.h"
  19. #include "llvm/Support/Printable.h"
  20.  
  21. namespace llvm {
  22. class MachineRegisterInfo;
  23. class MachineInstr;
  24. class MachineFunction;
  25. class Register;
  26. template <typename _FunctionT> class GenericSSAContext;
  27. template <typename, bool> class DominatorTreeBase;
  28.  
  29. inline auto successors(const MachineBasicBlock *BB) { return BB->successors(); }
  30. inline auto predecessors(const MachineBasicBlock *BB) {
  31.   return BB->predecessors();
  32. }
  33. inline unsigned succ_size(const MachineBasicBlock *BB) {
  34.   return BB->succ_size();
  35. }
  36. inline unsigned pred_size(const MachineBasicBlock *BB) {
  37.   return BB->pred_size();
  38. }
  39. inline auto instrs(const MachineBasicBlock &BB) { return BB.instrs(); }
  40.  
  41. template <> class GenericSSAContext<MachineFunction> {
  42.   const MachineRegisterInfo *RegInfo = nullptr;
  43.   MachineFunction *MF;
  44.  
  45. public:
  46.   using BlockT = MachineBasicBlock;
  47.   using FunctionT = MachineFunction;
  48.   using InstructionT = MachineInstr;
  49.   using ValueRefT = Register;
  50.   using ConstValueRefT = Register;
  51.   static const Register ValueRefNull;
  52.   using DominatorTreeT = DominatorTreeBase<BlockT, false>;
  53.  
  54.   void setFunction(MachineFunction &Fn);
  55.   MachineFunction *getFunction() const { return MF; }
  56.  
  57.   static MachineBasicBlock *getEntryBlock(MachineFunction &F);
  58.   static void appendBlockDefs(SmallVectorImpl<Register> &defs,
  59.                               const MachineBasicBlock &block);
  60.   static void appendBlockTerms(SmallVectorImpl<MachineInstr *> &terms,
  61.                                MachineBasicBlock &block);
  62.   static void appendBlockTerms(SmallVectorImpl<const MachineInstr *> &terms,
  63.                                const MachineBasicBlock &block);
  64.   MachineBasicBlock *getDefBlock(Register) const;
  65.   static bool isConstantValuePhi(const MachineInstr &Phi);
  66.  
  67.   Printable print(const MachineBasicBlock *Block) const;
  68.   Printable print(const MachineInstr *Inst) const;
  69.   Printable print(Register Value) const;
  70. };
  71.  
  72. using MachineSSAContext = GenericSSAContext<MachineFunction>;
  73. } // namespace llvm
  74.  
  75. #endif // LLVM_CODEGEN_MACHINESSACONTEXT_H
  76.