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14 | pmbaty | 1 | /*===--------- avx512vlbf16intrin.h - AVX512_BF16 intrinsics ---------------=== |
2 | * |
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3 | * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
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4 | * See https://llvm.org/LICENSE.txt for license information. |
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5 | * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
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6 | * |
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7 | *===-----------------------------------------------------------------------=== |
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8 | */ |
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9 | #ifndef __IMMINTRIN_H |
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10 | #error "Never use <avx512vlbf16intrin.h> directly; include <immintrin.h> instead." |
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11 | #endif |
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12 | |||
13 | #ifdef __SSE2__ |
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14 | |||
15 | #ifndef __AVX512VLBF16INTRIN_H |
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16 | #define __AVX512VLBF16INTRIN_H |
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17 | |||
18 | #define __DEFAULT_FN_ATTRS128 \ |
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19 | __attribute__((__always_inline__, __nodebug__, \ |
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20 | __target__("avx512vl, avx512bf16"), __min_vector_width__(128))) |
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21 | #define __DEFAULT_FN_ATTRS256 \ |
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22 | __attribute__((__always_inline__, __nodebug__, \ |
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23 | __target__("avx512vl, avx512bf16"), __min_vector_width__(256))) |
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24 | |||
25 | /// Convert Two Packed Single Data to One Packed BF16 Data. |
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26 | /// |
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27 | /// \headerfile <x86intrin.h> |
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28 | /// |
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29 | /// This intrinsic corresponds to the <c> VCVTNE2PS2BF16 </c> instructions. |
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30 | /// |
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31 | /// \param __A |
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32 | /// A 128-bit vector of [4 x float]. |
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33 | /// \param __B |
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34 | /// A 128-bit vector of [4 x float]. |
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35 | /// \returns A 128-bit vector of [8 x bfloat] whose lower 64 bits come from |
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36 | /// conversion of __B, and higher 64 bits come from conversion of __A. |
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37 | static __inline__ __m128bh __DEFAULT_FN_ATTRS128 |
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38 | _mm_cvtne2ps_pbh(__m128 __A, __m128 __B) { |
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39 | return (__m128bh)__builtin_ia32_cvtne2ps2bf16_128((__v4sf) __A, |
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40 | (__v4sf) __B); |
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41 | } |
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42 | |||
43 | /// Convert Two Packed Single Data to One Packed BF16 Data. |
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44 | /// |
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45 | /// \headerfile <x86intrin.h> |
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46 | /// |
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47 | /// This intrinsic corresponds to the <c> VCVTNE2PS2BF16 </c> instructions. |
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48 | /// |
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49 | /// \param __A |
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50 | /// A 128-bit vector of [4 x float]. |
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51 | /// \param __B |
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52 | /// A 128-bit vector of [4 x float]. |
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53 | /// \param __W |
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54 | /// A 128-bit vector of [8 x bfloat]. |
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55 | /// \param __U |
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56 | /// A 8-bit mask value specifying what is chosen for each element. |
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57 | /// A 1 means conversion of __A or __B. A 0 means element from __W. |
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58 | /// \returns A 128-bit vector of [8 x bfloat] whose lower 64 bits come from |
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59 | /// conversion of __B, and higher 64 bits come from conversion of __A. |
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60 | static __inline__ __m128bh __DEFAULT_FN_ATTRS128 |
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61 | _mm_mask_cvtne2ps_pbh(__m128bh __W, __mmask8 __U, __m128 __A, __m128 __B) { |
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62 | return (__m128bh)__builtin_ia32_selectpbf_128((__mmask8)__U, |
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63 | (__v8bf)_mm_cvtne2ps_pbh(__A, __B), |
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64 | (__v8bf)__W); |
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65 | } |
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66 | |||
67 | /// Convert Two Packed Single Data to One Packed BF16 Data. |
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68 | /// |
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69 | /// \headerfile <x86intrin.h> |
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70 | /// |
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71 | /// This intrinsic corresponds to the <c> VCVTNE2PS2BF16 </c> instructions. |
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72 | /// |
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73 | /// \param __A |
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74 | /// A 128-bit vector of [4 x float]. |
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75 | /// \param __B |
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76 | /// A 128-bit vector of [4 x float]. |
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77 | /// \param __U |
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78 | /// A 8-bit mask value specifying what is chosen for each element. |
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79 | /// A 1 means conversion of __A or __B. A 0 means element is zero. |
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80 | /// \returns A 128-bit vector of [8 x bfloat] whose lower 64 bits come from |
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81 | /// conversion of __B, and higher 64 bits come from conversion of __A. |
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82 | static __inline__ __m128bh __DEFAULT_FN_ATTRS128 |
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83 | _mm_maskz_cvtne2ps_pbh(__mmask8 __U, __m128 __A, __m128 __B) { |
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84 | return (__m128bh)__builtin_ia32_selectpbf_128((__mmask8)__U, |
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85 | (__v8bf)_mm_cvtne2ps_pbh(__A, __B), |
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86 | (__v8bf)_mm_setzero_si128()); |
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87 | } |
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88 | |||
89 | /// Convert Two Packed Single Data to One Packed BF16 Data. |
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90 | /// |
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91 | /// \headerfile <x86intrin.h> |
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92 | /// |
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93 | /// This intrinsic corresponds to the <c> VCVTNE2PS2BF16 </c> instructions. |
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94 | /// |
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95 | /// \param __A |
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96 | /// A 256-bit vector of [8 x float]. |
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97 | /// \param __B |
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98 | /// A 256-bit vector of [8 x float]. |
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99 | /// \returns A 256-bit vector of [16 x bfloat] whose lower 128 bits come from |
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100 | /// conversion of __B, and higher 128 bits come from conversion of __A. |
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101 | static __inline__ __m256bh __DEFAULT_FN_ATTRS256 |
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102 | _mm256_cvtne2ps_pbh(__m256 __A, __m256 __B) { |
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103 | return (__m256bh)__builtin_ia32_cvtne2ps2bf16_256((__v8sf) __A, |
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104 | (__v8sf) __B); |
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105 | } |
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106 | |||
107 | /// Convert Two Packed Single Data to One Packed BF16 Data. |
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108 | /// |
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109 | /// \headerfile <x86intrin.h> |
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110 | /// |
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111 | /// This intrinsic corresponds to the <c> VCVTNE2PS2BF16 </c> instructions. |
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112 | /// |
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113 | /// \param __A |
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114 | /// A 256-bit vector of [8 x float]. |
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115 | /// \param __B |
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116 | /// A 256-bit vector of [8 x float]. |
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117 | /// \param __W |
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118 | /// A 256-bit vector of [16 x bfloat]. |
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119 | /// \param __U |
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120 | /// A 16-bit mask value specifying what is chosen for each element. |
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121 | /// A 1 means conversion of __A or __B. A 0 means element from __W. |
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122 | /// \returns A 256-bit vector of [16 x bfloat] whose lower 128 bits come from |
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123 | /// conversion of __B, and higher 128 bits come from conversion of __A. |
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124 | static __inline__ __m256bh __DEFAULT_FN_ATTRS256 |
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125 | _mm256_mask_cvtne2ps_pbh(__m256bh __W, __mmask16 __U, __m256 __A, __m256 __B) { |
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126 | return (__m256bh)__builtin_ia32_selectpbf_256((__mmask16)__U, |
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127 | (__v16bf)_mm256_cvtne2ps_pbh(__A, __B), |
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128 | (__v16bf)__W); |
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129 | } |
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130 | |||
131 | /// Convert Two Packed Single Data to One Packed BF16 Data. |
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132 | /// |
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133 | /// \headerfile <x86intrin.h> |
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134 | /// |
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135 | /// This intrinsic corresponds to the <c> VCVTNE2PS2BF16 </c> instructions. |
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136 | /// |
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137 | /// \param __A |
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138 | /// A 256-bit vector of [8 x float]. |
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139 | /// \param __B |
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140 | /// A 256-bit vector of [8 x float]. |
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141 | /// \param __U |
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142 | /// A 16-bit mask value specifying what is chosen for each element. |
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143 | /// A 1 means conversion of __A or __B. A 0 means element is zero. |
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144 | /// \returns A 256-bit vector of [16 x bfloat] whose lower 128 bits come from |
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145 | /// conversion of __B, and higher 128 bits come from conversion of __A. |
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146 | static __inline__ __m256bh __DEFAULT_FN_ATTRS256 |
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147 | _mm256_maskz_cvtne2ps_pbh(__mmask16 __U, __m256 __A, __m256 __B) { |
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148 | return (__m256bh)__builtin_ia32_selectpbf_256((__mmask16)__U, |
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149 | (__v16bf)_mm256_cvtne2ps_pbh(__A, __B), |
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150 | (__v16bf)_mm256_setzero_si256()); |
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151 | } |
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152 | |||
153 | /// Convert Packed Single Data to Packed BF16 Data. |
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154 | /// |
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155 | /// \headerfile <x86intrin.h> |
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156 | /// |
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157 | /// This intrinsic corresponds to the <c> VCVTNEPS2BF16 </c> instructions. |
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158 | /// |
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159 | /// \param __A |
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160 | /// A 128-bit vector of [4 x float]. |
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161 | /// \returns A 128-bit vector of [8 x bfloat] whose lower 64 bits come from |
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162 | /// conversion of __A, and higher 64 bits are 0. |
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163 | #define _mm_cvtneps_pbh(A) \ |
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164 | ((__m128bh)__builtin_ia32_vcvtneps2bf16128((__v4sf)(A))) |
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165 | |||
166 | /// Convert Packed Single Data to Packed BF16 Data. |
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167 | /// |
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168 | /// \headerfile <x86intrin.h> |
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169 | /// |
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170 | /// This intrinsic corresponds to the <c> VCVTNEPS2BF16 </c> instructions. |
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171 | /// |
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172 | /// \param __A |
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173 | /// A 128-bit vector of [4 x float]. |
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174 | /// \param __W |
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175 | /// A 128-bit vector of [8 x bfloat]. |
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176 | /// \param __U |
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177 | /// A 4-bit mask value specifying what is chosen for each element. |
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178 | /// A 1 means conversion of __A. A 0 means element from __W. |
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179 | /// \returns A 128-bit vector of [8 x bfloat] whose lower 64 bits come from |
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180 | /// conversion of __A, and higher 64 bits are 0. |
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181 | static __inline__ __m128bh __DEFAULT_FN_ATTRS128 |
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182 | _mm_mask_cvtneps_pbh(__m128bh __W, __mmask8 __U, __m128 __A) { |
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183 | return (__m128bh)__builtin_ia32_cvtneps2bf16_128_mask((__v4sf) __A, |
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184 | (__v8bf)__W, |
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185 | (__mmask8)__U); |
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186 | } |
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187 | |||
188 | /// Convert Packed Single Data to Packed BF16 Data. |
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189 | /// |
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190 | /// \headerfile <x86intrin.h> |
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191 | /// |
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192 | /// This intrinsic corresponds to the <c> VCVTNEPS2BF16 </c> instructions. |
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193 | /// |
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194 | /// \param __A |
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195 | /// A 128-bit vector of [4 x float]. |
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196 | /// \param __U |
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197 | /// A 4-bit mask value specifying what is chosen for each element. |
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198 | /// A 1 means conversion of __A. A 0 means element is zero. |
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199 | /// \returns A 128-bit vector of [8 x bfloat] whose lower 64 bits come from |
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200 | /// conversion of __A, and higher 64 bits are 0. |
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201 | static __inline__ __m128bh __DEFAULT_FN_ATTRS128 |
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202 | _mm_maskz_cvtneps_pbh(__mmask8 __U, __m128 __A) { |
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203 | return (__m128bh)__builtin_ia32_cvtneps2bf16_128_mask((__v4sf) __A, |
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204 | (__v8bf)_mm_setzero_si128(), |
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205 | (__mmask8)__U); |
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206 | } |
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207 | |||
208 | /// Convert Packed Single Data to Packed BF16 Data. |
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209 | /// |
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210 | /// \headerfile <x86intrin.h> |
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211 | /// |
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212 | /// This intrinsic corresponds to the <c> VCVTNEPS2BF16 </c> instructions. |
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213 | /// |
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214 | /// \param __A |
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215 | /// A 256-bit vector of [8 x float]. |
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216 | /// \returns A 128-bit vector of [8 x bfloat] comes from conversion of __A. |
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217 | #define _mm256_cvtneps_pbh(A) \ |
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218 | ((__m128bh)__builtin_ia32_vcvtneps2bf16256((__v8sf)(A))) |
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219 | |||
220 | /// Convert Packed Single Data to Packed BF16 Data. |
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221 | /// |
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222 | /// \headerfile <x86intrin.h> |
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223 | /// |
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224 | /// This intrinsic corresponds to the <c> VCVTNEPS2BF16 </c> instructions. |
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225 | /// |
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226 | /// \param __A |
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227 | /// A 256-bit vector of [8 x float]. |
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228 | /// \param __W |
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229 | /// A 256-bit vector of [8 x bfloat]. |
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230 | /// \param __U |
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231 | /// A 8-bit mask value specifying what is chosen for each element. |
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232 | /// A 1 means conversion of __A. A 0 means element from __W. |
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233 | /// \returns A 128-bit vector of [8 x bfloat] comes from conversion of __A. |
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234 | static __inline__ __m128bh __DEFAULT_FN_ATTRS256 |
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235 | _mm256_mask_cvtneps_pbh(__m128bh __W, __mmask8 __U, __m256 __A) { |
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236 | return (__m128bh)__builtin_ia32_cvtneps2bf16_256_mask((__v8sf)__A, |
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237 | (__v8bf)__W, |
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238 | (__mmask8)__U); |
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239 | } |
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240 | |||
241 | /// Convert Packed Single Data to Packed BF16 Data. |
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242 | /// |
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243 | /// \headerfile <x86intrin.h> |
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244 | /// |
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245 | /// This intrinsic corresponds to the <c> VCVTNEPS2BF16 </c> instructions. |
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246 | /// |
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247 | /// \param __A |
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248 | /// A 256-bit vector of [8 x float]. |
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249 | /// \param __U |
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250 | /// A 8-bit mask value specifying what is chosen for each element. |
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251 | /// A 1 means conversion of __A. A 0 means element is zero. |
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252 | /// \returns A 128-bit vector of [8 x bfloat] comes from conversion of __A. |
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253 | static __inline__ __m128bh __DEFAULT_FN_ATTRS256 |
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254 | _mm256_maskz_cvtneps_pbh(__mmask8 __U, __m256 __A) { |
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255 | return (__m128bh)__builtin_ia32_cvtneps2bf16_256_mask((__v8sf)__A, |
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256 | (__v8bf)_mm_setzero_si128(), |
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257 | (__mmask8)__U); |
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258 | } |
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259 | |||
260 | /// Dot Product of BF16 Pairs Accumulated into Packed Single Precision. |
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261 | /// |
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262 | /// \headerfile <x86intrin.h> |
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263 | /// |
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264 | /// This intrinsic corresponds to the <c> VDPBF16PS </c> instructions. |
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265 | /// |
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266 | /// \param __A |
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267 | /// A 128-bit vector of [8 x bfloat]. |
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268 | /// \param __B |
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269 | /// A 128-bit vector of [8 x bfloat]. |
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270 | /// \param __D |
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271 | /// A 128-bit vector of [4 x float]. |
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272 | /// \returns A 128-bit vector of [4 x float] comes from Dot Product of |
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273 | /// __A, __B and __D |
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274 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 |
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275 | _mm_dpbf16_ps(__m128 __D, __m128bh __A, __m128bh __B) { |
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276 | return (__m128)__builtin_ia32_dpbf16ps_128((__v4sf)__D, |
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277 | (__v8bf)__A, |
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278 | (__v8bf)__B); |
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279 | } |
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280 | |||
281 | /// Dot Product of BF16 Pairs Accumulated into Packed Single Precision. |
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282 | /// |
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283 | /// \headerfile <x86intrin.h> |
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284 | /// |
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285 | /// This intrinsic corresponds to the <c> VDPBF16PS </c> instructions. |
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286 | /// |
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287 | /// \param __A |
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288 | /// A 128-bit vector of [8 x bfloat]. |
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289 | /// \param __B |
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290 | /// A 128-bit vector of [8 x bfloat]. |
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291 | /// \param __D |
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292 | /// A 128-bit vector of [4 x float]. |
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293 | /// \param __U |
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294 | /// A 8-bit mask value specifying what is chosen for each element. |
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295 | /// A 1 means __A and __B's dot product accumulated with __D. A 0 means __D. |
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296 | /// \returns A 128-bit vector of [4 x float] comes from Dot Product of |
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297 | /// __A, __B and __D |
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298 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 |
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299 | _mm_mask_dpbf16_ps(__m128 __D, __mmask8 __U, __m128bh __A, __m128bh __B) { |
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300 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
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301 | (__v4sf)_mm_dpbf16_ps(__D, __A, __B), |
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302 | (__v4sf)__D); |
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303 | } |
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304 | |||
305 | /// Dot Product of BF16 Pairs Accumulated into Packed Single Precision. |
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306 | /// |
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307 | /// \headerfile <x86intrin.h> |
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308 | /// |
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309 | /// This intrinsic corresponds to the <c> VDPBF16PS </c> instructions. |
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310 | /// |
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311 | /// \param __A |
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312 | /// A 128-bit vector of [8 x bfloat]. |
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313 | /// \param __B |
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314 | /// A 128-bit vector of [8 x bfloat]. |
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315 | /// \param __D |
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316 | /// A 128-bit vector of [4 x float]. |
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317 | /// \param __U |
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318 | /// A 8-bit mask value specifying what is chosen for each element. |
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319 | /// A 1 means __A and __B's dot product accumulated with __D. A 0 means 0. |
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320 | /// \returns A 128-bit vector of [4 x float] comes from Dot Product of |
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321 | /// __A, __B and __D |
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322 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 |
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323 | _mm_maskz_dpbf16_ps(__mmask8 __U, __m128 __D, __m128bh __A, __m128bh __B) { |
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324 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
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325 | (__v4sf)_mm_dpbf16_ps(__D, __A, __B), |
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326 | (__v4sf)_mm_setzero_si128()); |
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327 | } |
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328 | |||
329 | /// Dot Product of BF16 Pairs Accumulated into Packed Single Precision. |
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330 | /// |
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331 | /// \headerfile <x86intrin.h> |
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332 | /// |
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333 | /// This intrinsic corresponds to the <c> VDPBF16PS </c> instructions. |
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334 | /// |
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335 | /// \param __A |
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336 | /// A 256-bit vector of [16 x bfloat]. |
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337 | /// \param __B |
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338 | /// A 256-bit vector of [16 x bfloat]. |
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339 | /// \param __D |
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340 | /// A 256-bit vector of [8 x float]. |
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341 | /// \returns A 256-bit vector of [8 x float] comes from Dot Product of |
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342 | /// __A, __B and __D |
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343 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 |
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344 | _mm256_dpbf16_ps(__m256 __D, __m256bh __A, __m256bh __B) { |
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345 | return (__m256)__builtin_ia32_dpbf16ps_256((__v8sf)__D, |
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346 | (__v16bf)__A, |
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347 | (__v16bf)__B); |
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348 | } |
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349 | |||
350 | /// Dot Product of BF16 Pairs Accumulated into Packed Single Precision. |
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351 | /// |
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352 | /// \headerfile <x86intrin.h> |
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353 | /// |
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354 | /// This intrinsic corresponds to the <c> VDPBF16PS </c> instructions. |
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355 | /// |
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356 | /// \param __A |
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357 | /// A 256-bit vector of [16 x bfloat]. |
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358 | /// \param __B |
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359 | /// A 256-bit vector of [16 x bfloat]. |
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360 | /// \param __D |
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361 | /// A 256-bit vector of [8 x float]. |
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362 | /// \param __U |
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363 | /// A 16-bit mask value specifying what is chosen for each element. |
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364 | /// A 1 means __A and __B's dot product accumulated with __D. A 0 means __D. |
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365 | /// \returns A 256-bit vector of [8 x float] comes from Dot Product of |
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366 | /// __A, __B and __D |
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367 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 |
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368 | _mm256_mask_dpbf16_ps(__m256 __D, __mmask8 __U, __m256bh __A, __m256bh __B) { |
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369 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
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370 | (__v8sf)_mm256_dpbf16_ps(__D, __A, __B), |
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371 | (__v8sf)__D); |
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372 | } |
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373 | |||
374 | /// Dot Product of BF16 Pairs Accumulated into Packed Single Precision. |
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375 | /// |
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376 | /// \headerfile <x86intrin.h> |
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377 | /// |
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378 | /// This intrinsic corresponds to the <c> VDPBF16PS </c> instructions. |
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379 | /// |
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380 | /// \param __A |
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381 | /// A 256-bit vector of [16 x bfloat]. |
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382 | /// \param __B |
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383 | /// A 256-bit vector of [16 x bfloat]. |
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384 | /// \param __D |
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385 | /// A 256-bit vector of [8 x float]. |
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386 | /// \param __U |
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387 | /// A 8-bit mask value specifying what is chosen for each element. |
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388 | /// A 1 means __A and __B's dot product accumulated with __D. A 0 means 0. |
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389 | /// \returns A 256-bit vector of [8 x float] comes from Dot Product of |
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390 | /// __A, __B and __D |
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391 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 |
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392 | _mm256_maskz_dpbf16_ps(__mmask8 __U, __m256 __D, __m256bh __A, __m256bh __B) { |
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393 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
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394 | (__v8sf)_mm256_dpbf16_ps(__D, __A, __B), |
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395 | (__v8sf)_mm256_setzero_si256()); |
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396 | } |
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397 | |||
398 | /// Convert One Single float Data to One BF16 Data. |
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399 | /// |
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400 | /// \headerfile <x86intrin.h> |
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401 | /// |
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402 | /// This intrinsic corresponds to the <c> VCVTNEPS2BF16 </c> instructions. |
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403 | /// |
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404 | /// \param __A |
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405 | /// A float data. |
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406 | /// \returns A bf16 data whose sign field and exponent field keep unchanged, |
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407 | /// and fraction field is truncated to 7 bits. |
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408 | static __inline__ __bf16 __DEFAULT_FN_ATTRS128 _mm_cvtness_sbh(float __A) { |
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409 | __v4sf __V = {__A, 0, 0, 0}; |
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410 | __v8bf __R = __builtin_ia32_cvtneps2bf16_128_mask( |
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411 | (__v4sf)__V, (__v8bf)_mm_undefined_si128(), (__mmask8)-1); |
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412 | return (__bf16)__R[0]; |
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413 | } |
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414 | |||
415 | /// Convert Packed BF16 Data to Packed float Data. |
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416 | /// |
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417 | /// \headerfile <x86intrin.h> |
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418 | /// |
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419 | /// \param __A |
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420 | /// A 128-bit vector of [4 x bfloat]. |
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421 | /// \returns A 128-bit vector of [4 x float] come from conversion of __A |
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422 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_cvtpbh_ps(__m128bh __A) { |
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423 | return _mm_castsi128_ps( |
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424 | (__m128i)_mm_slli_epi32((__m128i)_mm_cvtepi16_epi32((__m128i)__A), 16)); |
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425 | } |
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426 | |||
427 | /// Convert Packed BF16 Data to Packed float Data. |
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428 | /// |
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429 | /// \headerfile <x86intrin.h> |
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430 | /// |
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431 | /// \param __A |
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432 | /// A 128-bit vector of [8 x bfloat]. |
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433 | /// \returns A 256-bit vector of [8 x float] come from conversion of __A |
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434 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_cvtpbh_ps(__m128bh __A) { |
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435 | return _mm256_castsi256_ps((__m256i)_mm256_slli_epi32( |
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436 | (__m256i)_mm256_cvtepi16_epi32((__m128i)__A), 16)); |
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437 | } |
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438 | |||
439 | /// Convert Packed BF16 Data to Packed float Data using zeroing mask. |
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440 | /// |
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441 | /// \headerfile <x86intrin.h> |
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442 | /// |
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443 | /// \param __U |
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444 | /// A 4-bit mask. Elements are zeroed out when the corresponding mask |
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445 | /// bit is not set. |
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446 | /// \param __A |
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447 | /// A 128-bit vector of [4 x bfloat]. |
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448 | /// \returns A 128-bit vector of [4 x float] come from conversion of __A |
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449 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 |
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450 | _mm_maskz_cvtpbh_ps(__mmask8 __U, __m128bh __A) { |
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451 | return _mm_castsi128_ps((__m128i)_mm_slli_epi32( |
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452 | (__m128i)_mm_maskz_cvtepi16_epi32((__mmask8)__U, (__m128i)__A), 16)); |
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453 | } |
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454 | |||
455 | /// Convert Packed BF16 Data to Packed float Data using zeroing mask. |
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456 | /// |
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457 | /// \headerfile <x86intrin.h> |
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458 | /// |
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459 | /// \param __U |
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460 | /// A 8-bit mask. Elements are zeroed out when the corresponding mask |
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461 | /// bit is not set. |
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462 | /// \param __A |
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463 | /// A 128-bit vector of [8 x bfloat]. |
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464 | /// \returns A 256-bit vector of [8 x float] come from conversion of __A |
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465 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 |
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466 | _mm256_maskz_cvtpbh_ps(__mmask8 __U, __m128bh __A) { |
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467 | return _mm256_castsi256_ps((__m256i)_mm256_slli_epi32( |
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468 | (__m256i)_mm256_maskz_cvtepi16_epi32((__mmask8)__U, (__m128i)__A), 16)); |
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469 | } |
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470 | |||
471 | /// Convert Packed BF16 Data to Packed float Data using merging mask. |
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472 | /// |
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473 | /// \headerfile <x86intrin.h> |
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474 | /// |
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475 | /// \param __S |
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476 | /// A 128-bit vector of [4 x float]. Elements are copied from __S when |
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477 | /// the corresponding mask bit is not set. |
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478 | /// \param __U |
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479 | /// A 4-bit mask. Elements are zeroed out when the corresponding mask |
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480 | /// bit is not set. |
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481 | /// \param __A |
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482 | /// A 128-bit vector of [4 x bfloat]. |
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483 | /// \returns A 128-bit vector of [4 x float] come from conversion of __A |
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484 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 |
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485 | _mm_mask_cvtpbh_ps(__m128 __S, __mmask8 __U, __m128bh __A) { |
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486 | return _mm_castsi128_ps((__m128i)_mm_mask_slli_epi32( |
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487 | (__m128i)__S, (__mmask8)__U, (__m128i)_mm_cvtepi16_epi32((__m128i)__A), |
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488 | 16)); |
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489 | } |
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490 | |||
491 | /// Convert Packed BF16 Data to Packed float Data using merging mask. |
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492 | /// |
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493 | /// \headerfile <x86intrin.h> |
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494 | /// |
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495 | /// \param __S |
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496 | /// A 256-bit vector of [8 x float]. Elements are copied from __S when |
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497 | /// the corresponding mask bit is not set. |
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498 | /// \param __U |
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499 | /// A 8-bit mask. Elements are zeroed out when the corresponding mask |
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500 | /// bit is not set. |
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501 | /// \param __A |
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502 | /// A 128-bit vector of [8 x bfloat]. |
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503 | /// \returns A 256-bit vector of [8 x float] come from conversion of __A |
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504 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 |
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505 | _mm256_mask_cvtpbh_ps(__m256 __S, __mmask8 __U, __m128bh __A) { |
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506 | return _mm256_castsi256_ps((__m256i)_mm256_mask_slli_epi32( |
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507 | (__m256i)__S, (__mmask8)__U, (__m256i)_mm256_cvtepi16_epi32((__m128i)__A), |
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508 | 16)); |
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509 | } |
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510 | |||
511 | #undef __DEFAULT_FN_ATTRS128 |
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512 | #undef __DEFAULT_FN_ATTRS256 |
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513 | |||
514 | #endif |
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515 | #endif |