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| Rev | Author | Line No. | Line |
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| 14 | pmbaty | 1 | //===- RegisterPressure.h - Dynamic Register Pressure -----------*- C++ -*-===// |
| 2 | // |
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| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
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| 4 | // See https://llvm.org/LICENSE.txt for license information. |
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| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
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| 6 | // |
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| 7 | //===----------------------------------------------------------------------===// |
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| 8 | // |
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| 9 | // This file defines the RegisterPressure class which can be used to track |
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| 10 | // MachineInstr level register pressure. |
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| 11 | // |
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| 12 | //===----------------------------------------------------------------------===// |
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| 13 | |||
| 14 | #ifndef LLVM_CODEGEN_REGISTERPRESSURE_H |
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| 15 | #define LLVM_CODEGEN_REGISTERPRESSURE_H |
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| 16 | |||
| 17 | #include "llvm/ADT/ArrayRef.h" |
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| 18 | #include "llvm/ADT/SmallVector.h" |
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| 19 | #include "llvm/ADT/SparseSet.h" |
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| 20 | #include "llvm/CodeGen/MachineBasicBlock.h" |
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| 21 | #include "llvm/CodeGen/SlotIndexes.h" |
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| 22 | #include "llvm/CodeGen/TargetRegisterInfo.h" |
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| 23 | #include "llvm/MC/LaneBitmask.h" |
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| 24 | #include <cassert> |
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| 25 | #include <cstdint> |
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| 26 | #include <cstdlib> |
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| 27 | #include <limits> |
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| 28 | #include <vector> |
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| 29 | |||
| 30 | namespace llvm { |
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| 31 | |||
| 32 | class LiveIntervals; |
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| 33 | class MachineFunction; |
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| 34 | class MachineInstr; |
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| 35 | class MachineRegisterInfo; |
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| 36 | class RegisterClassInfo; |
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| 37 | |||
| 38 | struct RegisterMaskPair { |
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| 39 | Register RegUnit; ///< Virtual register or register unit. |
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| 40 | LaneBitmask LaneMask; |
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| 41 | |||
| 42 | RegisterMaskPair(Register RegUnit, LaneBitmask LaneMask) |
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| 43 | : RegUnit(RegUnit), LaneMask(LaneMask) {} |
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| 44 | }; |
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| 45 | |||
| 46 | /// Base class for register pressure results. |
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| 47 | struct RegisterPressure { |
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| 48 | /// Map of max reg pressure indexed by pressure set ID, not class ID. |
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| 49 | std::vector<unsigned> MaxSetPressure; |
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| 50 | |||
| 51 | /// List of live in virtual registers or physical register units. |
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| 52 | SmallVector<RegisterMaskPair,8> LiveInRegs; |
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| 53 | SmallVector<RegisterMaskPair,8> LiveOutRegs; |
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| 54 | |||
| 55 | void dump(const TargetRegisterInfo *TRI) const; |
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| 56 | }; |
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| 57 | |||
| 58 | /// RegisterPressure computed within a region of instructions delimited by |
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| 59 | /// TopIdx and BottomIdx. During pressure computation, the maximum pressure per |
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| 60 | /// register pressure set is increased. Once pressure within a region is fully |
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| 61 | /// computed, the live-in and live-out sets are recorded. |
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| 62 | /// |
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| 63 | /// This is preferable to RegionPressure when LiveIntervals are available, |
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| 64 | /// because delimiting regions by SlotIndex is more robust and convenient than |
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| 65 | /// holding block iterators. The block contents can change without invalidating |
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| 66 | /// the pressure result. |
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| 67 | struct IntervalPressure : RegisterPressure { |
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| 68 | /// Record the boundary of the region being tracked. |
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| 69 | SlotIndex TopIdx; |
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| 70 | SlotIndex BottomIdx; |
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| 71 | |||
| 72 | void reset(); |
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| 73 | |||
| 74 | void openTop(SlotIndex NextTop); |
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| 75 | |||
| 76 | void openBottom(SlotIndex PrevBottom); |
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| 77 | }; |
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| 78 | |||
| 79 | /// RegisterPressure computed within a region of instructions delimited by |
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| 80 | /// TopPos and BottomPos. This is a less precise version of IntervalPressure for |
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| 81 | /// use when LiveIntervals are unavailable. |
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| 82 | struct RegionPressure : RegisterPressure { |
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| 83 | /// Record the boundary of the region being tracked. |
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| 84 | MachineBasicBlock::const_iterator TopPos; |
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| 85 | MachineBasicBlock::const_iterator BottomPos; |
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| 86 | |||
| 87 | void reset(); |
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| 88 | |||
| 89 | void openTop(MachineBasicBlock::const_iterator PrevTop); |
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| 90 | |||
| 91 | void openBottom(MachineBasicBlock::const_iterator PrevBottom); |
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| 92 | }; |
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| 93 | |||
| 94 | /// Capture a change in pressure for a single pressure set. UnitInc may be |
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| 95 | /// expressed in terms of upward or downward pressure depending on the client |
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| 96 | /// and will be dynamically adjusted for current liveness. |
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| 97 | /// |
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| 98 | /// Pressure increments are tiny, typically 1-2 units, and this is only for |
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| 99 | /// heuristics, so we don't check UnitInc overflow. Instead, we may have a |
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| 100 | /// higher level assert that pressure is consistent within a region. We also |
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| 101 | /// effectively ignore dead defs which don't affect heuristics much. |
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| 102 | class PressureChange { |
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| 103 | uint16_t PSetID = 0; // ID+1. 0=Invalid. |
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| 104 | int16_t UnitInc = 0; |
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| 105 | |||
| 106 | public: |
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| 107 | PressureChange() = default; |
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| 108 | PressureChange(unsigned id): PSetID(id + 1) { |
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| 109 | assert(id < std::numeric_limits<uint16_t>::max() && "PSetID overflow."); |
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| 110 | } |
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| 111 | |||
| 112 | bool isValid() const { return PSetID > 0; } |
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| 113 | |||
| 114 | unsigned getPSet() const { |
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| 115 | assert(isValid() && "invalid PressureChange"); |
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| 116 | return PSetID - 1; |
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| 117 | } |
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| 118 | |||
| 119 | // If PSetID is invalid, return UINT16_MAX to give it lowest priority. |
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| 120 | unsigned getPSetOrMax() const { |
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| 121 | return (PSetID - 1) & std::numeric_limits<uint16_t>::max(); |
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| 122 | } |
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| 123 | |||
| 124 | int getUnitInc() const { return UnitInc; } |
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| 125 | |||
| 126 | void setUnitInc(int Inc) { UnitInc = Inc; } |
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| 127 | |||
| 128 | bool operator==(const PressureChange &RHS) const { |
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| 129 | return PSetID == RHS.PSetID && UnitInc == RHS.UnitInc; |
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| 130 | } |
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| 131 | |||
| 132 | void dump() const; |
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| 133 | }; |
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| 134 | |||
| 135 | /// List of PressureChanges in order of increasing, unique PSetID. |
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| 136 | /// |
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| 137 | /// Use a small fixed number, because we can fit more PressureChanges in an |
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| 138 | /// empty SmallVector than ever need to be tracked per register class. If more |
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| 139 | /// PSets are affected, then we only track the most constrained. |
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| 140 | class PressureDiff { |
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| 141 | // The initial design was for MaxPSets=4, but that requires PSet partitions, |
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| 142 | // which are not yet implemented. (PSet partitions are equivalent PSets given |
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| 143 | // the register classes actually in use within the scheduling region.) |
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| 144 | enum { MaxPSets = 16 }; |
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| 145 | |||
| 146 | PressureChange PressureChanges[MaxPSets]; |
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| 147 | |||
| 148 | using iterator = PressureChange *; |
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| 149 | |||
| 150 | iterator nonconst_begin() { return &PressureChanges[0]; } |
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| 151 | iterator nonconst_end() { return &PressureChanges[MaxPSets]; } |
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| 152 | |||
| 153 | public: |
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| 154 | using const_iterator = const PressureChange *; |
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| 155 | |||
| 156 | const_iterator begin() const { return &PressureChanges[0]; } |
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| 157 | const_iterator end() const { return &PressureChanges[MaxPSets]; } |
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| 158 | |||
| 159 | void addPressureChange(Register RegUnit, bool IsDec, |
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| 160 | const MachineRegisterInfo *MRI); |
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| 161 | |||
| 162 | void dump(const TargetRegisterInfo &TRI) const; |
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| 163 | }; |
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| 164 | |||
| 165 | /// List of registers defined and used by a machine instruction. |
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| 166 | class RegisterOperands { |
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| 167 | public: |
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| 168 | /// List of virtual registers and register units read by the instruction. |
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| 169 | SmallVector<RegisterMaskPair, 8> Uses; |
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| 170 | /// List of virtual registers and register units defined by the |
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| 171 | /// instruction which are not dead. |
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| 172 | SmallVector<RegisterMaskPair, 8> Defs; |
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| 173 | /// List of virtual registers and register units defined by the |
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| 174 | /// instruction but dead. |
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| 175 | SmallVector<RegisterMaskPair, 8> DeadDefs; |
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| 176 | |||
| 177 | /// Analyze the given instruction \p MI and fill in the Uses, Defs and |
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| 178 | /// DeadDefs list based on the MachineOperand flags. |
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| 179 | void collect(const MachineInstr &MI, const TargetRegisterInfo &TRI, |
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| 180 | const MachineRegisterInfo &MRI, bool TrackLaneMasks, |
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| 181 | bool IgnoreDead); |
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| 182 | |||
| 183 | /// Use liveness information to find dead defs not marked with a dead flag |
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| 184 | /// and move them to the DeadDefs vector. |
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| 185 | void detectDeadDefs(const MachineInstr &MI, const LiveIntervals &LIS); |
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| 186 | |||
| 187 | /// Use liveness information to find out which uses/defs are partially |
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| 188 | /// undefined/dead and adjust the RegisterMaskPairs accordingly. |
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| 189 | /// If \p AddFlagsMI is given then missing read-undef and dead flags will be |
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| 190 | /// added to the instruction. |
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| 191 | void adjustLaneLiveness(const LiveIntervals &LIS, |
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| 192 | const MachineRegisterInfo &MRI, SlotIndex Pos, |
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| 193 | MachineInstr *AddFlagsMI = nullptr); |
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| 194 | }; |
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| 195 | |||
| 196 | /// Array of PressureDiffs. |
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| 197 | class PressureDiffs { |
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| 198 | PressureDiff *PDiffArray = nullptr; |
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| 199 | unsigned Size = 0; |
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| 200 | unsigned Max = 0; |
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| 201 | |||
| 202 | public: |
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| 203 | PressureDiffs() = default; |
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| 204 | ~PressureDiffs() { free(PDiffArray); } |
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| 205 | |||
| 206 | void clear() { Size = 0; } |
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| 207 | |||
| 208 | void init(unsigned N); |
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| 209 | |||
| 210 | PressureDiff &operator[](unsigned Idx) { |
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| 211 | assert(Idx < Size && "PressureDiff index out of bounds"); |
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| 212 | return PDiffArray[Idx]; |
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| 213 | } |
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| 214 | const PressureDiff &operator[](unsigned Idx) const { |
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| 215 | return const_cast<PressureDiffs*>(this)->operator[](Idx); |
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| 216 | } |
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| 217 | |||
| 218 | /// Record pressure difference induced by the given operand list to |
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| 219 | /// node with index \p Idx. |
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| 220 | void addInstruction(unsigned Idx, const RegisterOperands &RegOpers, |
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| 221 | const MachineRegisterInfo &MRI); |
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| 222 | }; |
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| 223 | |||
| 224 | /// Store the effects of a change in pressure on things that MI scheduler cares |
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| 225 | /// about. |
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| 226 | /// |
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| 227 | /// Excess records the value of the largest difference in register units beyond |
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| 228 | /// the target's pressure limits across the affected pressure sets, where |
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| 229 | /// largest is defined as the absolute value of the difference. Negative |
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| 230 | /// ExcessUnits indicates a reduction in pressure that had already exceeded the |
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| 231 | /// target's limits. |
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| 232 | /// |
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| 233 | /// CriticalMax records the largest increase in the tracker's max pressure that |
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| 234 | /// exceeds the critical limit for some pressure set determined by the client. |
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| 235 | /// |
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| 236 | /// CurrentMax records the largest increase in the tracker's max pressure that |
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| 237 | /// exceeds the current limit for some pressure set determined by the client. |
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| 238 | struct RegPressureDelta { |
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| 239 | PressureChange Excess; |
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| 240 | PressureChange CriticalMax; |
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| 241 | PressureChange CurrentMax; |
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| 242 | |||
| 243 | RegPressureDelta() = default; |
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| 244 | |||
| 245 | bool operator==(const RegPressureDelta &RHS) const { |
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| 246 | return Excess == RHS.Excess && CriticalMax == RHS.CriticalMax |
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| 247 | && CurrentMax == RHS.CurrentMax; |
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| 248 | } |
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| 249 | bool operator!=(const RegPressureDelta &RHS) const { |
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| 250 | return !operator==(RHS); |
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| 251 | } |
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| 252 | void dump() const; |
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| 253 | }; |
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| 254 | |||
| 255 | /// A set of live virtual registers and physical register units. |
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| 256 | /// |
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| 257 | /// This is a wrapper around a SparseSet which deals with mapping register unit |
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| 258 | /// and virtual register indexes to an index usable by the sparse set. |
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| 259 | class LiveRegSet { |
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| 260 | private: |
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| 261 | struct IndexMaskPair { |
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| 262 | unsigned Index; |
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| 263 | LaneBitmask LaneMask; |
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| 264 | |||
| 265 | IndexMaskPair(unsigned Index, LaneBitmask LaneMask) |
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| 266 | : Index(Index), LaneMask(LaneMask) {} |
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| 267 | |||
| 268 | unsigned getSparseSetIndex() const { |
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| 269 | return Index; |
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| 270 | } |
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| 271 | }; |
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| 272 | |||
| 273 | using RegSet = SparseSet<IndexMaskPair>; |
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| 274 | RegSet Regs; |
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| 275 | unsigned NumRegUnits; |
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| 276 | |||
| 277 | unsigned getSparseIndexFromReg(Register Reg) const { |
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| 278 | if (Reg.isVirtual()) |
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| 279 | return Register::virtReg2Index(Reg) + NumRegUnits; |
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| 280 | assert(Reg < NumRegUnits); |
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| 281 | return Reg; |
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| 282 | } |
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| 283 | |||
| 284 | Register getRegFromSparseIndex(unsigned SparseIndex) const { |
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| 285 | if (SparseIndex >= NumRegUnits) |
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| 286 | return Register::index2VirtReg(SparseIndex - NumRegUnits); |
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| 287 | return Register(SparseIndex); |
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| 288 | } |
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| 289 | |||
| 290 | public: |
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| 291 | void clear(); |
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| 292 | void init(const MachineRegisterInfo &MRI); |
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| 293 | |||
| 294 | LaneBitmask contains(Register Reg) const { |
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| 295 | unsigned SparseIndex = getSparseIndexFromReg(Reg); |
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| 296 | RegSet::const_iterator I = Regs.find(SparseIndex); |
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| 297 | if (I == Regs.end()) |
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| 298 | return LaneBitmask::getNone(); |
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| 299 | return I->LaneMask; |
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| 300 | } |
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| 301 | |||
| 302 | /// Mark the \p Pair.LaneMask lanes of \p Pair.Reg as live. |
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| 303 | /// Returns the previously live lanes of \p Pair.Reg. |
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| 304 | LaneBitmask insert(RegisterMaskPair Pair) { |
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| 305 | unsigned SparseIndex = getSparseIndexFromReg(Pair.RegUnit); |
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| 306 | auto InsertRes = Regs.insert(IndexMaskPair(SparseIndex, Pair.LaneMask)); |
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| 307 | if (!InsertRes.second) { |
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| 308 | LaneBitmask PrevMask = InsertRes.first->LaneMask; |
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| 309 | InsertRes.first->LaneMask |= Pair.LaneMask; |
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| 310 | return PrevMask; |
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| 311 | } |
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| 312 | return LaneBitmask::getNone(); |
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| 313 | } |
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| 314 | |||
| 315 | /// Clears the \p Pair.LaneMask lanes of \p Pair.Reg (mark them as dead). |
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| 316 | /// Returns the previously live lanes of \p Pair.Reg. |
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| 317 | LaneBitmask erase(RegisterMaskPair Pair) { |
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| 318 | unsigned SparseIndex = getSparseIndexFromReg(Pair.RegUnit); |
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| 319 | RegSet::iterator I = Regs.find(SparseIndex); |
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| 320 | if (I == Regs.end()) |
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| 321 | return LaneBitmask::getNone(); |
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| 322 | LaneBitmask PrevMask = I->LaneMask; |
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| 323 | I->LaneMask &= ~Pair.LaneMask; |
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| 324 | return PrevMask; |
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| 325 | } |
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| 326 | |||
| 327 | size_t size() const { |
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| 328 | return Regs.size(); |
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| 329 | } |
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| 330 | |||
| 331 | template<typename ContainerT> |
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| 332 | void appendTo(ContainerT &To) const { |
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| 333 | for (const IndexMaskPair &P : Regs) { |
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| 334 | Register Reg = getRegFromSparseIndex(P.Index); |
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| 335 | if (P.LaneMask.any()) |
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| 336 | To.push_back(RegisterMaskPair(Reg, P.LaneMask)); |
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| 337 | } |
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| 338 | } |
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| 339 | }; |
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| 340 | |||
| 341 | /// Track the current register pressure at some position in the instruction |
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| 342 | /// stream, and remember the high water mark within the region traversed. This |
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| 343 | /// does not automatically consider live-through ranges. The client may |
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| 344 | /// independently adjust for global liveness. |
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| 345 | /// |
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| 346 | /// Each RegPressureTracker only works within a MachineBasicBlock. Pressure can |
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| 347 | /// be tracked across a larger region by storing a RegisterPressure result at |
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| 348 | /// each block boundary and explicitly adjusting pressure to account for block |
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| 349 | /// live-in and live-out register sets. |
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| 350 | /// |
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| 351 | /// RegPressureTracker holds a reference to a RegisterPressure result that it |
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| 352 | /// computes incrementally. During downward tracking, P.BottomIdx or P.BottomPos |
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| 353 | /// is invalid until it reaches the end of the block or closeRegion() is |
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| 354 | /// explicitly called. Similarly, P.TopIdx is invalid during upward |
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| 355 | /// tracking. Changing direction has the side effect of closing region, and |
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| 356 | /// traversing past TopIdx or BottomIdx reopens it. |
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| 357 | class RegPressureTracker { |
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| 358 | const MachineFunction *MF = nullptr; |
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| 359 | const TargetRegisterInfo *TRI = nullptr; |
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| 360 | const RegisterClassInfo *RCI = nullptr; |
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| 361 | const MachineRegisterInfo *MRI; |
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| 362 | const LiveIntervals *LIS = nullptr; |
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| 363 | |||
| 364 | /// We currently only allow pressure tracking within a block. |
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| 365 | const MachineBasicBlock *MBB = nullptr; |
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| 366 | |||
| 367 | /// Track the max pressure within the region traversed so far. |
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| 368 | RegisterPressure &P; |
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| 369 | |||
| 370 | /// Run in two modes dependending on whether constructed with IntervalPressure |
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| 371 | /// or RegisterPressure. If requireIntervals is false, LIS are ignored. |
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| 372 | bool RequireIntervals; |
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| 373 | |||
| 374 | /// True if UntiedDefs will be populated. |
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| 375 | bool TrackUntiedDefs = false; |
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| 376 | |||
| 377 | /// True if lanemasks should be tracked. |
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| 378 | bool TrackLaneMasks = false; |
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| 379 | |||
| 380 | /// Register pressure corresponds to liveness before this instruction |
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| 381 | /// iterator. It may point to the end of the block or a DebugValue rather than |
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| 382 | /// an instruction. |
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| 383 | MachineBasicBlock::const_iterator CurrPos; |
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| 384 | |||
| 385 | /// Pressure map indexed by pressure set ID, not class ID. |
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| 386 | std::vector<unsigned> CurrSetPressure; |
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| 387 | |||
| 388 | /// Set of live registers. |
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| 389 | LiveRegSet LiveRegs; |
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| 390 | |||
| 391 | /// Set of vreg defs that start a live range. |
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| 392 | SparseSet<Register, VirtReg2IndexFunctor> UntiedDefs; |
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| 393 | /// Live-through pressure. |
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| 394 | std::vector<unsigned> LiveThruPressure; |
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| 395 | |||
| 396 | public: |
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| 397 | RegPressureTracker(IntervalPressure &rp) : P(rp), RequireIntervals(true) {} |
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| 398 | RegPressureTracker(RegionPressure &rp) : P(rp), RequireIntervals(false) {} |
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| 399 | |||
| 400 | void reset(); |
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| 401 | |||
| 402 | void init(const MachineFunction *mf, const RegisterClassInfo *rci, |
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| 403 | const LiveIntervals *lis, const MachineBasicBlock *mbb, |
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| 404 | MachineBasicBlock::const_iterator pos, |
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| 405 | bool TrackLaneMasks, bool TrackUntiedDefs); |
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| 406 | |||
| 407 | /// Force liveness of virtual registers or physical register |
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| 408 | /// units. Particularly useful to initialize the livein/out state of the |
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| 409 | /// tracker before the first call to advance/recede. |
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| 410 | void addLiveRegs(ArrayRef<RegisterMaskPair> Regs); |
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| 411 | |||
| 412 | /// Get the MI position corresponding to this register pressure. |
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| 413 | MachineBasicBlock::const_iterator getPos() const { return CurrPos; } |
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| 414 | |||
| 415 | // Reset the MI position corresponding to the register pressure. This allows |
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| 416 | // schedulers to move instructions above the RegPressureTracker's |
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| 417 | // CurrPos. Since the pressure is computed before CurrPos, the iterator |
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| 418 | // position changes while pressure does not. |
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| 419 | void setPos(MachineBasicBlock::const_iterator Pos) { CurrPos = Pos; } |
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| 420 | |||
| 421 | /// Recede across the previous instruction. |
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| 422 | void recede(SmallVectorImpl<RegisterMaskPair> *LiveUses = nullptr); |
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| 423 | |||
| 424 | /// Recede across the previous instruction. |
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| 425 | /// This "low-level" variant assumes that recedeSkipDebugValues() was |
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| 426 | /// called previously and takes precomputed RegisterOperands for the |
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| 427 | /// instruction. |
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| 428 | void recede(const RegisterOperands &RegOpers, |
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| 429 | SmallVectorImpl<RegisterMaskPair> *LiveUses = nullptr); |
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| 430 | |||
| 431 | /// Recede until we find an instruction which is not a DebugValue. |
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| 432 | void recedeSkipDebugValues(); |
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| 433 | |||
| 434 | /// Advance across the current instruction. |
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| 435 | void advance(); |
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| 436 | |||
| 437 | /// Advance across the current instruction. |
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| 438 | /// This is a "low-level" variant of advance() which takes precomputed |
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| 439 | /// RegisterOperands of the instruction. |
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| 440 | void advance(const RegisterOperands &RegOpers); |
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| 441 | |||
| 442 | /// Finalize the region boundaries and recored live ins and live outs. |
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| 443 | void closeRegion(); |
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| 444 | |||
| 445 | /// Initialize the LiveThru pressure set based on the untied defs found in |
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| 446 | /// RPTracker. |
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| 447 | void initLiveThru(const RegPressureTracker &RPTracker); |
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| 448 | |||
| 449 | /// Copy an existing live thru pressure result. |
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| 450 | void initLiveThru(ArrayRef<unsigned> PressureSet) { |
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| 451 | LiveThruPressure.assign(PressureSet.begin(), PressureSet.end()); |
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| 452 | } |
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| 453 | |||
| 454 | ArrayRef<unsigned> getLiveThru() const { return LiveThruPressure; } |
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| 455 | |||
| 456 | /// Get the resulting register pressure over the traversed region. |
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| 457 | /// This result is complete if closeRegion() was explicitly invoked. |
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| 458 | RegisterPressure &getPressure() { return P; } |
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| 459 | const RegisterPressure &getPressure() const { return P; } |
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| 460 | |||
| 461 | /// Get the register set pressure at the current position, which may be less |
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| 462 | /// than the pressure across the traversed region. |
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| 463 | const std::vector<unsigned> &getRegSetPressureAtPos() const { |
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| 464 | return CurrSetPressure; |
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| 465 | } |
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| 466 | |||
| 467 | bool isTopClosed() const; |
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| 468 | bool isBottomClosed() const; |
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| 469 | |||
| 470 | void closeTop(); |
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| 471 | void closeBottom(); |
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| 472 | |||
| 473 | /// Consider the pressure increase caused by traversing this instruction |
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| 474 | /// bottom-up. Find the pressure set with the most change beyond its pressure |
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| 475 | /// limit based on the tracker's current pressure, and record the number of |
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| 476 | /// excess register units of that pressure set introduced by this instruction. |
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| 477 | void getMaxUpwardPressureDelta(const MachineInstr *MI, |
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| 478 | PressureDiff *PDiff, |
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| 479 | RegPressureDelta &Delta, |
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| 480 | ArrayRef<PressureChange> CriticalPSets, |
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| 481 | ArrayRef<unsigned> MaxPressureLimit); |
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| 482 | |||
| 483 | void getUpwardPressureDelta(const MachineInstr *MI, |
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| 484 | /*const*/ PressureDiff &PDiff, |
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| 485 | RegPressureDelta &Delta, |
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| 486 | ArrayRef<PressureChange> CriticalPSets, |
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| 487 | ArrayRef<unsigned> MaxPressureLimit) const; |
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| 488 | |||
| 489 | /// Consider the pressure increase caused by traversing this instruction |
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| 490 | /// top-down. Find the pressure set with the most change beyond its pressure |
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| 491 | /// limit based on the tracker's current pressure, and record the number of |
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| 492 | /// excess register units of that pressure set introduced by this instruction. |
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| 493 | void getMaxDownwardPressureDelta(const MachineInstr *MI, |
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| 494 | RegPressureDelta &Delta, |
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| 495 | ArrayRef<PressureChange> CriticalPSets, |
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| 496 | ArrayRef<unsigned> MaxPressureLimit); |
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| 497 | |||
| 498 | /// Find the pressure set with the most change beyond its pressure limit after |
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| 499 | /// traversing this instruction either upward or downward depending on the |
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| 500 | /// closed end of the current region. |
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| 501 | void getMaxPressureDelta(const MachineInstr *MI, |
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| 502 | RegPressureDelta &Delta, |
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| 503 | ArrayRef<PressureChange> CriticalPSets, |
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| 504 | ArrayRef<unsigned> MaxPressureLimit) { |
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| 505 | if (isTopClosed()) |
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| 506 | return getMaxDownwardPressureDelta(MI, Delta, CriticalPSets, |
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| 507 | MaxPressureLimit); |
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| 508 | |||
| 509 | assert(isBottomClosed() && "Uninitialized pressure tracker"); |
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| 510 | return getMaxUpwardPressureDelta(MI, nullptr, Delta, CriticalPSets, |
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| 511 | MaxPressureLimit); |
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| 512 | } |
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| 513 | |||
| 514 | /// Get the pressure of each PSet after traversing this instruction bottom-up. |
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| 515 | void getUpwardPressure(const MachineInstr *MI, |
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| 516 | std::vector<unsigned> &PressureResult, |
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| 517 | std::vector<unsigned> &MaxPressureResult); |
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| 518 | |||
| 519 | /// Get the pressure of each PSet after traversing this instruction top-down. |
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| 520 | void getDownwardPressure(const MachineInstr *MI, |
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| 521 | std::vector<unsigned> &PressureResult, |
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| 522 | std::vector<unsigned> &MaxPressureResult); |
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| 523 | |||
| 524 | void getPressureAfterInst(const MachineInstr *MI, |
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| 525 | std::vector<unsigned> &PressureResult, |
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| 526 | std::vector<unsigned> &MaxPressureResult) { |
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| 527 | if (isTopClosed()) |
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| 528 | return getUpwardPressure(MI, PressureResult, MaxPressureResult); |
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| 529 | |||
| 530 | assert(isBottomClosed() && "Uninitialized pressure tracker"); |
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| 531 | return getDownwardPressure(MI, PressureResult, MaxPressureResult); |
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| 532 | } |
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| 533 | |||
| 534 | bool hasUntiedDef(Register VirtReg) const { |
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| 535 | return UntiedDefs.count(VirtReg); |
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| 536 | } |
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| 537 | |||
| 538 | void dump() const; |
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| 539 | |||
| 540 | void increaseRegPressure(Register RegUnit, LaneBitmask PreviousMask, |
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| 541 | LaneBitmask NewMask); |
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| 542 | void decreaseRegPressure(Register RegUnit, LaneBitmask PreviousMask, |
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| 543 | LaneBitmask NewMask); |
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| 544 | |||
| 545 | protected: |
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| 546 | /// Add Reg to the live out set and increase max pressure. |
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| 547 | void discoverLiveOut(RegisterMaskPair Pair); |
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| 548 | /// Add Reg to the live in set and increase max pressure. |
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| 549 | void discoverLiveIn(RegisterMaskPair Pair); |
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| 550 | |||
| 551 | /// Get the SlotIndex for the first nondebug instruction including or |
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| 552 | /// after the current position. |
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| 553 | SlotIndex getCurrSlot() const; |
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| 554 | |||
| 555 | void bumpDeadDefs(ArrayRef<RegisterMaskPair> DeadDefs); |
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| 556 | |||
| 557 | void bumpUpwardPressure(const MachineInstr *MI); |
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| 558 | void bumpDownwardPressure(const MachineInstr *MI); |
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| 559 | |||
| 560 | void discoverLiveInOrOut(RegisterMaskPair Pair, |
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| 561 | SmallVectorImpl<RegisterMaskPair> &LiveInOrOut); |
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| 562 | |||
| 563 | LaneBitmask getLastUsedLanes(Register RegUnit, SlotIndex Pos) const; |
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| 564 | LaneBitmask getLiveLanesAt(Register RegUnit, SlotIndex Pos) const; |
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| 565 | LaneBitmask getLiveThroughAt(Register RegUnit, SlotIndex Pos) const; |
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| 566 | }; |
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| 567 | |||
| 568 | void dumpRegSetPressure(ArrayRef<unsigned> SetPressure, |
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| 569 | const TargetRegisterInfo *TRI); |
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| 570 | |||
| 571 | } // end namespace llvm |
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| 572 | |||
| 573 | #endif // LLVM_CODEGEN_REGISTERPRESSURE_H |