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| Rev | Author | Line No. | Line |
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| 14 | pmbaty | 1 | //===- MachineSSAContext.h --------------------------------------*- C++ -*-===// |
| 2 | // |
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| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
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| 4 | // See https://llvm.org/LICENSE.txt for license information. |
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| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
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| 6 | // |
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| 7 | //===----------------------------------------------------------------------===// |
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| 8 | /// \file |
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| 9 | /// |
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| 10 | /// This file declares a specialization of the GenericSSAContext<X> |
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| 11 | /// template class for Machine IR. |
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| 12 | /// |
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| 13 | //===----------------------------------------------------------------------===// |
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| 14 | |||
| 15 | #ifndef LLVM_CODEGEN_MACHINESSACONTEXT_H |
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| 16 | #define LLVM_CODEGEN_MACHINESSACONTEXT_H |
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| 17 | |||
| 18 | #include "llvm/CodeGen/MachineBasicBlock.h" |
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| 19 | #include "llvm/Support/Printable.h" |
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| 20 | |||
| 21 | namespace llvm { |
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| 22 | class MachineRegisterInfo; |
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| 23 | class MachineInstr; |
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| 24 | class MachineFunction; |
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| 25 | class Register; |
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| 26 | template <typename _FunctionT> class GenericSSAContext; |
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| 27 | template <typename, bool> class DominatorTreeBase; |
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| 28 | |||
| 29 | inline auto successors(const MachineBasicBlock *BB) { return BB->successors(); } |
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| 30 | inline auto predecessors(const MachineBasicBlock *BB) { |
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| 31 | return BB->predecessors(); |
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| 32 | } |
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| 33 | inline unsigned succ_size(const MachineBasicBlock *BB) { |
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| 34 | return BB->succ_size(); |
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| 35 | } |
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| 36 | inline unsigned pred_size(const MachineBasicBlock *BB) { |
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| 37 | return BB->pred_size(); |
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| 38 | } |
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| 39 | inline auto instrs(const MachineBasicBlock &BB) { return BB.instrs(); } |
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| 40 | |||
| 41 | template <> class GenericSSAContext<MachineFunction> { |
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| 42 | const MachineRegisterInfo *RegInfo = nullptr; |
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| 43 | MachineFunction *MF; |
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| 44 | |||
| 45 | public: |
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| 46 | using BlockT = MachineBasicBlock; |
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| 47 | using FunctionT = MachineFunction; |
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| 48 | using InstructionT = MachineInstr; |
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| 49 | using ValueRefT = Register; |
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| 50 | using ConstValueRefT = Register; |
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| 51 | static const Register ValueRefNull; |
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| 52 | using DominatorTreeT = DominatorTreeBase<BlockT, false>; |
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| 53 | |||
| 54 | void setFunction(MachineFunction &Fn); |
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| 55 | MachineFunction *getFunction() const { return MF; } |
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| 56 | |||
| 57 | static MachineBasicBlock *getEntryBlock(MachineFunction &F); |
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| 58 | static void appendBlockDefs(SmallVectorImpl<Register> &defs, |
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| 59 | const MachineBasicBlock &block); |
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| 60 | static void appendBlockTerms(SmallVectorImpl<MachineInstr *> &terms, |
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| 61 | MachineBasicBlock &block); |
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| 62 | static void appendBlockTerms(SmallVectorImpl<const MachineInstr *> &terms, |
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| 63 | const MachineBasicBlock &block); |
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| 64 | MachineBasicBlock *getDefBlock(Register) const; |
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| 65 | static bool isConstantValuePhi(const MachineInstr &Phi); |
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| 66 | |||
| 67 | Printable print(const MachineBasicBlock *Block) const; |
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| 68 | Printable print(const MachineInstr *Inst) const; |
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| 69 | Printable print(Register Value) const; |
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| 70 | }; |
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| 71 | |||
| 72 | using MachineSSAContext = GenericSSAContext<MachineFunction>; |
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| 73 | } // namespace llvm |
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| 74 | |||
| 75 | #endif // LLVM_CODEGEN_MACHINESSACONTEXT_H |