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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 14 | pmbaty | 1 | //==------ llvm/CodeGen/GlobalISel/MIPatternMatch.h -------------*- C++ -*-===// |
| 2 | // |
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| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
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| 4 | // See https://llvm.org/LICENSE.txt for license information. |
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| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
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| 6 | // |
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| 7 | //===----------------------------------------------------------------------===// |
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| 8 | /// \file |
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| 9 | /// Contains matchers for matching SSA Machine Instructions. |
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| 10 | /// |
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| 11 | //===----------------------------------------------------------------------===// |
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| 12 | |||
| 13 | #ifndef LLVM_CODEGEN_GLOBALISEL_MIPATTERNMATCH_H |
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| 14 | #define LLVM_CODEGEN_GLOBALISEL_MIPATTERNMATCH_H |
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| 15 | |||
| 16 | #include "llvm/ADT/APInt.h" |
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| 17 | #include "llvm/CodeGen/GlobalISel/Utils.h" |
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| 18 | #include "llvm/CodeGen/MachineRegisterInfo.h" |
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| 19 | #include "llvm/IR/InstrTypes.h" |
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| 20 | |||
| 21 | namespace llvm { |
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| 22 | namespace MIPatternMatch { |
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| 23 | |||
| 24 | template <typename Reg, typename Pattern> |
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| 25 | [[nodiscard]] bool mi_match(Reg R, const MachineRegisterInfo &MRI, |
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| 26 | Pattern &&P) { |
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| 27 | return P.match(MRI, R); |
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| 28 | } |
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| 29 | |||
| 30 | template <typename Pattern> |
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| 31 | [[nodiscard]] bool mi_match(MachineInstr &MI, const MachineRegisterInfo &MRI, |
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| 32 | Pattern &&P) { |
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| 33 | return P.match(MRI, &MI); |
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| 34 | } |
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| 35 | |||
| 36 | // TODO: Extend for N use. |
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| 37 | template <typename SubPatternT> struct OneUse_match { |
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| 38 | SubPatternT SubPat; |
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| 39 | OneUse_match(const SubPatternT &SP) : SubPat(SP) {} |
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| 40 | |||
| 41 | bool match(const MachineRegisterInfo &MRI, Register Reg) { |
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| 42 | return MRI.hasOneUse(Reg) && SubPat.match(MRI, Reg); |
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| 43 | } |
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| 44 | }; |
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| 45 | |||
| 46 | template <typename SubPat> |
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| 47 | inline OneUse_match<SubPat> m_OneUse(const SubPat &SP) { |
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| 48 | return SP; |
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| 49 | } |
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| 50 | |||
| 51 | template <typename SubPatternT> struct OneNonDBGUse_match { |
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| 52 | SubPatternT SubPat; |
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| 53 | OneNonDBGUse_match(const SubPatternT &SP) : SubPat(SP) {} |
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| 54 | |||
| 55 | bool match(const MachineRegisterInfo &MRI, Register Reg) { |
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| 56 | return MRI.hasOneNonDBGUse(Reg) && SubPat.match(MRI, Reg); |
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| 57 | } |
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| 58 | }; |
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| 59 | |||
| 60 | template <typename SubPat> |
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| 61 | inline OneNonDBGUse_match<SubPat> m_OneNonDBGUse(const SubPat &SP) { |
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| 62 | return SP; |
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| 63 | } |
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| 64 | |||
| 65 | template <typename ConstT> |
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| 66 | inline std::optional<ConstT> matchConstant(Register, |
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| 67 | const MachineRegisterInfo &); |
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| 68 | |||
| 69 | template <> |
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| 70 | inline std::optional<APInt> matchConstant(Register Reg, |
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| 71 | const MachineRegisterInfo &MRI) { |
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| 72 | return getIConstantVRegVal(Reg, MRI); |
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| 73 | } |
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| 74 | |||
| 75 | template <> |
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| 76 | inline std::optional<int64_t> matchConstant(Register Reg, |
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| 77 | const MachineRegisterInfo &MRI) { |
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| 78 | return getIConstantVRegSExtVal(Reg, MRI); |
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| 79 | } |
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| 80 | |||
| 81 | template <typename ConstT> struct ConstantMatch { |
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| 82 | ConstT &CR; |
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| 83 | ConstantMatch(ConstT &C) : CR(C) {} |
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| 84 | bool match(const MachineRegisterInfo &MRI, Register Reg) { |
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| 85 | if (auto MaybeCst = matchConstant<ConstT>(Reg, MRI)) { |
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| 86 | CR = *MaybeCst; |
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| 87 | return true; |
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| 88 | } |
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| 89 | return false; |
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| 90 | } |
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| 91 | }; |
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| 92 | |||
| 93 | inline ConstantMatch<APInt> m_ICst(APInt &Cst) { |
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| 94 | return ConstantMatch<APInt>(Cst); |
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| 95 | } |
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| 96 | inline ConstantMatch<int64_t> m_ICst(int64_t &Cst) { |
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| 97 | return ConstantMatch<int64_t>(Cst); |
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| 98 | } |
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| 99 | |||
| 100 | template <typename ConstT> |
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| 101 | inline std::optional<ConstT> matchConstantSplat(Register, |
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| 102 | const MachineRegisterInfo &); |
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| 103 | |||
| 104 | template <> |
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| 105 | inline std::optional<APInt> matchConstantSplat(Register Reg, |
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| 106 | const MachineRegisterInfo &MRI) { |
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| 107 | return getIConstantSplatVal(Reg, MRI); |
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| 108 | } |
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| 109 | |||
| 110 | template <> |
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| 111 | inline std::optional<int64_t> |
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| 112 | matchConstantSplat(Register Reg, const MachineRegisterInfo &MRI) { |
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| 113 | return getIConstantSplatSExtVal(Reg, MRI); |
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| 114 | } |
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| 115 | |||
| 116 | template <typename ConstT> struct ICstOrSplatMatch { |
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| 117 | ConstT &CR; |
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| 118 | ICstOrSplatMatch(ConstT &C) : CR(C) {} |
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| 119 | bool match(const MachineRegisterInfo &MRI, Register Reg) { |
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| 120 | if (auto MaybeCst = matchConstant<ConstT>(Reg, MRI)) { |
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| 121 | CR = *MaybeCst; |
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| 122 | return true; |
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| 123 | } |
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| 124 | |||
| 125 | if (auto MaybeCstSplat = matchConstantSplat<ConstT>(Reg, MRI)) { |
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| 126 | CR = *MaybeCstSplat; |
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| 127 | return true; |
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| 128 | } |
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| 129 | |||
| 130 | return false; |
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| 131 | }; |
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| 132 | }; |
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| 133 | |||
| 134 | inline ICstOrSplatMatch<APInt> m_ICstOrSplat(APInt &Cst) { |
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| 135 | return ICstOrSplatMatch<APInt>(Cst); |
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| 136 | } |
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| 137 | |||
| 138 | inline ICstOrSplatMatch<int64_t> m_ICstOrSplat(int64_t &Cst) { |
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| 139 | return ICstOrSplatMatch<int64_t>(Cst); |
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| 140 | } |
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| 141 | |||
| 142 | struct GCstAndRegMatch { |
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| 143 | std::optional<ValueAndVReg> &ValReg; |
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| 144 | GCstAndRegMatch(std::optional<ValueAndVReg> &ValReg) : ValReg(ValReg) {} |
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| 145 | bool match(const MachineRegisterInfo &MRI, Register Reg) { |
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| 146 | ValReg = getIConstantVRegValWithLookThrough(Reg, MRI); |
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| 147 | return ValReg ? true : false; |
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| 148 | } |
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| 149 | }; |
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| 150 | |||
| 151 | inline GCstAndRegMatch m_GCst(std::optional<ValueAndVReg> &ValReg) { |
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| 152 | return GCstAndRegMatch(ValReg); |
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| 153 | } |
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| 154 | |||
| 155 | struct GFCstAndRegMatch { |
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| 156 | std::optional<FPValueAndVReg> &FPValReg; |
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| 157 | GFCstAndRegMatch(std::optional<FPValueAndVReg> &FPValReg) |
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| 158 | : FPValReg(FPValReg) {} |
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| 159 | bool match(const MachineRegisterInfo &MRI, Register Reg) { |
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| 160 | FPValReg = getFConstantVRegValWithLookThrough(Reg, MRI); |
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| 161 | return FPValReg ? true : false; |
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| 162 | } |
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| 163 | }; |
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| 164 | |||
| 165 | inline GFCstAndRegMatch m_GFCst(std::optional<FPValueAndVReg> &FPValReg) { |
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| 166 | return GFCstAndRegMatch(FPValReg); |
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| 167 | } |
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| 168 | |||
| 169 | struct GFCstOrSplatGFCstMatch { |
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| 170 | std::optional<FPValueAndVReg> &FPValReg; |
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| 171 | GFCstOrSplatGFCstMatch(std::optional<FPValueAndVReg> &FPValReg) |
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| 172 | : FPValReg(FPValReg) {} |
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| 173 | bool match(const MachineRegisterInfo &MRI, Register Reg) { |
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| 174 | return (FPValReg = getFConstantSplat(Reg, MRI)) || |
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| 175 | (FPValReg = getFConstantVRegValWithLookThrough(Reg, MRI)); |
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| 176 | }; |
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| 177 | }; |
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| 178 | |||
| 179 | inline GFCstOrSplatGFCstMatch |
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| 180 | m_GFCstOrSplat(std::optional<FPValueAndVReg> &FPValReg) { |
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| 181 | return GFCstOrSplatGFCstMatch(FPValReg); |
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| 182 | } |
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| 183 | |||
| 184 | /// Matcher for a specific constant value. |
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| 185 | struct SpecificConstantMatch { |
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| 186 | int64_t RequestedVal; |
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| 187 | SpecificConstantMatch(int64_t RequestedVal) : RequestedVal(RequestedVal) {} |
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| 188 | bool match(const MachineRegisterInfo &MRI, Register Reg) { |
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| 189 | int64_t MatchedVal; |
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| 190 | return mi_match(Reg, MRI, m_ICst(MatchedVal)) && MatchedVal == RequestedVal; |
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| 191 | } |
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| 192 | }; |
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| 193 | |||
| 194 | /// Matches a constant equal to \p RequestedValue. |
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| 195 | inline SpecificConstantMatch m_SpecificICst(int64_t RequestedValue) { |
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| 196 | return SpecificConstantMatch(RequestedValue); |
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| 197 | } |
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| 198 | |||
| 199 | /// Matcher for a specific constant splat. |
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| 200 | struct SpecificConstantSplatMatch { |
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| 201 | int64_t RequestedVal; |
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| 202 | SpecificConstantSplatMatch(int64_t RequestedVal) |
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| 203 | : RequestedVal(RequestedVal) {} |
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| 204 | bool match(const MachineRegisterInfo &MRI, Register Reg) { |
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| 205 | return isBuildVectorConstantSplat(Reg, MRI, RequestedVal, |
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| 206 | /* AllowUndef */ false); |
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| 207 | } |
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| 208 | }; |
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| 209 | |||
| 210 | /// Matches a constant splat of \p RequestedValue. |
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| 211 | inline SpecificConstantSplatMatch m_SpecificICstSplat(int64_t RequestedValue) { |
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| 212 | return SpecificConstantSplatMatch(RequestedValue); |
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| 213 | } |
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| 214 | |||
| 215 | /// Matcher for a specific constant or constant splat. |
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| 216 | struct SpecificConstantOrSplatMatch { |
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| 217 | int64_t RequestedVal; |
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| 218 | SpecificConstantOrSplatMatch(int64_t RequestedVal) |
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| 219 | : RequestedVal(RequestedVal) {} |
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| 220 | bool match(const MachineRegisterInfo &MRI, Register Reg) { |
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| 221 | int64_t MatchedVal; |
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| 222 | if (mi_match(Reg, MRI, m_ICst(MatchedVal)) && MatchedVal == RequestedVal) |
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| 223 | return true; |
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| 224 | return isBuildVectorConstantSplat(Reg, MRI, RequestedVal, |
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| 225 | /* AllowUndef */ false); |
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| 226 | } |
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| 227 | }; |
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| 228 | |||
| 229 | /// Matches a \p RequestedValue constant or a constant splat of \p |
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| 230 | /// RequestedValue. |
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| 231 | inline SpecificConstantOrSplatMatch |
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| 232 | m_SpecificICstOrSplat(int64_t RequestedValue) { |
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| 233 | return SpecificConstantOrSplatMatch(RequestedValue); |
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| 234 | } |
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| 235 | |||
| 236 | ///{ |
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| 237 | /// Convenience matchers for specific integer values. |
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| 238 | inline SpecificConstantMatch m_ZeroInt() { return SpecificConstantMatch(0); } |
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| 239 | inline SpecificConstantMatch m_AllOnesInt() { |
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| 240 | return SpecificConstantMatch(-1); |
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| 241 | } |
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| 242 | ///} |
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| 243 | |||
| 244 | /// Matcher for a specific register. |
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| 245 | struct SpecificRegisterMatch { |
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| 246 | Register RequestedReg; |
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| 247 | SpecificRegisterMatch(Register RequestedReg) : RequestedReg(RequestedReg) {} |
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| 248 | bool match(const MachineRegisterInfo &MRI, Register Reg) { |
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| 249 | return Reg == RequestedReg; |
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| 250 | } |
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| 251 | }; |
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| 252 | |||
| 253 | /// Matches a register only if it is equal to \p RequestedReg. |
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| 254 | inline SpecificRegisterMatch m_SpecificReg(Register RequestedReg) { |
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| 255 | return SpecificRegisterMatch(RequestedReg); |
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| 256 | } |
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| 257 | |||
| 258 | // TODO: Rework this for different kinds of MachineOperand. |
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| 259 | // Currently assumes the Src for a match is a register. |
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| 260 | // We might want to support taking in some MachineOperands and call getReg on |
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| 261 | // that. |
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| 262 | |||
| 263 | struct operand_type_match { |
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| 264 | bool match(const MachineRegisterInfo &MRI, Register Reg) { return true; } |
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| 265 | bool match(const MachineRegisterInfo &MRI, MachineOperand *MO) { |
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| 266 | return MO->isReg(); |
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| 267 | } |
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| 268 | }; |
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| 269 | |||
| 270 | inline operand_type_match m_Reg() { return operand_type_match(); } |
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| 271 | |||
| 272 | /// Matching combinators. |
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| 273 | template <typename... Preds> struct And { |
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| 274 | template <typename MatchSrc> |
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| 275 | bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) { |
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| 276 | return true; |
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| 277 | } |
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| 278 | }; |
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| 279 | |||
| 280 | template <typename Pred, typename... Preds> |
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| 281 | struct And<Pred, Preds...> : And<Preds...> { |
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| 282 | Pred P; |
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| 283 | And(Pred &&p, Preds &&... preds) |
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| 284 | : And<Preds...>(std::forward<Preds>(preds)...), P(std::forward<Pred>(p)) { |
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| 285 | } |
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| 286 | template <typename MatchSrc> |
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| 287 | bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) { |
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| 288 | return P.match(MRI, src) && And<Preds...>::match(MRI, src); |
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| 289 | } |
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| 290 | }; |
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| 291 | |||
| 292 | template <typename... Preds> struct Or { |
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| 293 | template <typename MatchSrc> |
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| 294 | bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) { |
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| 295 | return false; |
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| 296 | } |
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| 297 | }; |
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| 298 | |||
| 299 | template <typename Pred, typename... Preds> |
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| 300 | struct Or<Pred, Preds...> : Or<Preds...> { |
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| 301 | Pred P; |
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| 302 | Or(Pred &&p, Preds &&... preds) |
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| 303 | : Or<Preds...>(std::forward<Preds>(preds)...), P(std::forward<Pred>(p)) {} |
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| 304 | template <typename MatchSrc> |
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| 305 | bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) { |
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| 306 | return P.match(MRI, src) || Or<Preds...>::match(MRI, src); |
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| 307 | } |
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| 308 | }; |
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| 309 | |||
| 310 | template <typename... Preds> And<Preds...> m_all_of(Preds &&... preds) { |
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| 311 | return And<Preds...>(std::forward<Preds>(preds)...); |
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| 312 | } |
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| 313 | |||
| 314 | template <typename... Preds> Or<Preds...> m_any_of(Preds &&... preds) { |
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| 315 | return Or<Preds...>(std::forward<Preds>(preds)...); |
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| 316 | } |
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| 317 | |||
| 318 | template <typename BindTy> struct bind_helper { |
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| 319 | static bool bind(const MachineRegisterInfo &MRI, BindTy &VR, BindTy &V) { |
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| 320 | VR = V; |
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| 321 | return true; |
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| 322 | } |
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| 323 | }; |
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| 324 | |||
| 325 | template <> struct bind_helper<MachineInstr *> { |
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| 326 | static bool bind(const MachineRegisterInfo &MRI, MachineInstr *&MI, |
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| 327 | Register Reg) { |
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| 328 | MI = MRI.getVRegDef(Reg); |
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| 329 | if (MI) |
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| 330 | return true; |
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| 331 | return false; |
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| 332 | } |
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| 333 | static bool bind(const MachineRegisterInfo &MRI, MachineInstr *&MI, |
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| 334 | MachineInstr *Inst) { |
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| 335 | MI = Inst; |
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| 336 | return MI; |
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| 337 | } |
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| 338 | }; |
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| 339 | |||
| 340 | template <> struct bind_helper<LLT> { |
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| 341 | static bool bind(const MachineRegisterInfo &MRI, LLT Ty, Register Reg) { |
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| 342 | Ty = MRI.getType(Reg); |
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| 343 | if (Ty.isValid()) |
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| 344 | return true; |
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| 345 | return false; |
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| 346 | } |
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| 347 | }; |
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| 348 | |||
| 349 | template <> struct bind_helper<const ConstantFP *> { |
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| 350 | static bool bind(const MachineRegisterInfo &MRI, const ConstantFP *&F, |
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| 351 | Register Reg) { |
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| 352 | F = getConstantFPVRegVal(Reg, MRI); |
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| 353 | if (F) |
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| 354 | return true; |
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| 355 | return false; |
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| 356 | } |
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| 357 | }; |
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| 358 | |||
| 359 | template <typename Class> struct bind_ty { |
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| 360 | Class &VR; |
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| 361 | |||
| 362 | bind_ty(Class &V) : VR(V) {} |
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| 363 | |||
| 364 | template <typename ITy> bool match(const MachineRegisterInfo &MRI, ITy &&V) { |
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| 365 | return bind_helper<Class>::bind(MRI, VR, V); |
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| 366 | } |
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| 367 | }; |
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| 368 | |||
| 369 | inline bind_ty<Register> m_Reg(Register &R) { return R; } |
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| 370 | inline bind_ty<MachineInstr *> m_MInstr(MachineInstr *&MI) { return MI; } |
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| 371 | inline bind_ty<LLT> m_Type(LLT Ty) { return Ty; } |
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| 372 | inline bind_ty<CmpInst::Predicate> m_Pred(CmpInst::Predicate &P) { return P; } |
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| 373 | inline operand_type_match m_Pred() { return operand_type_match(); } |
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| 374 | |||
| 375 | struct ImplicitDefMatch { |
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| 376 | bool match(const MachineRegisterInfo &MRI, Register Reg) { |
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| 377 | MachineInstr *TmpMI; |
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| 378 | if (mi_match(Reg, MRI, m_MInstr(TmpMI))) |
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| 379 | return TmpMI->getOpcode() == TargetOpcode::G_IMPLICIT_DEF; |
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| 380 | return false; |
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| 381 | } |
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| 382 | }; |
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| 383 | |||
| 384 | inline ImplicitDefMatch m_GImplicitDef() { return ImplicitDefMatch(); } |
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| 385 | |||
| 386 | // Helper for matching G_FCONSTANT |
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| 387 | inline bind_ty<const ConstantFP *> m_GFCst(const ConstantFP *&C) { return C; } |
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| 388 | |||
| 389 | // General helper for all the binary generic MI such as G_ADD/G_SUB etc |
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| 390 | template <typename LHS_P, typename RHS_P, unsigned Opcode, |
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| 391 | bool Commutable = false> |
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| 392 | struct BinaryOp_match { |
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| 393 | LHS_P L; |
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| 394 | RHS_P R; |
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| 395 | |||
| 396 | BinaryOp_match(const LHS_P &LHS, const RHS_P &RHS) : L(LHS), R(RHS) {} |
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| 397 | template <typename OpTy> |
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| 398 | bool match(const MachineRegisterInfo &MRI, OpTy &&Op) { |
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| 399 | MachineInstr *TmpMI; |
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| 400 | if (mi_match(Op, MRI, m_MInstr(TmpMI))) { |
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| 401 | if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 3) { |
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| 402 | return (L.match(MRI, TmpMI->getOperand(1).getReg()) && |
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| 403 | R.match(MRI, TmpMI->getOperand(2).getReg())) || |
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| 404 | (Commutable && (R.match(MRI, TmpMI->getOperand(1).getReg()) && |
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| 405 | L.match(MRI, TmpMI->getOperand(2).getReg()))); |
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| 406 | } |
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| 407 | } |
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| 408 | return false; |
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| 409 | } |
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| 410 | }; |
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| 411 | |||
| 412 | // Helper for (commutative) binary generic MI that checks Opcode. |
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| 413 | template <typename LHS_P, typename RHS_P, bool Commutable = false> |
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| 414 | struct BinaryOpc_match { |
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| 415 | unsigned Opc; |
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| 416 | LHS_P L; |
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| 417 | RHS_P R; |
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| 418 | |||
| 419 | BinaryOpc_match(unsigned Opcode, const LHS_P &LHS, const RHS_P &RHS) |
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| 420 | : Opc(Opcode), L(LHS), R(RHS) {} |
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| 421 | template <typename OpTy> |
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| 422 | bool match(const MachineRegisterInfo &MRI, OpTy &&Op) { |
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| 423 | MachineInstr *TmpMI; |
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| 424 | if (mi_match(Op, MRI, m_MInstr(TmpMI))) { |
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| 425 | if (TmpMI->getOpcode() == Opc && TmpMI->getNumDefs() == 1 && |
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| 426 | TmpMI->getNumOperands() == 3) { |
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| 427 | return (L.match(MRI, TmpMI->getOperand(1).getReg()) && |
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| 428 | R.match(MRI, TmpMI->getOperand(2).getReg())) || |
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| 429 | (Commutable && (R.match(MRI, TmpMI->getOperand(1).getReg()) && |
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| 430 | L.match(MRI, TmpMI->getOperand(2).getReg()))); |
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| 431 | } |
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| 432 | } |
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| 433 | return false; |
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| 434 | } |
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| 435 | }; |
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| 436 | |||
| 437 | template <typename LHS, typename RHS> |
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| 438 | inline BinaryOpc_match<LHS, RHS, false> m_BinOp(unsigned Opcode, const LHS &L, |
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| 439 | const RHS &R) { |
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| 440 | return BinaryOpc_match<LHS, RHS, false>(Opcode, L, R); |
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| 441 | } |
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| 442 | |||
| 443 | template <typename LHS, typename RHS> |
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| 444 | inline BinaryOpc_match<LHS, RHS, true> |
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| 445 | m_CommutativeBinOp(unsigned Opcode, const LHS &L, const RHS &R) { |
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| 446 | return BinaryOpc_match<LHS, RHS, true>(Opcode, L, R); |
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| 447 | } |
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| 448 | |||
| 449 | template <typename LHS, typename RHS> |
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| 450 | inline BinaryOp_match<LHS, RHS, TargetOpcode::G_ADD, true> |
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| 451 | m_GAdd(const LHS &L, const RHS &R) { |
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| 452 | return BinaryOp_match<LHS, RHS, TargetOpcode::G_ADD, true>(L, R); |
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| 453 | } |
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| 454 | |||
| 455 | template <typename LHS, typename RHS> |
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| 456 | inline BinaryOp_match<LHS, RHS, TargetOpcode::G_BUILD_VECTOR, false> |
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| 457 | m_GBuildVector(const LHS &L, const RHS &R) { |
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| 458 | return BinaryOp_match<LHS, RHS, TargetOpcode::G_BUILD_VECTOR, false>(L, R); |
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| 459 | } |
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| 460 | |||
| 461 | template <typename LHS, typename RHS> |
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| 462 | inline BinaryOp_match<LHS, RHS, TargetOpcode::G_BUILD_VECTOR_TRUNC, false> |
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| 463 | m_GBuildVectorTrunc(const LHS &L, const RHS &R) { |
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| 464 | return BinaryOp_match<LHS, RHS, TargetOpcode::G_BUILD_VECTOR_TRUNC, false>(L, |
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| 465 | R); |
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| 466 | } |
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| 467 | |||
| 468 | template <typename LHS, typename RHS> |
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| 469 | inline BinaryOp_match<LHS, RHS, TargetOpcode::G_PTR_ADD, false> |
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| 470 | m_GPtrAdd(const LHS &L, const RHS &R) { |
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| 471 | return BinaryOp_match<LHS, RHS, TargetOpcode::G_PTR_ADD, false>(L, R); |
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| 472 | } |
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| 473 | |||
| 474 | template <typename LHS, typename RHS> |
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| 475 | inline BinaryOp_match<LHS, RHS, TargetOpcode::G_SUB> m_GSub(const LHS &L, |
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| 476 | const RHS &R) { |
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| 477 | return BinaryOp_match<LHS, RHS, TargetOpcode::G_SUB>(L, R); |
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| 478 | } |
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| 479 | |||
| 480 | template <typename LHS, typename RHS> |
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| 481 | inline BinaryOp_match<LHS, RHS, TargetOpcode::G_MUL, true> |
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| 482 | m_GMul(const LHS &L, const RHS &R) { |
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| 483 | return BinaryOp_match<LHS, RHS, TargetOpcode::G_MUL, true>(L, R); |
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| 484 | } |
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| 485 | |||
| 486 | template <typename LHS, typename RHS> |
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| 487 | inline BinaryOp_match<LHS, RHS, TargetOpcode::G_FADD, true> |
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| 488 | m_GFAdd(const LHS &L, const RHS &R) { |
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| 489 | return BinaryOp_match<LHS, RHS, TargetOpcode::G_FADD, true>(L, R); |
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| 490 | } |
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| 491 | |||
| 492 | template <typename LHS, typename RHS> |
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| 493 | inline BinaryOp_match<LHS, RHS, TargetOpcode::G_FMUL, true> |
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| 494 | m_GFMul(const LHS &L, const RHS &R) { |
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| 495 | return BinaryOp_match<LHS, RHS, TargetOpcode::G_FMUL, true>(L, R); |
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| 496 | } |
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| 497 | |||
| 498 | template <typename LHS, typename RHS> |
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| 499 | inline BinaryOp_match<LHS, RHS, TargetOpcode::G_FSUB, false> |
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| 500 | m_GFSub(const LHS &L, const RHS &R) { |
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| 501 | return BinaryOp_match<LHS, RHS, TargetOpcode::G_FSUB, false>(L, R); |
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| 502 | } |
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| 503 | |||
| 504 | template <typename LHS, typename RHS> |
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| 505 | inline BinaryOp_match<LHS, RHS, TargetOpcode::G_AND, true> |
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| 506 | m_GAnd(const LHS &L, const RHS &R) { |
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| 507 | return BinaryOp_match<LHS, RHS, TargetOpcode::G_AND, true>(L, R); |
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| 508 | } |
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| 509 | |||
| 510 | template <typename LHS, typename RHS> |
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| 511 | inline BinaryOp_match<LHS, RHS, TargetOpcode::G_XOR, true> |
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| 512 | m_GXor(const LHS &L, const RHS &R) { |
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| 513 | return BinaryOp_match<LHS, RHS, TargetOpcode::G_XOR, true>(L, R); |
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| 514 | } |
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| 515 | |||
| 516 | template <typename LHS, typename RHS> |
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| 517 | inline BinaryOp_match<LHS, RHS, TargetOpcode::G_OR, true> m_GOr(const LHS &L, |
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| 518 | const RHS &R) { |
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| 519 | return BinaryOp_match<LHS, RHS, TargetOpcode::G_OR, true>(L, R); |
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| 520 | } |
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| 521 | |||
| 522 | template <typename LHS, typename RHS> |
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| 523 | inline BinaryOp_match<LHS, RHS, TargetOpcode::G_SHL, false> |
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| 524 | m_GShl(const LHS &L, const RHS &R) { |
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| 525 | return BinaryOp_match<LHS, RHS, TargetOpcode::G_SHL, false>(L, R); |
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| 526 | } |
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| 527 | |||
| 528 | template <typename LHS, typename RHS> |
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| 529 | inline BinaryOp_match<LHS, RHS, TargetOpcode::G_LSHR, false> |
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| 530 | m_GLShr(const LHS &L, const RHS &R) { |
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| 531 | return BinaryOp_match<LHS, RHS, TargetOpcode::G_LSHR, false>(L, R); |
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| 532 | } |
||
| 533 | |||
| 534 | template <typename LHS, typename RHS> |
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| 535 | inline BinaryOp_match<LHS, RHS, TargetOpcode::G_ASHR, false> |
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| 536 | m_GAShr(const LHS &L, const RHS &R) { |
||
| 537 | return BinaryOp_match<LHS, RHS, TargetOpcode::G_ASHR, false>(L, R); |
||
| 538 | } |
||
| 539 | |||
| 540 | template <typename LHS, typename RHS> |
||
| 541 | inline BinaryOp_match<LHS, RHS, TargetOpcode::G_SMAX, false> |
||
| 542 | m_GSMax(const LHS &L, const RHS &R) { |
||
| 543 | return BinaryOp_match<LHS, RHS, TargetOpcode::G_SMAX, false>(L, R); |
||
| 544 | } |
||
| 545 | |||
| 546 | template <typename LHS, typename RHS> |
||
| 547 | inline BinaryOp_match<LHS, RHS, TargetOpcode::G_SMIN, false> |
||
| 548 | m_GSMin(const LHS &L, const RHS &R) { |
||
| 549 | return BinaryOp_match<LHS, RHS, TargetOpcode::G_SMIN, false>(L, R); |
||
| 550 | } |
||
| 551 | |||
| 552 | // Helper for unary instructions (G_[ZSA]EXT/G_TRUNC) etc |
||
| 553 | template <typename SrcTy, unsigned Opcode> struct UnaryOp_match { |
||
| 554 | SrcTy L; |
||
| 555 | |||
| 556 | UnaryOp_match(const SrcTy &LHS) : L(LHS) {} |
||
| 557 | template <typename OpTy> |
||
| 558 | bool match(const MachineRegisterInfo &MRI, OpTy &&Op) { |
||
| 559 | MachineInstr *TmpMI; |
||
| 560 | if (mi_match(Op, MRI, m_MInstr(TmpMI))) { |
||
| 561 | if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 2) { |
||
| 562 | return L.match(MRI, TmpMI->getOperand(1).getReg()); |
||
| 563 | } |
||
| 564 | } |
||
| 565 | return false; |
||
| 566 | } |
||
| 567 | }; |
||
| 568 | |||
| 569 | template <typename SrcTy> |
||
| 570 | inline UnaryOp_match<SrcTy, TargetOpcode::G_ANYEXT> |
||
| 571 | m_GAnyExt(const SrcTy &Src) { |
||
| 572 | return UnaryOp_match<SrcTy, TargetOpcode::G_ANYEXT>(Src); |
||
| 573 | } |
||
| 574 | |||
| 575 | template <typename SrcTy> |
||
| 576 | inline UnaryOp_match<SrcTy, TargetOpcode::G_SEXT> m_GSExt(const SrcTy &Src) { |
||
| 577 | return UnaryOp_match<SrcTy, TargetOpcode::G_SEXT>(Src); |
||
| 578 | } |
||
| 579 | |||
| 580 | template <typename SrcTy> |
||
| 581 | inline UnaryOp_match<SrcTy, TargetOpcode::G_ZEXT> m_GZExt(const SrcTy &Src) { |
||
| 582 | return UnaryOp_match<SrcTy, TargetOpcode::G_ZEXT>(Src); |
||
| 583 | } |
||
| 584 | |||
| 585 | template <typename SrcTy> |
||
| 586 | inline UnaryOp_match<SrcTy, TargetOpcode::G_FPEXT> m_GFPExt(const SrcTy &Src) { |
||
| 587 | return UnaryOp_match<SrcTy, TargetOpcode::G_FPEXT>(Src); |
||
| 588 | } |
||
| 589 | |||
| 590 | template <typename SrcTy> |
||
| 591 | inline UnaryOp_match<SrcTy, TargetOpcode::G_TRUNC> m_GTrunc(const SrcTy &Src) { |
||
| 592 | return UnaryOp_match<SrcTy, TargetOpcode::G_TRUNC>(Src); |
||
| 593 | } |
||
| 594 | |||
| 595 | template <typename SrcTy> |
||
| 596 | inline UnaryOp_match<SrcTy, TargetOpcode::G_BITCAST> |
||
| 597 | m_GBitcast(const SrcTy &Src) { |
||
| 598 | return UnaryOp_match<SrcTy, TargetOpcode::G_BITCAST>(Src); |
||
| 599 | } |
||
| 600 | |||
| 601 | template <typename SrcTy> |
||
| 602 | inline UnaryOp_match<SrcTy, TargetOpcode::G_PTRTOINT> |
||
| 603 | m_GPtrToInt(const SrcTy &Src) { |
||
| 604 | return UnaryOp_match<SrcTy, TargetOpcode::G_PTRTOINT>(Src); |
||
| 605 | } |
||
| 606 | |||
| 607 | template <typename SrcTy> |
||
| 608 | inline UnaryOp_match<SrcTy, TargetOpcode::G_INTTOPTR> |
||
| 609 | m_GIntToPtr(const SrcTy &Src) { |
||
| 610 | return UnaryOp_match<SrcTy, TargetOpcode::G_INTTOPTR>(Src); |
||
| 611 | } |
||
| 612 | |||
| 613 | template <typename SrcTy> |
||
| 614 | inline UnaryOp_match<SrcTy, TargetOpcode::G_FPTRUNC> |
||
| 615 | m_GFPTrunc(const SrcTy &Src) { |
||
| 616 | return UnaryOp_match<SrcTy, TargetOpcode::G_FPTRUNC>(Src); |
||
| 617 | } |
||
| 618 | |||
| 619 | template <typename SrcTy> |
||
| 620 | inline UnaryOp_match<SrcTy, TargetOpcode::G_FABS> m_GFabs(const SrcTy &Src) { |
||
| 621 | return UnaryOp_match<SrcTy, TargetOpcode::G_FABS>(Src); |
||
| 622 | } |
||
| 623 | |||
| 624 | template <typename SrcTy> |
||
| 625 | inline UnaryOp_match<SrcTy, TargetOpcode::G_FNEG> m_GFNeg(const SrcTy &Src) { |
||
| 626 | return UnaryOp_match<SrcTy, TargetOpcode::G_FNEG>(Src); |
||
| 627 | } |
||
| 628 | |||
| 629 | template <typename SrcTy> |
||
| 630 | inline UnaryOp_match<SrcTy, TargetOpcode::COPY> m_Copy(SrcTy &&Src) { |
||
| 631 | return UnaryOp_match<SrcTy, TargetOpcode::COPY>(std::forward<SrcTy>(Src)); |
||
| 632 | } |
||
| 633 | |||
| 634 | template <typename SrcTy> |
||
| 635 | inline UnaryOp_match<SrcTy, TargetOpcode::G_FSQRT> m_GFSqrt(const SrcTy &Src) { |
||
| 636 | return UnaryOp_match<SrcTy, TargetOpcode::G_FSQRT>(Src); |
||
| 637 | } |
||
| 638 | |||
| 639 | // General helper for generic MI compares, i.e. G_ICMP and G_FCMP |
||
| 640 | // TODO: Allow checking a specific predicate. |
||
| 641 | template <typename Pred_P, typename LHS_P, typename RHS_P, unsigned Opcode, |
||
| 642 | bool Commutable = false> |
||
| 643 | struct CompareOp_match { |
||
| 644 | Pred_P P; |
||
| 645 | LHS_P L; |
||
| 646 | RHS_P R; |
||
| 647 | |||
| 648 | CompareOp_match(const Pred_P &Pred, const LHS_P &LHS, const RHS_P &RHS) |
||
| 649 | : P(Pred), L(LHS), R(RHS) {} |
||
| 650 | |||
| 651 | template <typename OpTy> |
||
| 652 | bool match(const MachineRegisterInfo &MRI, OpTy &&Op) { |
||
| 653 | MachineInstr *TmpMI; |
||
| 654 | if (!mi_match(Op, MRI, m_MInstr(TmpMI)) || TmpMI->getOpcode() != Opcode) |
||
| 655 | return false; |
||
| 656 | |||
| 657 | auto TmpPred = |
||
| 658 | static_cast<CmpInst::Predicate>(TmpMI->getOperand(1).getPredicate()); |
||
| 659 | if (!P.match(MRI, TmpPred)) |
||
| 660 | return false; |
||
| 661 | Register LHS = TmpMI->getOperand(2).getReg(); |
||
| 662 | Register RHS = TmpMI->getOperand(3).getReg(); |
||
| 663 | if (L.match(MRI, LHS) && R.match(MRI, RHS)) |
||
| 664 | return true; |
||
| 665 | if (Commutable && L.match(MRI, RHS) && R.match(MRI, LHS) && |
||
| 666 | P.match(MRI, CmpInst::getSwappedPredicate(TmpPred))) |
||
| 667 | return true; |
||
| 668 | return false; |
||
| 669 | } |
||
| 670 | }; |
||
| 671 | |||
| 672 | template <typename Pred, typename LHS, typename RHS> |
||
| 673 | inline CompareOp_match<Pred, LHS, RHS, TargetOpcode::G_ICMP> |
||
| 674 | m_GICmp(const Pred &P, const LHS &L, const RHS &R) { |
||
| 675 | return CompareOp_match<Pred, LHS, RHS, TargetOpcode::G_ICMP>(P, L, R); |
||
| 676 | } |
||
| 677 | |||
| 678 | template <typename Pred, typename LHS, typename RHS> |
||
| 679 | inline CompareOp_match<Pred, LHS, RHS, TargetOpcode::G_FCMP> |
||
| 680 | m_GFCmp(const Pred &P, const LHS &L, const RHS &R) { |
||
| 681 | return CompareOp_match<Pred, LHS, RHS, TargetOpcode::G_FCMP>(P, L, R); |
||
| 682 | } |
||
| 683 | |||
| 684 | /// G_ICMP matcher that also matches commuted compares. |
||
| 685 | /// E.g. |
||
| 686 | /// |
||
| 687 | /// m_c_GICmp(m_Pred(...), m_GAdd(...), m_GSub(...)) |
||
| 688 | /// |
||
| 689 | /// Could match both of: |
||
| 690 | /// |
||
| 691 | /// icmp ugt (add x, y) (sub a, b) |
||
| 692 | /// icmp ult (sub a, b) (add x, y) |
||
| 693 | template <typename Pred, typename LHS, typename RHS> |
||
| 694 | inline CompareOp_match<Pred, LHS, RHS, TargetOpcode::G_ICMP, true> |
||
| 695 | m_c_GICmp(const Pred &P, const LHS &L, const RHS &R) { |
||
| 696 | return CompareOp_match<Pred, LHS, RHS, TargetOpcode::G_ICMP, true>(P, L, R); |
||
| 697 | } |
||
| 698 | |||
| 699 | /// G_FCMP matcher that also matches commuted compares. |
||
| 700 | /// E.g. |
||
| 701 | /// |
||
| 702 | /// m_c_GFCmp(m_Pred(...), m_FAdd(...), m_GFMul(...)) |
||
| 703 | /// |
||
| 704 | /// Could match both of: |
||
| 705 | /// |
||
| 706 | /// fcmp ogt (fadd x, y) (fmul a, b) |
||
| 707 | /// fcmp olt (fmul a, b) (fadd x, y) |
||
| 708 | template <typename Pred, typename LHS, typename RHS> |
||
| 709 | inline CompareOp_match<Pred, LHS, RHS, TargetOpcode::G_FCMP, true> |
||
| 710 | m_c_GFCmp(const Pred &P, const LHS &L, const RHS &R) { |
||
| 711 | return CompareOp_match<Pred, LHS, RHS, TargetOpcode::G_FCMP, true>(P, L, R); |
||
| 712 | } |
||
| 713 | |||
| 714 | // Helper for checking if a Reg is of specific type. |
||
| 715 | struct CheckType { |
||
| 716 | LLT Ty; |
||
| 717 | CheckType(const LLT Ty) : Ty(Ty) {} |
||
| 718 | |||
| 719 | bool match(const MachineRegisterInfo &MRI, Register Reg) { |
||
| 720 | return MRI.getType(Reg) == Ty; |
||
| 721 | } |
||
| 722 | }; |
||
| 723 | |||
| 724 | inline CheckType m_SpecificType(LLT Ty) { return Ty; } |
||
| 725 | |||
| 726 | template <typename Src0Ty, typename Src1Ty, typename Src2Ty, unsigned Opcode> |
||
| 727 | struct TernaryOp_match { |
||
| 728 | Src0Ty Src0; |
||
| 729 | Src1Ty Src1; |
||
| 730 | Src2Ty Src2; |
||
| 731 | |||
| 732 | TernaryOp_match(const Src0Ty &Src0, const Src1Ty &Src1, const Src2Ty &Src2) |
||
| 733 | : Src0(Src0), Src1(Src1), Src2(Src2) {} |
||
| 734 | template <typename OpTy> |
||
| 735 | bool match(const MachineRegisterInfo &MRI, OpTy &&Op) { |
||
| 736 | MachineInstr *TmpMI; |
||
| 737 | if (mi_match(Op, MRI, m_MInstr(TmpMI))) { |
||
| 738 | if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 4) { |
||
| 739 | return (Src0.match(MRI, TmpMI->getOperand(1).getReg()) && |
||
| 740 | Src1.match(MRI, TmpMI->getOperand(2).getReg()) && |
||
| 741 | Src2.match(MRI, TmpMI->getOperand(3).getReg())); |
||
| 742 | } |
||
| 743 | } |
||
| 744 | return false; |
||
| 745 | } |
||
| 746 | }; |
||
| 747 | template <typename Src0Ty, typename Src1Ty, typename Src2Ty> |
||
| 748 | inline TernaryOp_match<Src0Ty, Src1Ty, Src2Ty, |
||
| 749 | TargetOpcode::G_INSERT_VECTOR_ELT> |
||
| 750 | m_GInsertVecElt(const Src0Ty &Src0, const Src1Ty &Src1, const Src2Ty &Src2) { |
||
| 751 | return TernaryOp_match<Src0Ty, Src1Ty, Src2Ty, |
||
| 752 | TargetOpcode::G_INSERT_VECTOR_ELT>(Src0, Src1, Src2); |
||
| 753 | } |
||
| 754 | |||
| 755 | template <typename Src0Ty, typename Src1Ty, typename Src2Ty> |
||
| 756 | inline TernaryOp_match<Src0Ty, Src1Ty, Src2Ty, TargetOpcode::G_SELECT> |
||
| 757 | m_GISelect(const Src0Ty &Src0, const Src1Ty &Src1, const Src2Ty &Src2) { |
||
| 758 | return TernaryOp_match<Src0Ty, Src1Ty, Src2Ty, TargetOpcode::G_SELECT>( |
||
| 759 | Src0, Src1, Src2); |
||
| 760 | } |
||
| 761 | |||
| 762 | /// Matches a register negated by a G_SUB. |
||
| 763 | /// G_SUB 0, %negated_reg |
||
| 764 | template <typename SrcTy> |
||
| 765 | inline BinaryOp_match<SpecificConstantMatch, SrcTy, TargetOpcode::G_SUB> |
||
| 766 | m_Neg(const SrcTy &&Src) { |
||
| 767 | return m_GSub(m_ZeroInt(), Src); |
||
| 768 | } |
||
| 769 | |||
| 770 | /// Matches a register not-ed by a G_XOR. |
||
| 771 | /// G_XOR %not_reg, -1 |
||
| 772 | template <typename SrcTy> |
||
| 773 | inline BinaryOp_match<SrcTy, SpecificConstantMatch, TargetOpcode::G_XOR, true> |
||
| 774 | m_Not(const SrcTy &&Src) { |
||
| 775 | return m_GXor(Src, m_AllOnesInt()); |
||
| 776 | } |
||
| 777 | |||
| 778 | } // namespace MIPatternMatch |
||
| 779 | } // namespace llvm |
||
| 780 | |||
| 781 | #endif |