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| Rev | Author | Line No. | Line | 
|---|---|---|---|
| 14 | pmbaty | 1 | //===- CodeGen/Analysis.h - CodeGen LLVM IR Analysis Utilities --*- C++ -*-===// | 
| 2 | // | ||
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
| 4 | // See https://llvm.org/LICENSE.txt for license information. | ||
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
| 6 | // | ||
| 7 | //===----------------------------------------------------------------------===// | ||
| 8 | // | ||
| 9 | // This file declares several CodeGen-specific LLVM IR analysis utilities. | ||
| 10 | // | ||
| 11 | //===----------------------------------------------------------------------===// | ||
| 12 | |||
| 13 | #ifndef LLVM_CODEGEN_ANALYSIS_H | ||
| 14 | #define LLVM_CODEGEN_ANALYSIS_H | ||
| 15 | |||
| 16 | #include "llvm/ADT/ArrayRef.h" | ||
| 17 | #include "llvm/ADT/DenseMap.h" | ||
| 18 | #include "llvm/CodeGen/ISDOpcodes.h" | ||
| 19 | #include "llvm/IR/Instructions.h" | ||
| 20 | |||
| 21 | namespace llvm { | ||
| 22 | template <typename T> class SmallVectorImpl; | ||
| 23 | class GlobalValue; | ||
| 24 | class LLT; | ||
| 25 | class MachineBasicBlock; | ||
| 26 | class MachineFunction; | ||
| 27 | class TargetLoweringBase; | ||
| 28 | class TargetLowering; | ||
| 29 | class TargetMachine; | ||
| 30 | struct EVT; | ||
| 31 | |||
| 32 | /// Compute the linearized index of a member in a nested | ||
| 33 | /// aggregate/struct/array. | ||
| 34 | /// | ||
| 35 | /// Given an LLVM IR aggregate type and a sequence of insertvalue or | ||
| 36 | /// extractvalue indices that identify a member, return the linearized index of | ||
| 37 | /// the start of the member, i.e the number of element in memory before the | ||
| 38 | /// sought one. This is disconnected from the number of bytes. | ||
| 39 | /// | ||
| 40 | /// \param Ty is the type indexed by \p Indices. | ||
| 41 | /// \param Indices is an optional pointer in the indices list to the current | ||
| 42 | /// index. | ||
| 43 | /// \param IndicesEnd is the end of the indices list. | ||
| 44 | /// \param CurIndex is the current index in the recursion. | ||
| 45 | /// | ||
| 46 | /// \returns \p CurIndex plus the linear index in \p Ty  the indices list. | ||
| 47 | unsigned ComputeLinearIndex(Type *Ty, | ||
| 48 | const unsigned *Indices, | ||
| 49 | const unsigned *IndicesEnd, | ||
| 50 | unsigned CurIndex = 0); | ||
| 51 | |||
| 52 | inline unsigned ComputeLinearIndex(Type *Ty, | ||
| 53 | ArrayRef<unsigned> Indices, | ||
| 54 | unsigned CurIndex = 0) { | ||
| 55 | return ComputeLinearIndex(Ty, Indices.begin(), Indices.end(), CurIndex); | ||
| 56 | } | ||
| 57 | |||
| 58 | /// ComputeValueVTs - Given an LLVM IR type, compute a sequence of | ||
| 59 | /// EVTs that represent all the individual underlying | ||
| 60 | /// non-aggregate types that comprise it. | ||
| 61 | /// | ||
| 62 | /// If Offsets is non-null, it points to a vector to be filled in | ||
| 63 | /// with the in-memory offsets of each of the individual values. | ||
| 64 | /// | ||
| 65 | void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty, | ||
| 66 | SmallVectorImpl<EVT> &ValueVTs, | ||
| 67 | SmallVectorImpl<uint64_t> *Offsets = nullptr, | ||
| 68 | uint64_t StartingOffset = 0); | ||
| 69 | |||
| 70 | /// Variant of ComputeValueVTs that also produces the memory VTs. | ||
| 71 | void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty, | ||
| 72 | SmallVectorImpl<EVT> &ValueVTs, | ||
| 73 | SmallVectorImpl<EVT> *MemVTs, | ||
| 74 | SmallVectorImpl<uint64_t> *Offsets = nullptr, | ||
| 75 | uint64_t StartingOffset = 0); | ||
| 76 | |||
| 77 | /// computeValueLLTs - Given an LLVM IR type, compute a sequence of | ||
| 78 | /// LLTs that represent all the individual underlying | ||
| 79 | /// non-aggregate types that comprise it. | ||
| 80 | /// | ||
| 81 | /// If Offsets is non-null, it points to a vector to be filled in | ||
| 82 | /// with the in-memory offsets of each of the individual values. | ||
| 83 | /// | ||
| 84 | void computeValueLLTs(const DataLayout &DL, Type &Ty, | ||
| 85 | SmallVectorImpl<LLT> &ValueTys, | ||
| 86 | SmallVectorImpl<uint64_t> *Offsets = nullptr, | ||
| 87 | uint64_t StartingOffset = 0); | ||
| 88 | |||
| 89 | /// ExtractTypeInfo - Returns the type info, possibly bitcast, encoded in V. | ||
| 90 | GlobalValue *ExtractTypeInfo(Value *V); | ||
| 91 | |||
| 92 | /// getFCmpCondCode - Return the ISD condition code corresponding to | ||
| 93 | /// the given LLVM IR floating-point condition code.  This includes | ||
| 94 | /// consideration of global floating-point math flags. | ||
| 95 | /// | ||
| 96 | ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred); | ||
| 97 | |||
| 98 | /// getFCmpCodeWithoutNaN - Given an ISD condition code comparing floats, | ||
| 99 | /// return the equivalent code if we're allowed to assume that NaNs won't occur. | ||
| 100 | ISD::CondCode getFCmpCodeWithoutNaN(ISD::CondCode CC); | ||
| 101 | |||
| 102 | /// getICmpCondCode - Return the ISD condition code corresponding to | ||
| 103 | /// the given LLVM IR integer condition code. | ||
| 104 | ISD::CondCode getICmpCondCode(ICmpInst::Predicate Pred); | ||
| 105 | |||
| 106 | /// getICmpCondCode - Return the LLVM IR integer condition code | ||
| 107 | /// corresponding to the given ISD integer condition code. | ||
| 108 | ICmpInst::Predicate getICmpCondCode(ISD::CondCode Pred); | ||
| 109 | |||
| 110 | /// Test if the given instruction is in a position to be optimized | ||
| 111 | /// with a tail-call. This roughly means that it's in a block with | ||
| 112 | /// a return and there's nothing that needs to be scheduled | ||
| 113 | /// between it and the return. | ||
| 114 | /// | ||
| 115 | /// This function only tests target-independent requirements. | ||
| 116 | bool isInTailCallPosition(const CallBase &Call, const TargetMachine &TM); | ||
| 117 | |||
| 118 | /// Test if given that the input instruction is in the tail call position, if | ||
| 119 | /// there is an attribute mismatch between the caller and the callee that will | ||
| 120 | /// inhibit tail call optimizations. | ||
| 121 | /// \p AllowDifferingSizes is an output parameter which, if forming a tail call | ||
| 122 | /// is permitted, determines whether it's permitted only if the size of the | ||
| 123 | /// caller's and callee's return types match exactly. | ||
| 124 | bool attributesPermitTailCall(const Function *F, const Instruction *I, | ||
| 125 | const ReturnInst *Ret, | ||
| 126 | const TargetLoweringBase &TLI, | ||
| 127 | bool *AllowDifferingSizes = nullptr); | ||
| 128 | |||
| 129 | /// Test if given that the input instruction is in the tail call position if the | ||
| 130 | /// return type or any attributes of the function will inhibit tail call | ||
| 131 | /// optimization. | ||
| 132 | bool returnTypeIsEligibleForTailCall(const Function *F, const Instruction *I, | ||
| 133 | const ReturnInst *Ret, | ||
| 134 | const TargetLoweringBase &TLI); | ||
| 135 | |||
| 136 | DenseMap<const MachineBasicBlock *, int> | ||
| 137 | getEHScopeMembership(const MachineFunction &MF); | ||
| 138 | |||
| 139 | } // End llvm namespace | ||
| 140 | |||
| 141 | #endif |