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14 | pmbaty | 1 | //===- llvm/BinaryFormat/ELF.h - ELF constants and structures ---*- C++ -*-===// |
2 | // |
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3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
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4 | // See https://llvm.org/LICENSE.txt for license information. |
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5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
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6 | // |
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7 | //===----------------------------------------------------------------------===// |
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8 | // |
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9 | // This header contains common, non-processor-specific data structures and |
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10 | // constants for the ELF file format. |
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11 | // |
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12 | // The details of the ELF32 bits in this file are largely based on the Tool |
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13 | // Interface Standard (TIS) Executable and Linking Format (ELF) Specification |
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14 | // Version 1.2, May 1995. The ELF64 stuff is based on ELF-64 Object File Format |
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15 | // Version 1.5, Draft 2, May 1998 as well as OpenBSD header files. |
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16 | // |
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17 | //===----------------------------------------------------------------------===// |
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18 | |||
19 | #ifndef LLVM_BINARYFORMAT_ELF_H |
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20 | #define LLVM_BINARYFORMAT_ELF_H |
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21 | |||
22 | #include "llvm/ADT/StringRef.h" |
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23 | #include <cstdint> |
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24 | #include <cstring> |
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25 | |||
26 | namespace llvm { |
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27 | namespace ELF { |
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28 | |||
29 | using Elf32_Addr = uint32_t; // Program address |
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30 | using Elf32_Off = uint32_t; // File offset |
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31 | using Elf32_Half = uint16_t; |
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32 | using Elf32_Word = uint32_t; |
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33 | using Elf32_Sword = int32_t; |
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34 | |||
35 | using Elf64_Addr = uint64_t; |
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36 | using Elf64_Off = uint64_t; |
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37 | using Elf64_Half = uint16_t; |
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38 | using Elf64_Word = uint32_t; |
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39 | using Elf64_Sword = int32_t; |
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40 | using Elf64_Xword = uint64_t; |
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41 | using Elf64_Sxword = int64_t; |
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42 | |||
43 | // Object file magic string. |
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44 | static const char ElfMagic[] = {0x7f, 'E', 'L', 'F', '\0'}; |
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45 | |||
46 | // e_ident size and indices. |
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47 | enum { |
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48 | EI_MAG0 = 0, // File identification index. |
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49 | EI_MAG1 = 1, // File identification index. |
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50 | EI_MAG2 = 2, // File identification index. |
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51 | EI_MAG3 = 3, // File identification index. |
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52 | EI_CLASS = 4, // File class. |
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53 | EI_DATA = 5, // Data encoding. |
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54 | EI_VERSION = 6, // File version. |
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55 | EI_OSABI = 7, // OS/ABI identification. |
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56 | EI_ABIVERSION = 8, // ABI version. |
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57 | EI_PAD = 9, // Start of padding bytes. |
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58 | EI_NIDENT = 16 // Number of bytes in e_ident. |
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59 | }; |
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60 | |||
61 | struct Elf32_Ehdr { |
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62 | unsigned char e_ident[EI_NIDENT]; // ELF Identification bytes |
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63 | Elf32_Half e_type; // Type of file (see ET_* below) |
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64 | Elf32_Half e_machine; // Required architecture for this file (see EM_*) |
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65 | Elf32_Word e_version; // Must be equal to 1 |
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66 | Elf32_Addr e_entry; // Address to jump to in order to start program |
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67 | Elf32_Off e_phoff; // Program header table's file offset, in bytes |
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68 | Elf32_Off e_shoff; // Section header table's file offset, in bytes |
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69 | Elf32_Word e_flags; // Processor-specific flags |
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70 | Elf32_Half e_ehsize; // Size of ELF header, in bytes |
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71 | Elf32_Half e_phentsize; // Size of an entry in the program header table |
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72 | Elf32_Half e_phnum; // Number of entries in the program header table |
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73 | Elf32_Half e_shentsize; // Size of an entry in the section header table |
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74 | Elf32_Half e_shnum; // Number of entries in the section header table |
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75 | Elf32_Half e_shstrndx; // Sect hdr table index of sect name string table |
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76 | |||
77 | bool checkMagic() const { |
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78 | return (memcmp(e_ident, ElfMagic, strlen(ElfMagic))) == 0; |
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79 | } |
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80 | |||
81 | unsigned char getFileClass() const { return e_ident[EI_CLASS]; } |
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82 | unsigned char getDataEncoding() const { return e_ident[EI_DATA]; } |
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83 | }; |
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84 | |||
85 | // 64-bit ELF header. Fields are the same as for ELF32, but with different |
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86 | // types (see above). |
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87 | struct Elf64_Ehdr { |
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88 | unsigned char e_ident[EI_NIDENT]; |
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89 | Elf64_Half e_type; |
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90 | Elf64_Half e_machine; |
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91 | Elf64_Word e_version; |
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92 | Elf64_Addr e_entry; |
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93 | Elf64_Off e_phoff; |
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94 | Elf64_Off e_shoff; |
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95 | Elf64_Word e_flags; |
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96 | Elf64_Half e_ehsize; |
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97 | Elf64_Half e_phentsize; |
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98 | Elf64_Half e_phnum; |
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99 | Elf64_Half e_shentsize; |
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100 | Elf64_Half e_shnum; |
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101 | Elf64_Half e_shstrndx; |
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102 | |||
103 | bool checkMagic() const { |
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104 | return (memcmp(e_ident, ElfMagic, strlen(ElfMagic))) == 0; |
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105 | } |
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106 | |||
107 | unsigned char getFileClass() const { return e_ident[EI_CLASS]; } |
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108 | unsigned char getDataEncoding() const { return e_ident[EI_DATA]; } |
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109 | }; |
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110 | |||
111 | // File types. |
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112 | // See current registered ELF types at: |
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113 | // http://www.sco.com/developers/gabi/latest/ch4.eheader.html |
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114 | enum { |
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115 | ET_NONE = 0, // No file type |
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116 | ET_REL = 1, // Relocatable file |
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117 | ET_EXEC = 2, // Executable file |
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118 | ET_DYN = 3, // Shared object file |
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119 | ET_CORE = 4, // Core file |
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120 | ET_LOOS = 0xfe00, // Beginning of operating system-specific codes |
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121 | ET_HIOS = 0xfeff, // Operating system-specific |
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122 | ET_LOPROC = 0xff00, // Beginning of processor-specific codes |
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123 | ET_HIPROC = 0xffff // Processor-specific |
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124 | }; |
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125 | |||
126 | // Versioning |
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127 | enum { EV_NONE = 0, EV_CURRENT = 1 }; |
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128 | |||
129 | // Machine architectures |
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130 | // See current registered ELF machine architectures at: |
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131 | // http://www.uxsglobal.com/developers/gabi/latest/ch4.eheader.html |
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132 | enum { |
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133 | EM_NONE = 0, // No machine |
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134 | EM_M32 = 1, // AT&T WE 32100 |
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135 | EM_SPARC = 2, // SPARC |
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136 | EM_386 = 3, // Intel 386 |
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137 | EM_68K = 4, // Motorola 68000 |
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138 | EM_88K = 5, // Motorola 88000 |
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139 | EM_IAMCU = 6, // Intel MCU |
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140 | EM_860 = 7, // Intel 80860 |
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141 | EM_MIPS = 8, // MIPS R3000 |
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142 | EM_S370 = 9, // IBM System/370 |
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143 | EM_MIPS_RS3_LE = 10, // MIPS RS3000 Little-endian |
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144 | EM_PARISC = 15, // Hewlett-Packard PA-RISC |
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145 | EM_VPP500 = 17, // Fujitsu VPP500 |
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146 | EM_SPARC32PLUS = 18, // Enhanced instruction set SPARC |
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147 | EM_960 = 19, // Intel 80960 |
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148 | EM_PPC = 20, // PowerPC |
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149 | EM_PPC64 = 21, // PowerPC64 |
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150 | EM_S390 = 22, // IBM System/390 |
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151 | EM_SPU = 23, // IBM SPU/SPC |
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152 | EM_V800 = 36, // NEC V800 |
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153 | EM_FR20 = 37, // Fujitsu FR20 |
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154 | EM_RH32 = 38, // TRW RH-32 |
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155 | EM_RCE = 39, // Motorola RCE |
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156 | EM_ARM = 40, // ARM |
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157 | EM_ALPHA = 41, // DEC Alpha |
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158 | EM_SH = 42, // Hitachi SH |
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159 | EM_SPARCV9 = 43, // SPARC V9 |
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160 | EM_TRICORE = 44, // Siemens TriCore |
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161 | EM_ARC = 45, // Argonaut RISC Core |
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162 | EM_H8_300 = 46, // Hitachi H8/300 |
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163 | EM_H8_300H = 47, // Hitachi H8/300H |
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164 | EM_H8S = 48, // Hitachi H8S |
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165 | EM_H8_500 = 49, // Hitachi H8/500 |
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166 | EM_IA_64 = 50, // Intel IA-64 processor architecture |
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167 | EM_MIPS_X = 51, // Stanford MIPS-X |
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168 | EM_COLDFIRE = 52, // Motorola ColdFire |
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169 | EM_68HC12 = 53, // Motorola M68HC12 |
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170 | EM_MMA = 54, // Fujitsu MMA Multimedia Accelerator |
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171 | EM_PCP = 55, // Siemens PCP |
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172 | EM_NCPU = 56, // Sony nCPU embedded RISC processor |
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173 | EM_NDR1 = 57, // Denso NDR1 microprocessor |
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174 | EM_STARCORE = 58, // Motorola Star*Core processor |
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175 | EM_ME16 = 59, // Toyota ME16 processor |
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176 | EM_ST100 = 60, // STMicroelectronics ST100 processor |
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177 | EM_TINYJ = 61, // Advanced Logic Corp. TinyJ embedded processor family |
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178 | EM_X86_64 = 62, // AMD x86-64 architecture |
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179 | EM_PDSP = 63, // Sony DSP Processor |
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180 | EM_PDP10 = 64, // Digital Equipment Corp. PDP-10 |
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181 | EM_PDP11 = 65, // Digital Equipment Corp. PDP-11 |
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182 | EM_FX66 = 66, // Siemens FX66 microcontroller |
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183 | EM_ST9PLUS = 67, // STMicroelectronics ST9+ 8/16 bit microcontroller |
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184 | EM_ST7 = 68, // STMicroelectronics ST7 8-bit microcontroller |
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185 | EM_68HC16 = 69, // Motorola MC68HC16 Microcontroller |
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186 | EM_68HC11 = 70, // Motorola MC68HC11 Microcontroller |
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187 | EM_68HC08 = 71, // Motorola MC68HC08 Microcontroller |
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188 | EM_68HC05 = 72, // Motorola MC68HC05 Microcontroller |
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189 | EM_SVX = 73, // Silicon Graphics SVx |
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190 | EM_ST19 = 74, // STMicroelectronics ST19 8-bit microcontroller |
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191 | EM_VAX = 75, // Digital VAX |
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192 | EM_CRIS = 76, // Axis Communications 32-bit embedded processor |
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193 | EM_JAVELIN = 77, // Infineon Technologies 32-bit embedded processor |
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194 | EM_FIREPATH = 78, // Element 14 64-bit DSP Processor |
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195 | EM_ZSP = 79, // LSI Logic 16-bit DSP Processor |
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196 | EM_MMIX = 80, // Donald Knuth's educational 64-bit processor |
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197 | EM_HUANY = 81, // Harvard University machine-independent object files |
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198 | EM_PRISM = 82, // SiTera Prism |
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199 | EM_AVR = 83, // Atmel AVR 8-bit microcontroller |
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200 | EM_FR30 = 84, // Fujitsu FR30 |
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201 | EM_D10V = 85, // Mitsubishi D10V |
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202 | EM_D30V = 86, // Mitsubishi D30V |
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203 | EM_V850 = 87, // NEC v850 |
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204 | EM_M32R = 88, // Mitsubishi M32R |
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205 | EM_MN10300 = 89, // Matsushita MN10300 |
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206 | EM_MN10200 = 90, // Matsushita MN10200 |
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207 | EM_PJ = 91, // picoJava |
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208 | EM_OPENRISC = 92, // OpenRISC 32-bit embedded processor |
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209 | EM_ARC_COMPACT = 93, // ARC International ARCompact processor (old |
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210 | // spelling/synonym: EM_ARC_A5) |
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211 | EM_XTENSA = 94, // Tensilica Xtensa Architecture |
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212 | EM_VIDEOCORE = 95, // Alphamosaic VideoCore processor |
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213 | EM_TMM_GPP = 96, // Thompson Multimedia General Purpose Processor |
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214 | EM_NS32K = 97, // National Semiconductor 32000 series |
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215 | EM_TPC = 98, // Tenor Network TPC processor |
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216 | EM_SNP1K = 99, // Trebia SNP 1000 processor |
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217 | EM_ST200 = 100, // STMicroelectronics (www.st.com) ST200 |
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218 | EM_IP2K = 101, // Ubicom IP2xxx microcontroller family |
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219 | EM_MAX = 102, // MAX Processor |
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220 | EM_CR = 103, // National Semiconductor CompactRISC microprocessor |
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221 | EM_F2MC16 = 104, // Fujitsu F2MC16 |
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222 | EM_MSP430 = 105, // Texas Instruments embedded microcontroller msp430 |
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223 | EM_BLACKFIN = 106, // Analog Devices Blackfin (DSP) processor |
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224 | EM_SE_C33 = 107, // S1C33 Family of Seiko Epson processors |
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225 | EM_SEP = 108, // Sharp embedded microprocessor |
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226 | EM_ARCA = 109, // Arca RISC Microprocessor |
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227 | EM_UNICORE = 110, // Microprocessor series from PKU-Unity Ltd. and MPRC |
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228 | // of Peking University |
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229 | EM_EXCESS = 111, // eXcess: 16/32/64-bit configurable embedded CPU |
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230 | EM_DXP = 112, // Icera Semiconductor Inc. Deep Execution Processor |
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231 | EM_ALTERA_NIOS2 = 113, // Altera Nios II soft-core processor |
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232 | EM_CRX = 114, // National Semiconductor CompactRISC CRX |
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233 | EM_XGATE = 115, // Motorola XGATE embedded processor |
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234 | EM_C166 = 116, // Infineon C16x/XC16x processor |
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235 | EM_M16C = 117, // Renesas M16C series microprocessors |
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236 | EM_DSPIC30F = 118, // Microchip Technology dsPIC30F Digital Signal |
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237 | // Controller |
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238 | EM_CE = 119, // Freescale Communication Engine RISC core |
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239 | EM_M32C = 120, // Renesas M32C series microprocessors |
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240 | EM_TSK3000 = 131, // Altium TSK3000 core |
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241 | EM_RS08 = 132, // Freescale RS08 embedded processor |
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242 | EM_SHARC = 133, // Analog Devices SHARC family of 32-bit DSP |
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243 | // processors |
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244 | EM_ECOG2 = 134, // Cyan Technology eCOG2 microprocessor |
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245 | EM_SCORE7 = 135, // Sunplus S+core7 RISC processor |
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246 | EM_DSP24 = 136, // New Japan Radio (NJR) 24-bit DSP Processor |
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247 | EM_VIDEOCORE3 = 137, // Broadcom VideoCore III processor |
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248 | EM_LATTICEMICO32 = 138, // RISC processor for Lattice FPGA architecture |
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249 | EM_SE_C17 = 139, // Seiko Epson C17 family |
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250 | EM_TI_C6000 = 140, // The Texas Instruments TMS320C6000 DSP family |
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251 | EM_TI_C2000 = 141, // The Texas Instruments TMS320C2000 DSP family |
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252 | EM_TI_C5500 = 142, // The Texas Instruments TMS320C55x DSP family |
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253 | EM_MMDSP_PLUS = 160, // STMicroelectronics 64bit VLIW Data Signal Processor |
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254 | EM_CYPRESS_M8C = 161, // Cypress M8C microprocessor |
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255 | EM_R32C = 162, // Renesas R32C series microprocessors |
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256 | EM_TRIMEDIA = 163, // NXP Semiconductors TriMedia architecture family |
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257 | EM_HEXAGON = 164, // Qualcomm Hexagon processor |
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258 | EM_8051 = 165, // Intel 8051 and variants |
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259 | EM_STXP7X = 166, // STMicroelectronics STxP7x family of configurable |
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260 | // and extensible RISC processors |
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261 | EM_NDS32 = 167, // Andes Technology compact code size embedded RISC |
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262 | // processor family |
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263 | EM_ECOG1 = 168, // Cyan Technology eCOG1X family |
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264 | EM_ECOG1X = 168, // Cyan Technology eCOG1X family |
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265 | EM_MAXQ30 = 169, // Dallas Semiconductor MAXQ30 Core Micro-controllers |
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266 | EM_XIMO16 = 170, // New Japan Radio (NJR) 16-bit DSP Processor |
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267 | EM_MANIK = 171, // M2000 Reconfigurable RISC Microprocessor |
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268 | EM_CRAYNV2 = 172, // Cray Inc. NV2 vector architecture |
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269 | EM_RX = 173, // Renesas RX family |
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270 | EM_METAG = 174, // Imagination Technologies META processor |
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271 | // architecture |
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272 | EM_MCST_ELBRUS = 175, // MCST Elbrus general purpose hardware architecture |
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273 | EM_ECOG16 = 176, // Cyan Technology eCOG16 family |
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274 | EM_CR16 = 177, // National Semiconductor CompactRISC CR16 16-bit |
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275 | // microprocessor |
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276 | EM_ETPU = 178, // Freescale Extended Time Processing Unit |
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277 | EM_SLE9X = 179, // Infineon Technologies SLE9X core |
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278 | EM_L10M = 180, // Intel L10M |
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279 | EM_K10M = 181, // Intel K10M |
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280 | EM_AARCH64 = 183, // ARM AArch64 |
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281 | EM_AVR32 = 185, // Atmel Corporation 32-bit microprocessor family |
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282 | EM_STM8 = 186, // STMicroeletronics STM8 8-bit microcontroller |
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283 | EM_TILE64 = 187, // Tilera TILE64 multicore architecture family |
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284 | EM_TILEPRO = 188, // Tilera TILEPro multicore architecture family |
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285 | EM_MICROBLAZE = 189, // Xilinx MicroBlaze 32-bit RISC soft processor core |
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286 | EM_CUDA = 190, // NVIDIA CUDA architecture |
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287 | EM_TILEGX = 191, // Tilera TILE-Gx multicore architecture family |
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288 | EM_CLOUDSHIELD = 192, // CloudShield architecture family |
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289 | EM_COREA_1ST = 193, // KIPO-KAIST Core-A 1st generation processor family |
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290 | EM_COREA_2ND = 194, // KIPO-KAIST Core-A 2nd generation processor family |
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291 | EM_ARC_COMPACT2 = 195, // Synopsys ARCompact V2 |
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292 | EM_OPEN8 = 196, // Open8 8-bit RISC soft processor core |
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293 | EM_RL78 = 197, // Renesas RL78 family |
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294 | EM_VIDEOCORE5 = 198, // Broadcom VideoCore V processor |
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295 | EM_78KOR = 199, // Renesas 78KOR family |
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296 | EM_56800EX = 200, // Freescale 56800EX Digital Signal Controller (DSC) |
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297 | EM_BA1 = 201, // Beyond BA1 CPU architecture |
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298 | EM_BA2 = 202, // Beyond BA2 CPU architecture |
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299 | EM_XCORE = 203, // XMOS xCORE processor family |
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300 | EM_MCHP_PIC = 204, // Microchip 8-bit PIC(r) family |
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301 | EM_INTEL205 = 205, // Reserved by Intel |
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302 | EM_INTEL206 = 206, // Reserved by Intel |
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303 | EM_INTEL207 = 207, // Reserved by Intel |
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304 | EM_INTEL208 = 208, // Reserved by Intel |
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305 | EM_INTEL209 = 209, // Reserved by Intel |
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306 | EM_KM32 = 210, // KM211 KM32 32-bit processor |
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307 | EM_KMX32 = 211, // KM211 KMX32 32-bit processor |
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308 | EM_KMX16 = 212, // KM211 KMX16 16-bit processor |
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309 | EM_KMX8 = 213, // KM211 KMX8 8-bit processor |
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310 | EM_KVARC = 214, // KM211 KVARC processor |
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311 | EM_CDP = 215, // Paneve CDP architecture family |
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312 | EM_COGE = 216, // Cognitive Smart Memory Processor |
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313 | EM_COOL = 217, // iCelero CoolEngine |
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314 | EM_NORC = 218, // Nanoradio Optimized RISC |
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315 | EM_CSR_KALIMBA = 219, // CSR Kalimba architecture family |
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316 | EM_AMDGPU = 224, // AMD GPU architecture |
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317 | EM_RISCV = 243, // RISC-V |
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318 | EM_LANAI = 244, // Lanai 32-bit processor |
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319 | EM_BPF = 247, // Linux kernel bpf virtual machine |
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320 | EM_VE = 251, // NEC SX-Aurora VE |
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321 | EM_CSKY = 252, // C-SKY 32-bit processor |
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322 | EM_LOONGARCH = 258, // LoongArch |
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323 | }; |
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324 | |||
325 | // Object file classes. |
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326 | enum { |
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327 | ELFCLASSNONE = 0, |
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328 | ELFCLASS32 = 1, // 32-bit object file |
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329 | ELFCLASS64 = 2 // 64-bit object file |
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330 | }; |
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331 | |||
332 | // Object file byte orderings. |
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333 | enum { |
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334 | ELFDATANONE = 0, // Invalid data encoding. |
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335 | ELFDATA2LSB = 1, // Little-endian object file |
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336 | ELFDATA2MSB = 2 // Big-endian object file |
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337 | }; |
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338 | |||
339 | // OS ABI identification. |
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340 | enum { |
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341 | ELFOSABI_NONE = 0, // UNIX System V ABI |
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342 | ELFOSABI_HPUX = 1, // HP-UX operating system |
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343 | ELFOSABI_NETBSD = 2, // NetBSD |
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344 | ELFOSABI_GNU = 3, // GNU/Linux |
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345 | ELFOSABI_LINUX = 3, // Historical alias for ELFOSABI_GNU. |
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346 | ELFOSABI_HURD = 4, // GNU/Hurd |
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347 | ELFOSABI_SOLARIS = 6, // Solaris |
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348 | ELFOSABI_AIX = 7, // AIX |
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349 | ELFOSABI_IRIX = 8, // IRIX |
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350 | ELFOSABI_FREEBSD = 9, // FreeBSD |
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351 | ELFOSABI_TRU64 = 10, // TRU64 UNIX |
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352 | ELFOSABI_MODESTO = 11, // Novell Modesto |
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353 | ELFOSABI_OPENBSD = 12, // OpenBSD |
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354 | ELFOSABI_OPENVMS = 13, // OpenVMS |
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355 | ELFOSABI_NSK = 14, // Hewlett-Packard Non-Stop Kernel |
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356 | ELFOSABI_AROS = 15, // AROS |
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357 | ELFOSABI_FENIXOS = 16, // FenixOS |
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358 | ELFOSABI_CLOUDABI = 17, // Nuxi CloudABI |
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359 | ELFOSABI_FIRST_ARCH = 64, // First architecture-specific OS ABI |
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360 | ELFOSABI_AMDGPU_HSA = 64, // AMD HSA runtime |
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361 | ELFOSABI_AMDGPU_PAL = 65, // AMD PAL runtime |
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362 | ELFOSABI_AMDGPU_MESA3D = 66, // AMD GCN GPUs (GFX6+) for MESA runtime |
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363 | ELFOSABI_ARM = 97, // ARM |
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364 | ELFOSABI_C6000_ELFABI = 64, // Bare-metal TMS320C6000 |
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365 | ELFOSABI_C6000_LINUX = 65, // Linux TMS320C6000 |
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366 | ELFOSABI_STANDALONE = 255, // Standalone (embedded) application |
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367 | ELFOSABI_LAST_ARCH = 255 // Last Architecture-specific OS ABI |
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368 | }; |
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369 | |||
370 | // AMDGPU OS ABI Version identification. |
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371 | enum { |
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372 | // ELFABIVERSION_AMDGPU_HSA_V1 does not exist because OS ABI identification |
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373 | // was never defined for V1. |
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374 | ELFABIVERSION_AMDGPU_HSA_V2 = 0, |
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375 | ELFABIVERSION_AMDGPU_HSA_V3 = 1, |
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376 | ELFABIVERSION_AMDGPU_HSA_V4 = 2, |
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377 | ELFABIVERSION_AMDGPU_HSA_V5 = 3 |
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378 | }; |
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379 | |||
380 | #define ELF_RELOC(name, value) name = value, |
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381 | |||
382 | // X86_64 relocations. |
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383 | enum { |
||
384 | #include "ELFRelocs/x86_64.def" |
||
385 | }; |
||
386 | |||
387 | // i386 relocations. |
||
388 | enum { |
||
389 | #include "ELFRelocs/i386.def" |
||
390 | }; |
||
391 | |||
392 | // ELF Relocation types for PPC32 |
||
393 | enum { |
||
394 | #include "ELFRelocs/PowerPC.def" |
||
395 | }; |
||
396 | |||
397 | // Specific e_flags for PPC64 |
||
398 | enum { |
||
399 | // e_flags bits specifying ABI: |
||
400 | // 1 for original ABI using function descriptors, |
||
401 | // 2 for revised ABI without function descriptors, |
||
402 | // 0 for unspecified or not using any features affected by the differences. |
||
403 | EF_PPC64_ABI = 3 |
||
404 | }; |
||
405 | |||
406 | // Special values for the st_other field in the symbol table entry for PPC64. |
||
407 | enum { |
||
408 | STO_PPC64_LOCAL_BIT = 5, |
||
409 | STO_PPC64_LOCAL_MASK = (7 << STO_PPC64_LOCAL_BIT) |
||
410 | }; |
||
411 | static inline int64_t decodePPC64LocalEntryOffset(unsigned Other) { |
||
412 | unsigned Val = (Other & STO_PPC64_LOCAL_MASK) >> STO_PPC64_LOCAL_BIT; |
||
413 | return ((1 << Val) >> 2) << 2; |
||
414 | } |
||
415 | |||
416 | // ELF Relocation types for PPC64 |
||
417 | enum { |
||
418 | #include "ELFRelocs/PowerPC64.def" |
||
419 | }; |
||
420 | |||
421 | // ELF Relocation types for AArch64 |
||
422 | enum { |
||
423 | #include "ELFRelocs/AArch64.def" |
||
424 | }; |
||
425 | |||
426 | // Special values for the st_other field in the symbol table entry for AArch64. |
||
427 | enum { |
||
428 | // Symbol may follow different calling convention than base PCS. |
||
429 | STO_AARCH64_VARIANT_PCS = 0x80 |
||
430 | }; |
||
431 | |||
432 | // ARM Specific e_flags |
||
433 | enum : unsigned { |
||
434 | EF_ARM_SOFT_FLOAT = 0x00000200U, // Legacy pre EABI_VER5 |
||
435 | EF_ARM_ABI_FLOAT_SOFT = 0x00000200U, // EABI_VER5 |
||
436 | EF_ARM_VFP_FLOAT = 0x00000400U, // Legacy pre EABI_VER5 |
||
437 | EF_ARM_ABI_FLOAT_HARD = 0x00000400U, // EABI_VER5 |
||
438 | EF_ARM_BE8 = 0x00800000U, |
||
439 | EF_ARM_EABI_UNKNOWN = 0x00000000U, |
||
440 | EF_ARM_EABI_VER1 = 0x01000000U, |
||
441 | EF_ARM_EABI_VER2 = 0x02000000U, |
||
442 | EF_ARM_EABI_VER3 = 0x03000000U, |
||
443 | EF_ARM_EABI_VER4 = 0x04000000U, |
||
444 | EF_ARM_EABI_VER5 = 0x05000000U, |
||
445 | EF_ARM_EABIMASK = 0xFF000000U |
||
446 | }; |
||
447 | |||
448 | // ELF Relocation types for ARM |
||
449 | enum { |
||
450 | #include "ELFRelocs/ARM.def" |
||
451 | }; |
||
452 | |||
453 | // ARC Specific e_flags |
||
454 | enum : unsigned { |
||
455 | EF_ARC_MACH_MSK = 0x000000ff, |
||
456 | EF_ARC_OSABI_MSK = 0x00000f00, |
||
457 | E_ARC_MACH_ARC600 = 0x00000002, |
||
458 | E_ARC_MACH_ARC601 = 0x00000004, |
||
459 | E_ARC_MACH_ARC700 = 0x00000003, |
||
460 | EF_ARC_CPU_ARCV2EM = 0x00000005, |
||
461 | EF_ARC_CPU_ARCV2HS = 0x00000006, |
||
462 | E_ARC_OSABI_ORIG = 0x00000000, |
||
463 | E_ARC_OSABI_V2 = 0x00000200, |
||
464 | E_ARC_OSABI_V3 = 0x00000300, |
||
465 | E_ARC_OSABI_V4 = 0x00000400, |
||
466 | EF_ARC_PIC = 0x00000100 |
||
467 | }; |
||
468 | |||
469 | // ELF Relocation types for ARC |
||
470 | enum { |
||
471 | #include "ELFRelocs/ARC.def" |
||
472 | }; |
||
473 | |||
474 | // AVR specific e_flags |
||
475 | enum : unsigned { |
||
476 | EF_AVR_ARCH_AVR1 = 1, |
||
477 | EF_AVR_ARCH_AVR2 = 2, |
||
478 | EF_AVR_ARCH_AVR25 = 25, |
||
479 | EF_AVR_ARCH_AVR3 = 3, |
||
480 | EF_AVR_ARCH_AVR31 = 31, |
||
481 | EF_AVR_ARCH_AVR35 = 35, |
||
482 | EF_AVR_ARCH_AVR4 = 4, |
||
483 | EF_AVR_ARCH_AVR5 = 5, |
||
484 | EF_AVR_ARCH_AVR51 = 51, |
||
485 | EF_AVR_ARCH_AVR6 = 6, |
||
486 | EF_AVR_ARCH_AVRTINY = 100, |
||
487 | EF_AVR_ARCH_XMEGA1 = 101, |
||
488 | EF_AVR_ARCH_XMEGA2 = 102, |
||
489 | EF_AVR_ARCH_XMEGA3 = 103, |
||
490 | EF_AVR_ARCH_XMEGA4 = 104, |
||
491 | EF_AVR_ARCH_XMEGA5 = 105, |
||
492 | EF_AVR_ARCH_XMEGA6 = 106, |
||
493 | EF_AVR_ARCH_XMEGA7 = 107, |
||
494 | |||
495 | EF_AVR_ARCH_MASK = 0x7f, // EF_AVR_ARCH_xxx selection mask |
||
496 | |||
497 | EF_AVR_LINKRELAX_PREPARED = 0x80, // The file is prepared for linker |
||
498 | // relaxation to be applied |
||
499 | }; |
||
500 | |||
501 | // ELF Relocation types for AVR |
||
502 | enum { |
||
503 | #include "ELFRelocs/AVR.def" |
||
504 | }; |
||
505 | |||
506 | // Mips Specific e_flags |
||
507 | enum : unsigned { |
||
508 | EF_MIPS_NOREORDER = 0x00000001, // Don't reorder instructions |
||
509 | EF_MIPS_PIC = 0x00000002, // Position independent code |
||
510 | EF_MIPS_CPIC = 0x00000004, // Call object with Position independent code |
||
511 | EF_MIPS_ABI2 = 0x00000020, // File uses N32 ABI |
||
512 | EF_MIPS_32BITMODE = 0x00000100, // Code compiled for a 64-bit machine |
||
513 | // in 32-bit mode |
||
514 | EF_MIPS_FP64 = 0x00000200, // Code compiled for a 32-bit machine |
||
515 | // but uses 64-bit FP registers |
||
516 | EF_MIPS_NAN2008 = 0x00000400, // Uses IEE 754-2008 NaN encoding |
||
517 | |||
518 | // ABI flags |
||
519 | EF_MIPS_ABI_O32 = 0x00001000, // This file follows the first MIPS 32 bit ABI |
||
520 | EF_MIPS_ABI_O64 = 0x00002000, // O32 ABI extended for 64-bit architecture. |
||
521 | EF_MIPS_ABI_EABI32 = 0x00003000, // EABI in 32 bit mode. |
||
522 | EF_MIPS_ABI_EABI64 = 0x00004000, // EABI in 64 bit mode. |
||
523 | EF_MIPS_ABI = 0x0000f000, // Mask for selecting EF_MIPS_ABI_ variant. |
||
524 | |||
525 | // MIPS machine variant |
||
526 | EF_MIPS_MACH_NONE = 0x00000000, // A standard MIPS implementation. |
||
527 | EF_MIPS_MACH_3900 = 0x00810000, // Toshiba R3900 |
||
528 | EF_MIPS_MACH_4010 = 0x00820000, // LSI R4010 |
||
529 | EF_MIPS_MACH_4100 = 0x00830000, // NEC VR4100 |
||
530 | EF_MIPS_MACH_4650 = 0x00850000, // MIPS R4650 |
||
531 | EF_MIPS_MACH_4120 = 0x00870000, // NEC VR4120 |
||
532 | EF_MIPS_MACH_4111 = 0x00880000, // NEC VR4111/VR4181 |
||
533 | EF_MIPS_MACH_SB1 = 0x008a0000, // Broadcom SB-1 |
||
534 | EF_MIPS_MACH_OCTEON = 0x008b0000, // Cavium Networks Octeon |
||
535 | EF_MIPS_MACH_XLR = 0x008c0000, // RMI Xlr |
||
536 | EF_MIPS_MACH_OCTEON2 = 0x008d0000, // Cavium Networks Octeon2 |
||
537 | EF_MIPS_MACH_OCTEON3 = 0x008e0000, // Cavium Networks Octeon3 |
||
538 | EF_MIPS_MACH_5400 = 0x00910000, // NEC VR5400 |
||
539 | EF_MIPS_MACH_5900 = 0x00920000, // MIPS R5900 |
||
540 | EF_MIPS_MACH_5500 = 0x00980000, // NEC VR5500 |
||
541 | EF_MIPS_MACH_9000 = 0x00990000, // Unknown |
||
542 | EF_MIPS_MACH_LS2E = 0x00a00000, // ST Microelectronics Loongson 2E |
||
543 | EF_MIPS_MACH_LS2F = 0x00a10000, // ST Microelectronics Loongson 2F |
||
544 | EF_MIPS_MACH_LS3A = 0x00a20000, // Loongson 3A |
||
545 | EF_MIPS_MACH = 0x00ff0000, // EF_MIPS_MACH_xxx selection mask |
||
546 | |||
547 | // ARCH_ASE |
||
548 | EF_MIPS_MICROMIPS = 0x02000000, // microMIPS |
||
549 | EF_MIPS_ARCH_ASE_M16 = 0x04000000, // Has Mips-16 ISA extensions |
||
550 | EF_MIPS_ARCH_ASE_MDMX = 0x08000000, // Has MDMX multimedia extensions |
||
551 | EF_MIPS_ARCH_ASE = 0x0f000000, // Mask for EF_MIPS_ARCH_ASE_xxx flags |
||
552 | |||
553 | // ARCH |
||
554 | EF_MIPS_ARCH_1 = 0x00000000, // MIPS1 instruction set |
||
555 | EF_MIPS_ARCH_2 = 0x10000000, // MIPS2 instruction set |
||
556 | EF_MIPS_ARCH_3 = 0x20000000, // MIPS3 instruction set |
||
557 | EF_MIPS_ARCH_4 = 0x30000000, // MIPS4 instruction set |
||
558 | EF_MIPS_ARCH_5 = 0x40000000, // MIPS5 instruction set |
||
559 | EF_MIPS_ARCH_32 = 0x50000000, // MIPS32 instruction set per linux not elf.h |
||
560 | EF_MIPS_ARCH_64 = 0x60000000, // MIPS64 instruction set per linux not elf.h |
||
561 | EF_MIPS_ARCH_32R2 = 0x70000000, // mips32r2, mips32r3, mips32r5 |
||
562 | EF_MIPS_ARCH_64R2 = 0x80000000, // mips64r2, mips64r3, mips64r5 |
||
563 | EF_MIPS_ARCH_32R6 = 0x90000000, // mips32r6 |
||
564 | EF_MIPS_ARCH_64R6 = 0xa0000000, // mips64r6 |
||
565 | EF_MIPS_ARCH = 0xf0000000 // Mask for applying EF_MIPS_ARCH_ variant |
||
566 | }; |
||
567 | |||
568 | // MIPS-specific section indexes |
||
569 | enum { |
||
570 | SHN_MIPS_ACOMMON = 0xff00, // Common symbols which are defined and allocated |
||
571 | SHN_MIPS_TEXT = 0xff01, // Not ABI compliant |
||
572 | SHN_MIPS_DATA = 0xff02, // Not ABI compliant |
||
573 | SHN_MIPS_SCOMMON = 0xff03, // Common symbols for global data area |
||
574 | SHN_MIPS_SUNDEFINED = 0xff04 // Undefined symbols for global data area |
||
575 | }; |
||
576 | |||
577 | // ELF Relocation types for Mips |
||
578 | enum { |
||
579 | #include "ELFRelocs/Mips.def" |
||
580 | }; |
||
581 | |||
582 | // Special values for the st_other field in the symbol table entry for MIPS. |
||
583 | enum { |
||
584 | STO_MIPS_OPTIONAL = 0x04, // Symbol whose definition is optional |
||
585 | STO_MIPS_PLT = 0x08, // PLT entry related dynamic table record |
||
586 | STO_MIPS_PIC = 0x20, // PIC func in an object mixes PIC/non-PIC |
||
587 | STO_MIPS_MICROMIPS = 0x80, // MIPS Specific ISA for MicroMips |
||
588 | STO_MIPS_MIPS16 = 0xf0 // MIPS Specific ISA for Mips16 |
||
589 | }; |
||
590 | |||
591 | // .MIPS.options section descriptor kinds |
||
592 | enum { |
||
593 | ODK_NULL = 0, // Undefined |
||
594 | ODK_REGINFO = 1, // Register usage information |
||
595 | ODK_EXCEPTIONS = 2, // Exception processing options |
||
596 | ODK_PAD = 3, // Section padding options |
||
597 | ODK_HWPATCH = 4, // Hardware patches applied |
||
598 | ODK_FILL = 5, // Linker fill value |
||
599 | ODK_TAGS = 6, // Space for tool identification |
||
600 | ODK_HWAND = 7, // Hardware AND patches applied |
||
601 | ODK_HWOR = 8, // Hardware OR patches applied |
||
602 | ODK_GP_GROUP = 9, // GP group to use for text/data sections |
||
603 | ODK_IDENT = 10, // ID information |
||
604 | ODK_PAGESIZE = 11 // Page size information |
||
605 | }; |
||
606 | |||
607 | // Hexagon-specific e_flags |
||
608 | enum { |
||
609 | // Object processor version flags, bits[11:0] |
||
610 | EF_HEXAGON_MACH_V2 = 0x00000001, // Hexagon V2 |
||
611 | EF_HEXAGON_MACH_V3 = 0x00000002, // Hexagon V3 |
||
612 | EF_HEXAGON_MACH_V4 = 0x00000003, // Hexagon V4 |
||
613 | EF_HEXAGON_MACH_V5 = 0x00000004, // Hexagon V5 |
||
614 | EF_HEXAGON_MACH_V55 = 0x00000005, // Hexagon V55 |
||
615 | EF_HEXAGON_MACH_V60 = 0x00000060, // Hexagon V60 |
||
616 | EF_HEXAGON_MACH_V62 = 0x00000062, // Hexagon V62 |
||
617 | EF_HEXAGON_MACH_V65 = 0x00000065, // Hexagon V65 |
||
618 | EF_HEXAGON_MACH_V66 = 0x00000066, // Hexagon V66 |
||
619 | EF_HEXAGON_MACH_V67 = 0x00000067, // Hexagon V67 |
||
620 | EF_HEXAGON_MACH_V67T = 0x00008067, // Hexagon V67T |
||
621 | EF_HEXAGON_MACH_V68 = 0x00000068, // Hexagon V68 |
||
622 | EF_HEXAGON_MACH_V69 = 0x00000069, // Hexagon V69 |
||
623 | EF_HEXAGON_MACH_V71 = 0x00000071, // Hexagon V71 |
||
624 | EF_HEXAGON_MACH_V71T = 0x00008071, // Hexagon V71T |
||
625 | EF_HEXAGON_MACH_V73 = 0x00000073, // Hexagon V73 |
||
626 | EF_HEXAGON_MACH = 0x000003ff, // Hexagon V.. |
||
627 | |||
628 | // Highest ISA version flags |
||
629 | EF_HEXAGON_ISA_MACH = 0x00000000, // Same as specified in bits[11:0] |
||
630 | // of e_flags |
||
631 | EF_HEXAGON_ISA_V2 = 0x00000010, // Hexagon V2 ISA |
||
632 | EF_HEXAGON_ISA_V3 = 0x00000020, // Hexagon V3 ISA |
||
633 | EF_HEXAGON_ISA_V4 = 0x00000030, // Hexagon V4 ISA |
||
634 | EF_HEXAGON_ISA_V5 = 0x00000040, // Hexagon V5 ISA |
||
635 | EF_HEXAGON_ISA_V55 = 0x00000050, // Hexagon V55 ISA |
||
636 | EF_HEXAGON_ISA_V60 = 0x00000060, // Hexagon V60 ISA |
||
637 | EF_HEXAGON_ISA_V62 = 0x00000062, // Hexagon V62 ISA |
||
638 | EF_HEXAGON_ISA_V65 = 0x00000065, // Hexagon V65 ISA |
||
639 | EF_HEXAGON_ISA_V66 = 0x00000066, // Hexagon V66 ISA |
||
640 | EF_HEXAGON_ISA_V67 = 0x00000067, // Hexagon V67 ISA |
||
641 | EF_HEXAGON_ISA_V68 = 0x00000068, // Hexagon V68 ISA |
||
642 | EF_HEXAGON_ISA_V69 = 0x00000069, // Hexagon V69 ISA |
||
643 | EF_HEXAGON_ISA_V71 = 0x00000071, // Hexagon V71 ISA |
||
644 | EF_HEXAGON_ISA_V73 = 0x00000073, // Hexagon V73 ISA |
||
645 | EF_HEXAGON_ISA_V75 = 0x00000075, // Hexagon V75 ISA |
||
646 | EF_HEXAGON_ISA = 0x000003ff, // Hexagon V.. ISA |
||
647 | }; |
||
648 | |||
649 | // Hexagon-specific section indexes for common small data |
||
650 | enum { |
||
651 | SHN_HEXAGON_SCOMMON = 0xff00, // Other access sizes |
||
652 | SHN_HEXAGON_SCOMMON_1 = 0xff01, // Byte-sized access |
||
653 | SHN_HEXAGON_SCOMMON_2 = 0xff02, // Half-word-sized access |
||
654 | SHN_HEXAGON_SCOMMON_4 = 0xff03, // Word-sized access |
||
655 | SHN_HEXAGON_SCOMMON_8 = 0xff04 // Double-word-size access |
||
656 | }; |
||
657 | |||
658 | // ELF Relocation types for Hexagon |
||
659 | enum { |
||
660 | #include "ELFRelocs/Hexagon.def" |
||
661 | }; |
||
662 | |||
663 | // ELF Relocation type for Lanai. |
||
664 | enum { |
||
665 | #include "ELFRelocs/Lanai.def" |
||
666 | }; |
||
667 | |||
668 | // RISCV Specific e_flags |
||
669 | enum : unsigned { |
||
670 | EF_RISCV_RVC = 0x0001, |
||
671 | EF_RISCV_FLOAT_ABI = 0x0006, |
||
672 | EF_RISCV_FLOAT_ABI_SOFT = 0x0000, |
||
673 | EF_RISCV_FLOAT_ABI_SINGLE = 0x0002, |
||
674 | EF_RISCV_FLOAT_ABI_DOUBLE = 0x0004, |
||
675 | EF_RISCV_FLOAT_ABI_QUAD = 0x0006, |
||
676 | EF_RISCV_RVE = 0x0008, |
||
677 | EF_RISCV_TSO = 0x0010, |
||
678 | }; |
||
679 | |||
680 | // ELF Relocation types for RISC-V |
||
681 | enum { |
||
682 | #include "ELFRelocs/RISCV.def" |
||
683 | }; |
||
684 | |||
685 | enum { |
||
686 | // Symbol may follow different calling convention than the standard calling |
||
687 | // convention. |
||
688 | STO_RISCV_VARIANT_CC = 0x80 |
||
689 | }; |
||
690 | |||
691 | // ELF Relocation types for S390/zSeries |
||
692 | enum { |
||
693 | #include "ELFRelocs/SystemZ.def" |
||
694 | }; |
||
695 | |||
696 | // ELF Relocation type for Sparc. |
||
697 | enum { |
||
698 | #include "ELFRelocs/Sparc.def" |
||
699 | }; |
||
700 | |||
701 | // AMDGPU specific e_flags. |
||
702 | enum : unsigned { |
||
703 | // Processor selection mask for EF_AMDGPU_MACH_* values. |
||
704 | EF_AMDGPU_MACH = 0x0ff, |
||
705 | |||
706 | // Not specified processor. |
||
707 | EF_AMDGPU_MACH_NONE = 0x000, |
||
708 | |||
709 | // R600-based processors. |
||
710 | |||
711 | // Radeon HD 2000/3000 Series (R600). |
||
712 | EF_AMDGPU_MACH_R600_R600 = 0x001, |
||
713 | EF_AMDGPU_MACH_R600_R630 = 0x002, |
||
714 | EF_AMDGPU_MACH_R600_RS880 = 0x003, |
||
715 | EF_AMDGPU_MACH_R600_RV670 = 0x004, |
||
716 | // Radeon HD 4000 Series (R700). |
||
717 | EF_AMDGPU_MACH_R600_RV710 = 0x005, |
||
718 | EF_AMDGPU_MACH_R600_RV730 = 0x006, |
||
719 | EF_AMDGPU_MACH_R600_RV770 = 0x007, |
||
720 | // Radeon HD 5000 Series (Evergreen). |
||
721 | EF_AMDGPU_MACH_R600_CEDAR = 0x008, |
||
722 | EF_AMDGPU_MACH_R600_CYPRESS = 0x009, |
||
723 | EF_AMDGPU_MACH_R600_JUNIPER = 0x00a, |
||
724 | EF_AMDGPU_MACH_R600_REDWOOD = 0x00b, |
||
725 | EF_AMDGPU_MACH_R600_SUMO = 0x00c, |
||
726 | // Radeon HD 6000 Series (Northern Islands). |
||
727 | EF_AMDGPU_MACH_R600_BARTS = 0x00d, |
||
728 | EF_AMDGPU_MACH_R600_CAICOS = 0x00e, |
||
729 | EF_AMDGPU_MACH_R600_CAYMAN = 0x00f, |
||
730 | EF_AMDGPU_MACH_R600_TURKS = 0x010, |
||
731 | |||
732 | // Reserved for R600-based processors. |
||
733 | EF_AMDGPU_MACH_R600_RESERVED_FIRST = 0x011, |
||
734 | EF_AMDGPU_MACH_R600_RESERVED_LAST = 0x01f, |
||
735 | |||
736 | // First/last R600-based processors. |
||
737 | EF_AMDGPU_MACH_R600_FIRST = EF_AMDGPU_MACH_R600_R600, |
||
738 | EF_AMDGPU_MACH_R600_LAST = EF_AMDGPU_MACH_R600_TURKS, |
||
739 | |||
740 | // AMDGCN-based processors. |
||
741 | EF_AMDGPU_MACH_AMDGCN_GFX600 = 0x020, |
||
742 | EF_AMDGPU_MACH_AMDGCN_GFX601 = 0x021, |
||
743 | EF_AMDGPU_MACH_AMDGCN_GFX700 = 0x022, |
||
744 | EF_AMDGPU_MACH_AMDGCN_GFX701 = 0x023, |
||
745 | EF_AMDGPU_MACH_AMDGCN_GFX702 = 0x024, |
||
746 | EF_AMDGPU_MACH_AMDGCN_GFX703 = 0x025, |
||
747 | EF_AMDGPU_MACH_AMDGCN_GFX704 = 0x026, |
||
748 | EF_AMDGPU_MACH_AMDGCN_RESERVED_0X27 = 0x027, |
||
749 | EF_AMDGPU_MACH_AMDGCN_GFX801 = 0x028, |
||
750 | EF_AMDGPU_MACH_AMDGCN_GFX802 = 0x029, |
||
751 | EF_AMDGPU_MACH_AMDGCN_GFX803 = 0x02a, |
||
752 | EF_AMDGPU_MACH_AMDGCN_GFX810 = 0x02b, |
||
753 | EF_AMDGPU_MACH_AMDGCN_GFX900 = 0x02c, |
||
754 | EF_AMDGPU_MACH_AMDGCN_GFX902 = 0x02d, |
||
755 | EF_AMDGPU_MACH_AMDGCN_GFX904 = 0x02e, |
||
756 | EF_AMDGPU_MACH_AMDGCN_GFX906 = 0x02f, |
||
757 | EF_AMDGPU_MACH_AMDGCN_GFX908 = 0x030, |
||
758 | EF_AMDGPU_MACH_AMDGCN_GFX909 = 0x031, |
||
759 | EF_AMDGPU_MACH_AMDGCN_GFX90C = 0x032, |
||
760 | EF_AMDGPU_MACH_AMDGCN_GFX1010 = 0x033, |
||
761 | EF_AMDGPU_MACH_AMDGCN_GFX1011 = 0x034, |
||
762 | EF_AMDGPU_MACH_AMDGCN_GFX1012 = 0x035, |
||
763 | EF_AMDGPU_MACH_AMDGCN_GFX1030 = 0x036, |
||
764 | EF_AMDGPU_MACH_AMDGCN_GFX1031 = 0x037, |
||
765 | EF_AMDGPU_MACH_AMDGCN_GFX1032 = 0x038, |
||
766 | EF_AMDGPU_MACH_AMDGCN_GFX1033 = 0x039, |
||
767 | EF_AMDGPU_MACH_AMDGCN_GFX602 = 0x03a, |
||
768 | EF_AMDGPU_MACH_AMDGCN_GFX705 = 0x03b, |
||
769 | EF_AMDGPU_MACH_AMDGCN_GFX805 = 0x03c, |
||
770 | EF_AMDGPU_MACH_AMDGCN_GFX1035 = 0x03d, |
||
771 | EF_AMDGPU_MACH_AMDGCN_GFX1034 = 0x03e, |
||
772 | EF_AMDGPU_MACH_AMDGCN_GFX90A = 0x03f, |
||
773 | EF_AMDGPU_MACH_AMDGCN_GFX940 = 0x040, |
||
774 | EF_AMDGPU_MACH_AMDGCN_GFX1100 = 0x041, |
||
775 | EF_AMDGPU_MACH_AMDGCN_GFX1013 = 0x042, |
||
776 | EF_AMDGPU_MACH_AMDGCN_RESERVED_0X43 = 0x043, |
||
777 | EF_AMDGPU_MACH_AMDGCN_GFX1103 = 0x044, |
||
778 | EF_AMDGPU_MACH_AMDGCN_GFX1036 = 0x045, |
||
779 | EF_AMDGPU_MACH_AMDGCN_GFX1101 = 0x046, |
||
780 | EF_AMDGPU_MACH_AMDGCN_GFX1102 = 0x047, |
||
781 | |||
782 | // First/last AMDGCN-based processors. |
||
783 | EF_AMDGPU_MACH_AMDGCN_FIRST = EF_AMDGPU_MACH_AMDGCN_GFX600, |
||
784 | EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX1102, |
||
785 | |||
786 | // Indicates if the "xnack" target feature is enabled for all code contained |
||
787 | // in the object. |
||
788 | // |
||
789 | // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V2. |
||
790 | EF_AMDGPU_FEATURE_XNACK_V2 = 0x01, |
||
791 | // Indicates if the trap handler is enabled for all code contained |
||
792 | // in the object. |
||
793 | // |
||
794 | // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V2. |
||
795 | EF_AMDGPU_FEATURE_TRAP_HANDLER_V2 = 0x02, |
||
796 | |||
797 | // Indicates if the "xnack" target feature is enabled for all code contained |
||
798 | // in the object. |
||
799 | // |
||
800 | // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V3. |
||
801 | EF_AMDGPU_FEATURE_XNACK_V3 = 0x100, |
||
802 | // Indicates if the "sramecc" target feature is enabled for all code |
||
803 | // contained in the object. |
||
804 | // |
||
805 | // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V3. |
||
806 | EF_AMDGPU_FEATURE_SRAMECC_V3 = 0x200, |
||
807 | |||
808 | // XNACK selection mask for EF_AMDGPU_FEATURE_XNACK_* values. |
||
809 | // |
||
810 | // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V4. |
||
811 | EF_AMDGPU_FEATURE_XNACK_V4 = 0x300, |
||
812 | // XNACK is not supported. |
||
813 | EF_AMDGPU_FEATURE_XNACK_UNSUPPORTED_V4 = 0x000, |
||
814 | // XNACK is any/default/unspecified. |
||
815 | EF_AMDGPU_FEATURE_XNACK_ANY_V4 = 0x100, |
||
816 | // XNACK is off. |
||
817 | EF_AMDGPU_FEATURE_XNACK_OFF_V4 = 0x200, |
||
818 | // XNACK is on. |
||
819 | EF_AMDGPU_FEATURE_XNACK_ON_V4 = 0x300, |
||
820 | |||
821 | // SRAMECC selection mask for EF_AMDGPU_FEATURE_SRAMECC_* values. |
||
822 | // |
||
823 | // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V4. |
||
824 | EF_AMDGPU_FEATURE_SRAMECC_V4 = 0xc00, |
||
825 | // SRAMECC is not supported. |
||
826 | EF_AMDGPU_FEATURE_SRAMECC_UNSUPPORTED_V4 = 0x000, |
||
827 | // SRAMECC is any/default/unspecified. |
||
828 | EF_AMDGPU_FEATURE_SRAMECC_ANY_V4 = 0x400, |
||
829 | // SRAMECC is off. |
||
830 | EF_AMDGPU_FEATURE_SRAMECC_OFF_V4 = 0x800, |
||
831 | // SRAMECC is on. |
||
832 | EF_AMDGPU_FEATURE_SRAMECC_ON_V4 = 0xc00, |
||
833 | }; |
||
834 | |||
835 | // ELF Relocation types for AMDGPU |
||
836 | enum { |
||
837 | #include "ELFRelocs/AMDGPU.def" |
||
838 | }; |
||
839 | |||
840 | // ELF Relocation types for BPF |
||
841 | enum { |
||
842 | #include "ELFRelocs/BPF.def" |
||
843 | }; |
||
844 | |||
845 | // ELF Relocation types for M68k |
||
846 | enum { |
||
847 | #include "ELFRelocs/M68k.def" |
||
848 | }; |
||
849 | |||
850 | // MSP430 specific e_flags |
||
851 | enum : unsigned { |
||
852 | EF_MSP430_MACH_MSP430x11 = 11, |
||
853 | EF_MSP430_MACH_MSP430x11x1 = 110, |
||
854 | EF_MSP430_MACH_MSP430x12 = 12, |
||
855 | EF_MSP430_MACH_MSP430x13 = 13, |
||
856 | EF_MSP430_MACH_MSP430x14 = 14, |
||
857 | EF_MSP430_MACH_MSP430x15 = 15, |
||
858 | EF_MSP430_MACH_MSP430x16 = 16, |
||
859 | EF_MSP430_MACH_MSP430x20 = 20, |
||
860 | EF_MSP430_MACH_MSP430x22 = 22, |
||
861 | EF_MSP430_MACH_MSP430x23 = 23, |
||
862 | EF_MSP430_MACH_MSP430x24 = 24, |
||
863 | EF_MSP430_MACH_MSP430x26 = 26, |
||
864 | EF_MSP430_MACH_MSP430x31 = 31, |
||
865 | EF_MSP430_MACH_MSP430x32 = 32, |
||
866 | EF_MSP430_MACH_MSP430x33 = 33, |
||
867 | EF_MSP430_MACH_MSP430x41 = 41, |
||
868 | EF_MSP430_MACH_MSP430x42 = 42, |
||
869 | EF_MSP430_MACH_MSP430x43 = 43, |
||
870 | EF_MSP430_MACH_MSP430x44 = 44, |
||
871 | EF_MSP430_MACH_MSP430X = 45, |
||
872 | EF_MSP430_MACH_MSP430x46 = 46, |
||
873 | EF_MSP430_MACH_MSP430x47 = 47, |
||
874 | EF_MSP430_MACH_MSP430x54 = 54, |
||
875 | }; |
||
876 | |||
877 | // ELF Relocation types for MSP430 |
||
878 | enum { |
||
879 | #include "ELFRelocs/MSP430.def" |
||
880 | }; |
||
881 | |||
882 | // ELF Relocation type for VE. |
||
883 | enum { |
||
884 | #include "ELFRelocs/VE.def" |
||
885 | }; |
||
886 | |||
887 | // CSKY Specific e_flags |
||
888 | enum : unsigned { |
||
889 | EF_CSKY_801 = 0xa, |
||
890 | EF_CSKY_802 = 0x10, |
||
891 | EF_CSKY_803 = 0x9, |
||
892 | EF_CSKY_805 = 0x11, |
||
893 | EF_CSKY_807 = 0x6, |
||
894 | EF_CSKY_810 = 0x8, |
||
895 | EF_CSKY_860 = 0xb, |
||
896 | EF_CSKY_800 = 0x1f, |
||
897 | EF_CSKY_FLOAT = 0x2000, |
||
898 | EF_CSKY_DSP = 0x4000, |
||
899 | EF_CSKY_ABIV2 = 0x20000000, |
||
900 | EF_CSKY_EFV1 = 0x1000000, |
||
901 | EF_CSKY_EFV2 = 0x2000000, |
||
902 | EF_CSKY_EFV3 = 0x3000000 |
||
903 | }; |
||
904 | |||
905 | // ELF Relocation types for CSKY |
||
906 | enum { |
||
907 | #include "ELFRelocs/CSKY.def" |
||
908 | }; |
||
909 | |||
910 | // LoongArch Specific e_flags |
||
911 | enum : unsigned { |
||
912 | // Definitions from LoongArch ELF psABI v2.01. |
||
913 | // Reference: https://github.com/loongson/LoongArch-Documentation |
||
914 | // (commit hash 296de4def055c871809068e0816325a4ac04eb12) |
||
915 | |||
916 | // Base ABI Modifiers |
||
917 | EF_LOONGARCH_ABI_SOFT_FLOAT = 0x1, |
||
918 | EF_LOONGARCH_ABI_SINGLE_FLOAT = 0x2, |
||
919 | EF_LOONGARCH_ABI_DOUBLE_FLOAT = 0x3, |
||
920 | EF_LOONGARCH_ABI_MODIFIER_MASK = 0x7, |
||
921 | |||
922 | // Object file ABI versions |
||
923 | EF_LOONGARCH_OBJABI_V0 = 0x0, |
||
924 | EF_LOONGARCH_OBJABI_V1 = 0x40, |
||
925 | EF_LOONGARCH_OBJABI_MASK = 0xC0, |
||
926 | }; |
||
927 | |||
928 | // ELF Relocation types for LoongArch |
||
929 | enum { |
||
930 | #include "ELFRelocs/LoongArch.def" |
||
931 | }; |
||
932 | |||
933 | // Xtensa specific e_flags |
||
934 | enum : unsigned { |
||
935 | // Four-bit Xtensa machine type mask. |
||
936 | EF_XTENSA_MACH = 0x0000000f, |
||
937 | // Various CPU types. |
||
938 | EF_XTENSA_MACH_NONE = 0x00000000, // A base Xtensa implementation |
||
939 | EF_XTENSA_XT_INSN = 0x00000100, |
||
940 | EF_XTENSA_XT_LIT = 0x00000200, |
||
941 | }; |
||
942 | |||
943 | // ELF Relocation types for Xtensa |
||
944 | enum { |
||
945 | #include "ELFRelocs/Xtensa.def" |
||
946 | }; |
||
947 | |||
948 | #undef ELF_RELOC |
||
949 | |||
950 | // Section header. |
||
951 | struct Elf32_Shdr { |
||
952 | Elf32_Word sh_name; // Section name (index into string table) |
||
953 | Elf32_Word sh_type; // Section type (SHT_*) |
||
954 | Elf32_Word sh_flags; // Section flags (SHF_*) |
||
955 | Elf32_Addr sh_addr; // Address where section is to be loaded |
||
956 | Elf32_Off sh_offset; // File offset of section data, in bytes |
||
957 | Elf32_Word sh_size; // Size of section, in bytes |
||
958 | Elf32_Word sh_link; // Section type-specific header table index link |
||
959 | Elf32_Word sh_info; // Section type-specific extra information |
||
960 | Elf32_Word sh_addralign; // Section address alignment |
||
961 | Elf32_Word sh_entsize; // Size of records contained within the section |
||
962 | }; |
||
963 | |||
964 | // Section header for ELF64 - same fields as ELF32, different types. |
||
965 | struct Elf64_Shdr { |
||
966 | Elf64_Word sh_name; |
||
967 | Elf64_Word sh_type; |
||
968 | Elf64_Xword sh_flags; |
||
969 | Elf64_Addr sh_addr; |
||
970 | Elf64_Off sh_offset; |
||
971 | Elf64_Xword sh_size; |
||
972 | Elf64_Word sh_link; |
||
973 | Elf64_Word sh_info; |
||
974 | Elf64_Xword sh_addralign; |
||
975 | Elf64_Xword sh_entsize; |
||
976 | }; |
||
977 | |||
978 | // Special section indices. |
||
979 | enum { |
||
980 | SHN_UNDEF = 0, // Undefined, missing, irrelevant, or meaningless |
||
981 | SHN_LORESERVE = 0xff00, // Lowest reserved index |
||
982 | SHN_LOPROC = 0xff00, // Lowest processor-specific index |
||
983 | SHN_HIPROC = 0xff1f, // Highest processor-specific index |
||
984 | SHN_LOOS = 0xff20, // Lowest operating system-specific index |
||
985 | SHN_HIOS = 0xff3f, // Highest operating system-specific index |
||
986 | SHN_ABS = 0xfff1, // Symbol has absolute value; does not need relocation |
||
987 | SHN_COMMON = 0xfff2, // FORTRAN COMMON or C external global variables |
||
988 | SHN_XINDEX = 0xffff, // Mark that the index is >= SHN_LORESERVE |
||
989 | SHN_HIRESERVE = 0xffff // Highest reserved index |
||
990 | }; |
||
991 | |||
992 | // Section types. |
||
993 | enum : unsigned { |
||
994 | SHT_NULL = 0, // No associated section (inactive entry). |
||
995 | SHT_PROGBITS = 1, // Program-defined contents. |
||
996 | SHT_SYMTAB = 2, // Symbol table. |
||
997 | SHT_STRTAB = 3, // String table. |
||
998 | SHT_RELA = 4, // Relocation entries; explicit addends. |
||
999 | SHT_HASH = 5, // Symbol hash table. |
||
1000 | SHT_DYNAMIC = 6, // Information for dynamic linking. |
||
1001 | SHT_NOTE = 7, // Information about the file. |
||
1002 | SHT_NOBITS = 8, // Data occupies no space in the file. |
||
1003 | SHT_REL = 9, // Relocation entries; no explicit addends. |
||
1004 | SHT_SHLIB = 10, // Reserved. |
||
1005 | SHT_DYNSYM = 11, // Symbol table. |
||
1006 | SHT_INIT_ARRAY = 14, // Pointers to initialization functions. |
||
1007 | SHT_FINI_ARRAY = 15, // Pointers to termination functions. |
||
1008 | SHT_PREINIT_ARRAY = 16, // Pointers to pre-init functions. |
||
1009 | SHT_GROUP = 17, // Section group. |
||
1010 | SHT_SYMTAB_SHNDX = 18, // Indices for SHN_XINDEX entries. |
||
1011 | // Experimental support for SHT_RELR sections. For details, see proposal |
||
1012 | // at https://groups.google.com/forum/#!topic/generic-abi/bX460iggiKg |
||
1013 | SHT_RELR = 19, // Relocation entries; only offsets. |
||
1014 | SHT_LOOS = 0x60000000, // Lowest operating system-specific type. |
||
1015 | // Android packed relocation section types. |
||
1016 | // https://android.googlesource.com/platform/bionic/+/6f12bfece5dcc01325e0abba56a46b1bcf991c69/tools/relocation_packer/src/elf_file.cc#37 |
||
1017 | SHT_ANDROID_REL = 0x60000001, |
||
1018 | SHT_ANDROID_RELA = 0x60000002, |
||
1019 | SHT_LLVM_ODRTAB = 0x6fff4c00, // LLVM ODR table. |
||
1020 | SHT_LLVM_LINKER_OPTIONS = 0x6fff4c01, // LLVM Linker Options. |
||
1021 | SHT_LLVM_ADDRSIG = 0x6fff4c03, // List of address-significant symbols |
||
1022 | // for safe ICF. |
||
1023 | SHT_LLVM_DEPENDENT_LIBRARIES = |
||
1024 | 0x6fff4c04, // LLVM Dependent Library Specifiers. |
||
1025 | SHT_LLVM_SYMPART = 0x6fff4c05, // Symbol partition specification. |
||
1026 | SHT_LLVM_PART_EHDR = 0x6fff4c06, // ELF header for loadable partition. |
||
1027 | SHT_LLVM_PART_PHDR = 0x6fff4c07, // Phdrs for loadable partition. |
||
1028 | SHT_LLVM_BB_ADDR_MAP_V0 = |
||
1029 | 0x6fff4c08, // LLVM Basic Block Address Map (old version kept for |
||
1030 | // backward-compatibility). |
||
1031 | SHT_LLVM_CALL_GRAPH_PROFILE = 0x6fff4c09, // LLVM Call Graph Profile. |
||
1032 | SHT_LLVM_BB_ADDR_MAP = 0x6fff4c0a, // LLVM Basic Block Address Map. |
||
1033 | SHT_LLVM_OFFLOADING = 0x6fff4c0b, // LLVM device offloading data. |
||
1034 | // Android's experimental support for SHT_RELR sections. |
||
1035 | // https://android.googlesource.com/platform/bionic/+/b7feec74547f84559a1467aca02708ff61346d2a/libc/include/elf.h#512 |
||
1036 | SHT_ANDROID_RELR = 0x6fffff00, // Relocation entries; only offsets. |
||
1037 | SHT_GNU_ATTRIBUTES = 0x6ffffff5, // Object attributes. |
||
1038 | SHT_GNU_HASH = 0x6ffffff6, // GNU-style hash table. |
||
1039 | SHT_GNU_verdef = 0x6ffffffd, // GNU version definitions. |
||
1040 | SHT_GNU_verneed = 0x6ffffffe, // GNU version references. |
||
1041 | SHT_GNU_versym = 0x6fffffff, // GNU symbol versions table. |
||
1042 | SHT_HIOS = 0x6fffffff, // Highest operating system-specific type. |
||
1043 | SHT_LOPROC = 0x70000000, // Lowest processor arch-specific type. |
||
1044 | // Fixme: All this is duplicated in MCSectionELF. Why?? |
||
1045 | // Exception Index table |
||
1046 | SHT_ARM_EXIDX = 0x70000001U, |
||
1047 | // BPABI DLL dynamic linking pre-emption map |
||
1048 | SHT_ARM_PREEMPTMAP = 0x70000002U, |
||
1049 | // Object file compatibility attributes |
||
1050 | SHT_ARM_ATTRIBUTES = 0x70000003U, |
||
1051 | SHT_ARM_DEBUGOVERLAY = 0x70000004U, |
||
1052 | SHT_ARM_OVERLAYSECTION = 0x70000005U, |
||
1053 | // Special aarch64-specific sections for MTE support, as described in: |
||
1054 | // https://github.com/ARM-software/abi-aa/blob/main/memtagabielf64/memtagabielf64.rst#7section-types |
||
1055 | SHT_AARCH64_MEMTAG_GLOBALS_STATIC = 0x70000007U, |
||
1056 | SHT_AARCH64_MEMTAG_GLOBALS_DYNAMIC = 0x70000008U, |
||
1057 | SHT_HEX_ORDERED = 0x70000000, // Link editor is to sort the entries in |
||
1058 | // this section based on their sizes |
||
1059 | SHT_X86_64_UNWIND = 0x70000001, // Unwind information |
||
1060 | |||
1061 | SHT_MIPS_REGINFO = 0x70000006, // Register usage information |
||
1062 | SHT_MIPS_OPTIONS = 0x7000000d, // General options |
||
1063 | SHT_MIPS_DWARF = 0x7000001e, // DWARF debugging section. |
||
1064 | SHT_MIPS_ABIFLAGS = 0x7000002a, // ABI information. |
||
1065 | |||
1066 | SHT_MSP430_ATTRIBUTES = 0x70000003U, |
||
1067 | |||
1068 | SHT_RISCV_ATTRIBUTES = 0x70000003U, |
||
1069 | |||
1070 | SHT_CSKY_ATTRIBUTES = 0x70000001U, |
||
1071 | |||
1072 | SHT_HIPROC = 0x7fffffff, // Highest processor arch-specific type. |
||
1073 | SHT_LOUSER = 0x80000000, // Lowest type reserved for applications. |
||
1074 | SHT_HIUSER = 0xffffffff // Highest type reserved for applications. |
||
1075 | }; |
||
1076 | |||
1077 | // Section flags. |
||
1078 | enum : unsigned { |
||
1079 | // Section data should be writable during execution. |
||
1080 | SHF_WRITE = 0x1, |
||
1081 | |||
1082 | // Section occupies memory during program execution. |
||
1083 | SHF_ALLOC = 0x2, |
||
1084 | |||
1085 | // Section contains executable machine instructions. |
||
1086 | SHF_EXECINSTR = 0x4, |
||
1087 | |||
1088 | // The data in this section may be merged. |
||
1089 | SHF_MERGE = 0x10, |
||
1090 | |||
1091 | // The data in this section is null-terminated strings. |
||
1092 | SHF_STRINGS = 0x20, |
||
1093 | |||
1094 | // A field in this section holds a section header table index. |
||
1095 | SHF_INFO_LINK = 0x40U, |
||
1096 | |||
1097 | // Adds special ordering requirements for link editors. |
||
1098 | SHF_LINK_ORDER = 0x80U, |
||
1099 | |||
1100 | // This section requires special OS-specific processing to avoid incorrect |
||
1101 | // behavior. |
||
1102 | SHF_OS_NONCONFORMING = 0x100U, |
||
1103 | |||
1104 | // This section is a member of a section group. |
||
1105 | SHF_GROUP = 0x200U, |
||
1106 | |||
1107 | // This section holds Thread-Local Storage. |
||
1108 | SHF_TLS = 0x400U, |
||
1109 | |||
1110 | // Identifies a section containing compressed data. |
||
1111 | SHF_COMPRESSED = 0x800U, |
||
1112 | |||
1113 | // This section should not be garbage collected by the linker. |
||
1114 | SHF_GNU_RETAIN = 0x200000, |
||
1115 | |||
1116 | // This section is excluded from the final executable or shared library. |
||
1117 | SHF_EXCLUDE = 0x80000000U, |
||
1118 | |||
1119 | // Start of target-specific flags. |
||
1120 | |||
1121 | SHF_MASKOS = 0x0ff00000, |
||
1122 | |||
1123 | // Solaris equivalent of SHF_GNU_RETAIN. |
||
1124 | SHF_SUNW_NODISCARD = 0x00100000, |
||
1125 | |||
1126 | // Bits indicating processor-specific flags. |
||
1127 | SHF_MASKPROC = 0xf0000000, |
||
1128 | |||
1129 | /// All sections with the "d" flag are grouped together by the linker to form |
||
1130 | /// the data section and the dp register is set to the start of the section by |
||
1131 | /// the boot code. |
||
1132 | XCORE_SHF_DP_SECTION = 0x10000000, |
||
1133 | |||
1134 | /// All sections with the "c" flag are grouped together by the linker to form |
||
1135 | /// the constant pool and the cp register is set to the start of the constant |
||
1136 | /// pool by the boot code. |
||
1137 | XCORE_SHF_CP_SECTION = 0x20000000, |
||
1138 | |||
1139 | // If an object file section does not have this flag set, then it may not hold |
||
1140 | // more than 2GB and can be freely referred to in objects using smaller code |
||
1141 | // models. Otherwise, only objects using larger code models can refer to them. |
||
1142 | // For example, a medium code model object can refer to data in a section that |
||
1143 | // sets this flag besides being able to refer to data in a section that does |
||
1144 | // not set it; likewise, a small code model object can refer only to code in a |
||
1145 | // section that does not set this flag. |
||
1146 | SHF_X86_64_LARGE = 0x10000000, |
||
1147 | |||
1148 | // All sections with the GPREL flag are grouped into a global data area |
||
1149 | // for faster accesses |
||
1150 | SHF_HEX_GPREL = 0x10000000, |
||
1151 | |||
1152 | // Section contains text/data which may be replicated in other sections. |
||
1153 | // Linker must retain only one copy. |
||
1154 | SHF_MIPS_NODUPES = 0x01000000, |
||
1155 | |||
1156 | // Linker must generate implicit hidden weak names. |
||
1157 | SHF_MIPS_NAMES = 0x02000000, |
||
1158 | |||
1159 | // Section data local to process. |
||
1160 | SHF_MIPS_LOCAL = 0x04000000, |
||
1161 | |||
1162 | // Do not strip this section. |
||
1163 | SHF_MIPS_NOSTRIP = 0x08000000, |
||
1164 | |||
1165 | // Section must be part of global data area. |
||
1166 | SHF_MIPS_GPREL = 0x10000000, |
||
1167 | |||
1168 | // This section should be merged. |
||
1169 | SHF_MIPS_MERGE = 0x20000000, |
||
1170 | |||
1171 | // Address size to be inferred from section entry size. |
||
1172 | SHF_MIPS_ADDR = 0x40000000, |
||
1173 | |||
1174 | // Section data is string data by default. |
||
1175 | SHF_MIPS_STRING = 0x80000000, |
||
1176 | |||
1177 | // Make code section unreadable when in execute-only mode |
||
1178 | SHF_ARM_PURECODE = 0x20000000 |
||
1179 | }; |
||
1180 | |||
1181 | // Section Group Flags |
||
1182 | enum : unsigned { |
||
1183 | GRP_COMDAT = 0x1, |
||
1184 | GRP_MASKOS = 0x0ff00000, |
||
1185 | GRP_MASKPROC = 0xf0000000 |
||
1186 | }; |
||
1187 | |||
1188 | // Symbol table entries for ELF32. |
||
1189 | struct Elf32_Sym { |
||
1190 | Elf32_Word st_name; // Symbol name (index into string table) |
||
1191 | Elf32_Addr st_value; // Value or address associated with the symbol |
||
1192 | Elf32_Word st_size; // Size of the symbol |
||
1193 | unsigned char st_info; // Symbol's type and binding attributes |
||
1194 | unsigned char st_other; // Must be zero; reserved |
||
1195 | Elf32_Half st_shndx; // Which section (header table index) it's defined in |
||
1196 | |||
1197 | // These accessors and mutators correspond to the ELF32_ST_BIND, |
||
1198 | // ELF32_ST_TYPE, and ELF32_ST_INFO macros defined in the ELF specification: |
||
1199 | unsigned char getBinding() const { return st_info >> 4; } |
||
1200 | unsigned char getType() const { return st_info & 0x0f; } |
||
1201 | void setBinding(unsigned char b) { setBindingAndType(b, getType()); } |
||
1202 | void setType(unsigned char t) { setBindingAndType(getBinding(), t); } |
||
1203 | void setBindingAndType(unsigned char b, unsigned char t) { |
||
1204 | st_info = (b << 4) + (t & 0x0f); |
||
1205 | } |
||
1206 | }; |
||
1207 | |||
1208 | // Symbol table entries for ELF64. |
||
1209 | struct Elf64_Sym { |
||
1210 | Elf64_Word st_name; // Symbol name (index into string table) |
||
1211 | unsigned char st_info; // Symbol's type and binding attributes |
||
1212 | unsigned char st_other; // Must be zero; reserved |
||
1213 | Elf64_Half st_shndx; // Which section (header tbl index) it's defined in |
||
1214 | Elf64_Addr st_value; // Value or address associated with the symbol |
||
1215 | Elf64_Xword st_size; // Size of the symbol |
||
1216 | |||
1217 | // These accessors and mutators are identical to those defined for ELF32 |
||
1218 | // symbol table entries. |
||
1219 | unsigned char getBinding() const { return st_info >> 4; } |
||
1220 | unsigned char getType() const { return st_info & 0x0f; } |
||
1221 | void setBinding(unsigned char b) { setBindingAndType(b, getType()); } |
||
1222 | void setType(unsigned char t) { setBindingAndType(getBinding(), t); } |
||
1223 | void setBindingAndType(unsigned char b, unsigned char t) { |
||
1224 | st_info = (b << 4) + (t & 0x0f); |
||
1225 | } |
||
1226 | }; |
||
1227 | |||
1228 | // The size (in bytes) of symbol table entries. |
||
1229 | enum { |
||
1230 | SYMENTRY_SIZE32 = 16, // 32-bit symbol entry size |
||
1231 | SYMENTRY_SIZE64 = 24 // 64-bit symbol entry size. |
||
1232 | }; |
||
1233 | |||
1234 | // Symbol bindings. |
||
1235 | enum { |
||
1236 | STB_LOCAL = 0, // Local symbol, not visible outside obj file containing def |
||
1237 | STB_GLOBAL = 1, // Global symbol, visible to all object files being combined |
||
1238 | STB_WEAK = 2, // Weak symbol, like global but lower-precedence |
||
1239 | STB_GNU_UNIQUE = 10, |
||
1240 | STB_LOOS = 10, // Lowest operating system-specific binding type |
||
1241 | STB_HIOS = 12, // Highest operating system-specific binding type |
||
1242 | STB_LOPROC = 13, // Lowest processor-specific binding type |
||
1243 | STB_HIPROC = 15 // Highest processor-specific binding type |
||
1244 | }; |
||
1245 | |||
1246 | // Symbol types. |
||
1247 | enum { |
||
1248 | STT_NOTYPE = 0, // Symbol's type is not specified |
||
1249 | STT_OBJECT = 1, // Symbol is a data object (variable, array, etc.) |
||
1250 | STT_FUNC = 2, // Symbol is executable code (function, etc.) |
||
1251 | STT_SECTION = 3, // Symbol refers to a section |
||
1252 | STT_FILE = 4, // Local, absolute symbol that refers to a file |
||
1253 | STT_COMMON = 5, // An uninitialized common block |
||
1254 | STT_TLS = 6, // Thread local data object |
||
1255 | STT_GNU_IFUNC = 10, // GNU indirect function |
||
1256 | STT_LOOS = 10, // Lowest operating system-specific symbol type |
||
1257 | STT_HIOS = 12, // Highest operating system-specific symbol type |
||
1258 | STT_LOPROC = 13, // Lowest processor-specific symbol type |
||
1259 | STT_HIPROC = 15, // Highest processor-specific symbol type |
||
1260 | |||
1261 | // AMDGPU symbol types |
||
1262 | STT_AMDGPU_HSA_KERNEL = 10 |
||
1263 | }; |
||
1264 | |||
1265 | enum { |
||
1266 | STV_DEFAULT = 0, // Visibility is specified by binding type |
||
1267 | STV_INTERNAL = 1, // Defined by processor supplements |
||
1268 | STV_HIDDEN = 2, // Not visible to other components |
||
1269 | STV_PROTECTED = 3 // Visible in other components but not preemptable |
||
1270 | }; |
||
1271 | |||
1272 | // Symbol number. |
||
1273 | enum { STN_UNDEF = 0 }; |
||
1274 | |||
1275 | // Special relocation symbols used in the MIPS64 ELF relocation entries |
||
1276 | enum { |
||
1277 | RSS_UNDEF = 0, // None |
||
1278 | RSS_GP = 1, // Value of gp |
||
1279 | RSS_GP0 = 2, // Value of gp used to create object being relocated |
||
1280 | RSS_LOC = 3 // Address of location being relocated |
||
1281 | }; |
||
1282 | |||
1283 | // Relocation entry, without explicit addend. |
||
1284 | struct Elf32_Rel { |
||
1285 | Elf32_Addr r_offset; // Location (file byte offset, or program virtual addr) |
||
1286 | Elf32_Word r_info; // Symbol table index and type of relocation to apply |
||
1287 | |||
1288 | // These accessors and mutators correspond to the ELF32_R_SYM, ELF32_R_TYPE, |
||
1289 | // and ELF32_R_INFO macros defined in the ELF specification: |
||
1290 | Elf32_Word getSymbol() const { return (r_info >> 8); } |
||
1291 | unsigned char getType() const { return (unsigned char)(r_info & 0x0ff); } |
||
1292 | void setSymbol(Elf32_Word s) { setSymbolAndType(s, getType()); } |
||
1293 | void setType(unsigned char t) { setSymbolAndType(getSymbol(), t); } |
||
1294 | void setSymbolAndType(Elf32_Word s, unsigned char t) { |
||
1295 | r_info = (s << 8) + t; |
||
1296 | } |
||
1297 | }; |
||
1298 | |||
1299 | // Relocation entry with explicit addend. |
||
1300 | struct Elf32_Rela { |
||
1301 | Elf32_Addr r_offset; // Location (file byte offset, or program virtual addr) |
||
1302 | Elf32_Word r_info; // Symbol table index and type of relocation to apply |
||
1303 | Elf32_Sword r_addend; // Compute value for relocatable field by adding this |
||
1304 | |||
1305 | // These accessors and mutators correspond to the ELF32_R_SYM, ELF32_R_TYPE, |
||
1306 | // and ELF32_R_INFO macros defined in the ELF specification: |
||
1307 | Elf32_Word getSymbol() const { return (r_info >> 8); } |
||
1308 | unsigned char getType() const { return (unsigned char)(r_info & 0x0ff); } |
||
1309 | void setSymbol(Elf32_Word s) { setSymbolAndType(s, getType()); } |
||
1310 | void setType(unsigned char t) { setSymbolAndType(getSymbol(), t); } |
||
1311 | void setSymbolAndType(Elf32_Word s, unsigned char t) { |
||
1312 | r_info = (s << 8) + t; |
||
1313 | } |
||
1314 | }; |
||
1315 | |||
1316 | // Relocation entry without explicit addend or info (relative relocations only). |
||
1317 | typedef Elf32_Word Elf32_Relr; // offset/bitmap for relative relocations |
||
1318 | |||
1319 | // Relocation entry, without explicit addend. |
||
1320 | struct Elf64_Rel { |
||
1321 | Elf64_Addr r_offset; // Location (file byte offset, or program virtual addr). |
||
1322 | Elf64_Xword r_info; // Symbol table index and type of relocation to apply. |
||
1323 | |||
1324 | // These accessors and mutators correspond to the ELF64_R_SYM, ELF64_R_TYPE, |
||
1325 | // and ELF64_R_INFO macros defined in the ELF specification: |
||
1326 | Elf64_Word getSymbol() const { return (r_info >> 32); } |
||
1327 | Elf64_Word getType() const { return (Elf64_Word)(r_info & 0xffffffffL); } |
||
1328 | void setSymbol(Elf64_Word s) { setSymbolAndType(s, getType()); } |
||
1329 | void setType(Elf64_Word t) { setSymbolAndType(getSymbol(), t); } |
||
1330 | void setSymbolAndType(Elf64_Word s, Elf64_Word t) { |
||
1331 | r_info = ((Elf64_Xword)s << 32) + (t & 0xffffffffL); |
||
1332 | } |
||
1333 | }; |
||
1334 | |||
1335 | // Relocation entry with explicit addend. |
||
1336 | struct Elf64_Rela { |
||
1337 | Elf64_Addr r_offset; // Location (file byte offset, or program virtual addr). |
||
1338 | Elf64_Xword r_info; // Symbol table index and type of relocation to apply. |
||
1339 | Elf64_Sxword r_addend; // Compute value for relocatable field by adding this. |
||
1340 | |||
1341 | // These accessors and mutators correspond to the ELF64_R_SYM, ELF64_R_TYPE, |
||
1342 | // and ELF64_R_INFO macros defined in the ELF specification: |
||
1343 | Elf64_Word getSymbol() const { return (r_info >> 32); } |
||
1344 | Elf64_Word getType() const { return (Elf64_Word)(r_info & 0xffffffffL); } |
||
1345 | void setSymbol(Elf64_Word s) { setSymbolAndType(s, getType()); } |
||
1346 | void setType(Elf64_Word t) { setSymbolAndType(getSymbol(), t); } |
||
1347 | void setSymbolAndType(Elf64_Word s, Elf64_Word t) { |
||
1348 | r_info = ((Elf64_Xword)s << 32) + (t & 0xffffffffL); |
||
1349 | } |
||
1350 | }; |
||
1351 | |||
1352 | // Relocation entry without explicit addend or info (relative relocations only). |
||
1353 | typedef Elf64_Xword Elf64_Relr; // offset/bitmap for relative relocations |
||
1354 | |||
1355 | // Program header for ELF32. |
||
1356 | struct Elf32_Phdr { |
||
1357 | Elf32_Word p_type; // Type of segment |
||
1358 | Elf32_Off p_offset; // File offset where segment is located, in bytes |
||
1359 | Elf32_Addr p_vaddr; // Virtual address of beginning of segment |
||
1360 | Elf32_Addr p_paddr; // Physical address of beginning of segment (OS-specific) |
||
1361 | Elf32_Word p_filesz; // Num. of bytes in file image of segment (may be zero) |
||
1362 | Elf32_Word p_memsz; // Num. of bytes in mem image of segment (may be zero) |
||
1363 | Elf32_Word p_flags; // Segment flags |
||
1364 | Elf32_Word p_align; // Segment alignment constraint |
||
1365 | }; |
||
1366 | |||
1367 | // Program header for ELF64. |
||
1368 | struct Elf64_Phdr { |
||
1369 | Elf64_Word p_type; // Type of segment |
||
1370 | Elf64_Word p_flags; // Segment flags |
||
1371 | Elf64_Off p_offset; // File offset where segment is located, in bytes |
||
1372 | Elf64_Addr p_vaddr; // Virtual address of beginning of segment |
||
1373 | Elf64_Addr p_paddr; // Physical addr of beginning of segment (OS-specific) |
||
1374 | Elf64_Xword p_filesz; // Num. of bytes in file image of segment (may be zero) |
||
1375 | Elf64_Xword p_memsz; // Num. of bytes in mem image of segment (may be zero) |
||
1376 | Elf64_Xword p_align; // Segment alignment constraint |
||
1377 | }; |
||
1378 | |||
1379 | // Segment types. |
||
1380 | enum { |
||
1381 | PT_NULL = 0, // Unused segment. |
||
1382 | PT_LOAD = 1, // Loadable segment. |
||
1383 | PT_DYNAMIC = 2, // Dynamic linking information. |
||
1384 | PT_INTERP = 3, // Interpreter pathname. |
||
1385 | PT_NOTE = 4, // Auxiliary information. |
||
1386 | PT_SHLIB = 5, // Reserved. |
||
1387 | PT_PHDR = 6, // The program header table itself. |
||
1388 | PT_TLS = 7, // The thread-local storage template. |
||
1389 | PT_LOOS = 0x60000000, // Lowest operating system-specific pt entry type. |
||
1390 | PT_HIOS = 0x6fffffff, // Highest operating system-specific pt entry type. |
||
1391 | PT_LOPROC = 0x70000000, // Lowest processor-specific program hdr entry type. |
||
1392 | PT_HIPROC = 0x7fffffff, // Highest processor-specific program hdr entry type. |
||
1393 | |||
1394 | // x86-64 program header types. |
||
1395 | // These all contain stack unwind tables. |
||
1396 | PT_GNU_EH_FRAME = 0x6474e550, |
||
1397 | PT_SUNW_EH_FRAME = 0x6474e550, |
||
1398 | PT_SUNW_UNWIND = 0x6464e550, |
||
1399 | |||
1400 | PT_GNU_STACK = 0x6474e551, // Indicates stack executability. |
||
1401 | PT_GNU_RELRO = 0x6474e552, // Read-only after relocation. |
||
1402 | PT_GNU_PROPERTY = 0x6474e553, // .note.gnu.property notes sections. |
||
1403 | |||
1404 | PT_OPENBSD_MUTABLE = 0x65a3dbe5, // Like bss, but not immutable. |
||
1405 | PT_OPENBSD_RANDOMIZE = 0x65a3dbe6, // Fill with random data. |
||
1406 | PT_OPENBSD_WXNEEDED = 0x65a3dbe7, // Program does W^X violations. |
||
1407 | PT_OPENBSD_BOOTDATA = 0x65a41be6, // Section for boot arguments. |
||
1408 | |||
1409 | // ARM program header types. |
||
1410 | PT_ARM_ARCHEXT = 0x70000000, // Platform architecture compatibility info |
||
1411 | // These all contain stack unwind tables. |
||
1412 | PT_ARM_EXIDX = 0x70000001, |
||
1413 | PT_ARM_UNWIND = 0x70000001, |
||
1414 | // MTE memory tag segment type |
||
1415 | PT_AARCH64_MEMTAG_MTE = 0x70000002, |
||
1416 | |||
1417 | // MIPS program header types. |
||
1418 | PT_MIPS_REGINFO = 0x70000000, // Register usage information. |
||
1419 | PT_MIPS_RTPROC = 0x70000001, // Runtime procedure table. |
||
1420 | PT_MIPS_OPTIONS = 0x70000002, // Options segment. |
||
1421 | PT_MIPS_ABIFLAGS = 0x70000003, // Abiflags segment. |
||
1422 | |||
1423 | // RISCV program header types. |
||
1424 | PT_RISCV_ATTRIBUTES = 0x70000003, |
||
1425 | }; |
||
1426 | |||
1427 | // Segment flag bits. |
||
1428 | enum : unsigned { |
||
1429 | PF_X = 1, // Execute |
||
1430 | PF_W = 2, // Write |
||
1431 | PF_R = 4, // Read |
||
1432 | PF_MASKOS = 0x0ff00000, // Bits for operating system-specific semantics. |
||
1433 | PF_MASKPROC = 0xf0000000 // Bits for processor-specific semantics. |
||
1434 | }; |
||
1435 | |||
1436 | // Dynamic table entry for ELF32. |
||
1437 | struct Elf32_Dyn { |
||
1438 | Elf32_Sword d_tag; // Type of dynamic table entry. |
||
1439 | union { |
||
1440 | Elf32_Word d_val; // Integer value of entry. |
||
1441 | Elf32_Addr d_ptr; // Pointer value of entry. |
||
1442 | } d_un; |
||
1443 | }; |
||
1444 | |||
1445 | // Dynamic table entry for ELF64. |
||
1446 | struct Elf64_Dyn { |
||
1447 | Elf64_Sxword d_tag; // Type of dynamic table entry. |
||
1448 | union { |
||
1449 | Elf64_Xword d_val; // Integer value of entry. |
||
1450 | Elf64_Addr d_ptr; // Pointer value of entry. |
||
1451 | } d_un; |
||
1452 | }; |
||
1453 | |||
1454 | // Dynamic table entry tags. |
||
1455 | enum { |
||
1456 | #define DYNAMIC_TAG(name, value) DT_##name = value, |
||
1457 | #include "DynamicTags.def" |
||
1458 | #undef DYNAMIC_TAG |
||
1459 | }; |
||
1460 | |||
1461 | // DT_FLAGS values. |
||
1462 | enum { |
||
1463 | DF_ORIGIN = 0x01, // The object may reference $ORIGIN. |
||
1464 | DF_SYMBOLIC = 0x02, // Search the shared lib before searching the exe. |
||
1465 | DF_TEXTREL = 0x04, // Relocations may modify a non-writable segment. |
||
1466 | DF_BIND_NOW = 0x08, // Process all relocations on load. |
||
1467 | DF_STATIC_TLS = 0x10 // Reject attempts to load dynamically. |
||
1468 | }; |
||
1469 | |||
1470 | // State flags selectable in the `d_un.d_val' element of the DT_FLAGS_1 entry. |
||
1471 | enum { |
||
1472 | DF_1_NOW = 0x00000001, // Set RTLD_NOW for this object. |
||
1473 | DF_1_GLOBAL = 0x00000002, // Set RTLD_GLOBAL for this object. |
||
1474 | DF_1_GROUP = 0x00000004, // Set RTLD_GROUP for this object. |
||
1475 | DF_1_NODELETE = 0x00000008, // Set RTLD_NODELETE for this object. |
||
1476 | DF_1_LOADFLTR = 0x00000010, // Trigger filtee loading at runtime. |
||
1477 | DF_1_INITFIRST = 0x00000020, // Set RTLD_INITFIRST for this object. |
||
1478 | DF_1_NOOPEN = 0x00000040, // Set RTLD_NOOPEN for this object. |
||
1479 | DF_1_ORIGIN = 0x00000080, // $ORIGIN must be handled. |
||
1480 | DF_1_DIRECT = 0x00000100, // Direct binding enabled. |
||
1481 | DF_1_TRANS = 0x00000200, |
||
1482 | DF_1_INTERPOSE = 0x00000400, // Object is used to interpose. |
||
1483 | DF_1_NODEFLIB = 0x00000800, // Ignore default lib search path. |
||
1484 | DF_1_NODUMP = 0x00001000, // Object can't be dldump'ed. |
||
1485 | DF_1_CONFALT = 0x00002000, // Configuration alternative created. |
||
1486 | DF_1_ENDFILTEE = 0x00004000, // Filtee terminates filters search. |
||
1487 | DF_1_DISPRELDNE = 0x00008000, // Disp reloc applied at build time. |
||
1488 | DF_1_DISPRELPND = 0x00010000, // Disp reloc applied at run-time. |
||
1489 | DF_1_NODIRECT = 0x00020000, // Object has no-direct binding. |
||
1490 | DF_1_IGNMULDEF = 0x00040000, |
||
1491 | DF_1_NOKSYMS = 0x00080000, |
||
1492 | DF_1_NOHDR = 0x00100000, |
||
1493 | DF_1_EDITED = 0x00200000, // Object is modified after built. |
||
1494 | DF_1_NORELOC = 0x00400000, |
||
1495 | DF_1_SYMINTPOSE = 0x00800000, // Object has individual interposers. |
||
1496 | DF_1_GLOBAUDIT = 0x01000000, // Global auditing required. |
||
1497 | DF_1_SINGLETON = 0x02000000, // Singleton symbols are used. |
||
1498 | DF_1_PIE = 0x08000000, // Object is a position-independent executable. |
||
1499 | }; |
||
1500 | |||
1501 | // DT_MIPS_FLAGS values. |
||
1502 | enum { |
||
1503 | RHF_NONE = 0x00000000, // No flags. |
||
1504 | RHF_QUICKSTART = 0x00000001, // Uses shortcut pointers. |
||
1505 | RHF_NOTPOT = 0x00000002, // Hash size is not a power of two. |
||
1506 | RHS_NO_LIBRARY_REPLACEMENT = 0x00000004, // Ignore LD_LIBRARY_PATH. |
||
1507 | RHF_NO_MOVE = 0x00000008, // DSO address may not be relocated. |
||
1508 | RHF_SGI_ONLY = 0x00000010, // SGI specific features. |
||
1509 | RHF_GUARANTEE_INIT = 0x00000020, // Guarantee that .init will finish |
||
1510 | // executing before any non-init |
||
1511 | // code in DSO is called. |
||
1512 | RHF_DELTA_C_PLUS_PLUS = 0x00000040, // Contains Delta C++ code. |
||
1513 | RHF_GUARANTEE_START_INIT = 0x00000080, // Guarantee that .init will start |
||
1514 | // executing before any non-init |
||
1515 | // code in DSO is called. |
||
1516 | RHF_PIXIE = 0x00000100, // Generated by pixie. |
||
1517 | RHF_DEFAULT_DELAY_LOAD = 0x00000200, // Delay-load DSO by default. |
||
1518 | RHF_REQUICKSTART = 0x00000400, // Object may be requickstarted |
||
1519 | RHF_REQUICKSTARTED = 0x00000800, // Object has been requickstarted |
||
1520 | RHF_CORD = 0x00001000, // Generated by cord. |
||
1521 | RHF_NO_UNRES_UNDEF = 0x00002000, // Object contains no unresolved |
||
1522 | // undef symbols. |
||
1523 | RHF_RLD_ORDER_SAFE = 0x00004000 // Symbol table is in a safe order. |
||
1524 | }; |
||
1525 | |||
1526 | // ElfXX_VerDef structure version (GNU versioning) |
||
1527 | enum { VER_DEF_NONE = 0, VER_DEF_CURRENT = 1 }; |
||
1528 | |||
1529 | // VerDef Flags (ElfXX_VerDef::vd_flags) |
||
1530 | enum { VER_FLG_BASE = 0x1, VER_FLG_WEAK = 0x2, VER_FLG_INFO = 0x4 }; |
||
1531 | |||
1532 | // Special constants for the version table. (SHT_GNU_versym/.gnu.version) |
||
1533 | enum { |
||
1534 | VER_NDX_LOCAL = 0, // Unversioned local symbol |
||
1535 | VER_NDX_GLOBAL = 1, // Unversioned global symbol |
||
1536 | VERSYM_VERSION = 0x7fff, // Version Index mask |
||
1537 | VERSYM_HIDDEN = 0x8000 // Hidden bit (non-default version) |
||
1538 | }; |
||
1539 | |||
1540 | // ElfXX_VerNeed structure version (GNU versioning) |
||
1541 | enum { VER_NEED_NONE = 0, VER_NEED_CURRENT = 1 }; |
||
1542 | |||
1543 | // SHT_NOTE section types. |
||
1544 | |||
1545 | // Generic note types. |
||
1546 | enum : unsigned { |
||
1547 | NT_VERSION = 1, |
||
1548 | NT_ARCH = 2, |
||
1549 | NT_GNU_BUILD_ATTRIBUTE_OPEN = 0x100, |
||
1550 | NT_GNU_BUILD_ATTRIBUTE_FUNC = 0x101, |
||
1551 | }; |
||
1552 | |||
1553 | // Core note types. |
||
1554 | enum : unsigned { |
||
1555 | NT_PRSTATUS = 1, |
||
1556 | NT_FPREGSET = 2, |
||
1557 | NT_PRPSINFO = 3, |
||
1558 | NT_TASKSTRUCT = 4, |
||
1559 | NT_AUXV = 6, |
||
1560 | NT_PSTATUS = 10, |
||
1561 | NT_FPREGS = 12, |
||
1562 | NT_PSINFO = 13, |
||
1563 | NT_LWPSTATUS = 16, |
||
1564 | NT_LWPSINFO = 17, |
||
1565 | NT_WIN32PSTATUS = 18, |
||
1566 | |||
1567 | NT_PPC_VMX = 0x100, |
||
1568 | NT_PPC_VSX = 0x102, |
||
1569 | NT_PPC_TAR = 0x103, |
||
1570 | NT_PPC_PPR = 0x104, |
||
1571 | NT_PPC_DSCR = 0x105, |
||
1572 | NT_PPC_EBB = 0x106, |
||
1573 | NT_PPC_PMU = 0x107, |
||
1574 | NT_PPC_TM_CGPR = 0x108, |
||
1575 | NT_PPC_TM_CFPR = 0x109, |
||
1576 | NT_PPC_TM_CVMX = 0x10a, |
||
1577 | NT_PPC_TM_CVSX = 0x10b, |
||
1578 | NT_PPC_TM_SPR = 0x10c, |
||
1579 | NT_PPC_TM_CTAR = 0x10d, |
||
1580 | NT_PPC_TM_CPPR = 0x10e, |
||
1581 | NT_PPC_TM_CDSCR = 0x10f, |
||
1582 | |||
1583 | NT_386_TLS = 0x200, |
||
1584 | NT_386_IOPERM = 0x201, |
||
1585 | NT_X86_XSTATE = 0x202, |
||
1586 | |||
1587 | NT_S390_HIGH_GPRS = 0x300, |
||
1588 | NT_S390_TIMER = 0x301, |
||
1589 | NT_S390_TODCMP = 0x302, |
||
1590 | NT_S390_TODPREG = 0x303, |
||
1591 | NT_S390_CTRS = 0x304, |
||
1592 | NT_S390_PREFIX = 0x305, |
||
1593 | NT_S390_LAST_BREAK = 0x306, |
||
1594 | NT_S390_SYSTEM_CALL = 0x307, |
||
1595 | NT_S390_TDB = 0x308, |
||
1596 | NT_S390_VXRS_LOW = 0x309, |
||
1597 | NT_S390_VXRS_HIGH = 0x30a, |
||
1598 | NT_S390_GS_CB = 0x30b, |
||
1599 | NT_S390_GS_BC = 0x30c, |
||
1600 | |||
1601 | NT_ARM_VFP = 0x400, |
||
1602 | NT_ARM_TLS = 0x401, |
||
1603 | NT_ARM_HW_BREAK = 0x402, |
||
1604 | NT_ARM_HW_WATCH = 0x403, |
||
1605 | NT_ARM_SVE = 0x405, |
||
1606 | NT_ARM_PAC_MASK = 0x406, |
||
1607 | |||
1608 | NT_FILE = 0x46494c45, |
||
1609 | NT_PRXFPREG = 0x46e62b7f, |
||
1610 | NT_SIGINFO = 0x53494749, |
||
1611 | }; |
||
1612 | |||
1613 | // LLVM-specific notes. |
||
1614 | enum { |
||
1615 | NT_LLVM_HWASAN_GLOBALS = 3, |
||
1616 | }; |
||
1617 | |||
1618 | // GNU note types. |
||
1619 | enum { |
||
1620 | NT_GNU_ABI_TAG = 1, |
||
1621 | NT_GNU_HWCAP = 2, |
||
1622 | NT_GNU_BUILD_ID = 3, |
||
1623 | NT_GNU_GOLD_VERSION = 4, |
||
1624 | NT_GNU_PROPERTY_TYPE_0 = 5, |
||
1625 | FDO_PACKAGING_METADATA = 0xcafe1a7e, |
||
1626 | }; |
||
1627 | |||
1628 | // Android note types. |
||
1629 | enum { |
||
1630 | NT_ANDROID_TYPE_IDENT = 1, |
||
1631 | NT_ANDROID_TYPE_KUSER = 3, |
||
1632 | NT_ANDROID_TYPE_MEMTAG = 4, |
||
1633 | }; |
||
1634 | |||
1635 | // Memory tagging values used in NT_ANDROID_TYPE_MEMTAG notes. |
||
1636 | enum { |
||
1637 | // Enumeration to determine the tagging mode. In Android-land, 'SYNC' means |
||
1638 | // running all threads in MTE Synchronous mode, and 'ASYNC' means to use the |
||
1639 | // kernels auto-upgrade feature to allow for either MTE Asynchronous, |
||
1640 | // Asymmetric, or Synchronous mode. This allows silicon vendors to specify, on |
||
1641 | // a per-cpu basis what 'ASYNC' should mean. Generally, the expectation is |
||
1642 | // "pick the most precise mode that's very fast". |
||
1643 | NT_MEMTAG_LEVEL_NONE = 0, |
||
1644 | NT_MEMTAG_LEVEL_ASYNC = 1, |
||
1645 | NT_MEMTAG_LEVEL_SYNC = 2, |
||
1646 | NT_MEMTAG_LEVEL_MASK = 3, |
||
1647 | // Bits indicating whether the loader should prepare for MTE to be enabled on |
||
1648 | // the heap and/or stack. |
||
1649 | NT_MEMTAG_HEAP = 4, |
||
1650 | NT_MEMTAG_STACK = 8, |
||
1651 | }; |
||
1652 | |||
1653 | // Property types used in GNU_PROPERTY_TYPE_0 notes. |
||
1654 | enum : unsigned { |
||
1655 | GNU_PROPERTY_STACK_SIZE = 1, |
||
1656 | GNU_PROPERTY_NO_COPY_ON_PROTECTED = 2, |
||
1657 | GNU_PROPERTY_AARCH64_FEATURE_1_AND = 0xc0000000, |
||
1658 | GNU_PROPERTY_X86_FEATURE_1_AND = 0xc0000002, |
||
1659 | |||
1660 | GNU_PROPERTY_X86_UINT32_OR_LO = 0xc0008000, |
||
1661 | GNU_PROPERTY_X86_FEATURE_2_NEEDED = GNU_PROPERTY_X86_UINT32_OR_LO + 1, |
||
1662 | GNU_PROPERTY_X86_ISA_1_NEEDED = GNU_PROPERTY_X86_UINT32_OR_LO + 2, |
||
1663 | |||
1664 | GNU_PROPERTY_X86_UINT32_OR_AND_LO = 0xc0010000, |
||
1665 | GNU_PROPERTY_X86_FEATURE_2_USED = GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1, |
||
1666 | GNU_PROPERTY_X86_ISA_1_USED = GNU_PROPERTY_X86_UINT32_OR_AND_LO + 2, |
||
1667 | }; |
||
1668 | |||
1669 | // aarch64 processor feature bits. |
||
1670 | enum : unsigned { |
||
1671 | GNU_PROPERTY_AARCH64_FEATURE_1_BTI = 1 << 0, |
||
1672 | GNU_PROPERTY_AARCH64_FEATURE_1_PAC = 1 << 1, |
||
1673 | }; |
||
1674 | |||
1675 | // x86 processor feature bits. |
||
1676 | enum : unsigned { |
||
1677 | GNU_PROPERTY_X86_FEATURE_1_IBT = 1 << 0, |
||
1678 | GNU_PROPERTY_X86_FEATURE_1_SHSTK = 1 << 1, |
||
1679 | |||
1680 | GNU_PROPERTY_X86_FEATURE_2_X86 = 1 << 0, |
||
1681 | GNU_PROPERTY_X86_FEATURE_2_X87 = 1 << 1, |
||
1682 | GNU_PROPERTY_X86_FEATURE_2_MMX = 1 << 2, |
||
1683 | GNU_PROPERTY_X86_FEATURE_2_XMM = 1 << 3, |
||
1684 | GNU_PROPERTY_X86_FEATURE_2_YMM = 1 << 4, |
||
1685 | GNU_PROPERTY_X86_FEATURE_2_ZMM = 1 << 5, |
||
1686 | GNU_PROPERTY_X86_FEATURE_2_FXSR = 1 << 6, |
||
1687 | GNU_PROPERTY_X86_FEATURE_2_XSAVE = 1 << 7, |
||
1688 | GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT = 1 << 8, |
||
1689 | GNU_PROPERTY_X86_FEATURE_2_XSAVEC = 1 << 9, |
||
1690 | |||
1691 | GNU_PROPERTY_X86_ISA_1_BASELINE = 1 << 0, |
||
1692 | GNU_PROPERTY_X86_ISA_1_V2 = 1 << 1, |
||
1693 | GNU_PROPERTY_X86_ISA_1_V3 = 1 << 2, |
||
1694 | GNU_PROPERTY_X86_ISA_1_V4 = 1 << 3, |
||
1695 | }; |
||
1696 | |||
1697 | // FreeBSD note types. |
||
1698 | enum { |
||
1699 | NT_FREEBSD_ABI_TAG = 1, |
||
1700 | NT_FREEBSD_NOINIT_TAG = 2, |
||
1701 | NT_FREEBSD_ARCH_TAG = 3, |
||
1702 | NT_FREEBSD_FEATURE_CTL = 4, |
||
1703 | }; |
||
1704 | |||
1705 | // NT_FREEBSD_FEATURE_CTL values (see FreeBSD's sys/sys/elf_common.h). |
||
1706 | enum { |
||
1707 | NT_FREEBSD_FCTL_ASLR_DISABLE = 0x00000001, |
||
1708 | NT_FREEBSD_FCTL_PROTMAX_DISABLE = 0x00000002, |
||
1709 | NT_FREEBSD_FCTL_STKGAP_DISABLE = 0x00000004, |
||
1710 | NT_FREEBSD_FCTL_WXNEEDED = 0x00000008, |
||
1711 | NT_FREEBSD_FCTL_LA48 = 0x00000010, |
||
1712 | NT_FREEBSD_FCTL_ASG_DISABLE = 0x00000020, |
||
1713 | }; |
||
1714 | |||
1715 | // FreeBSD core note types. |
||
1716 | enum { |
||
1717 | NT_FREEBSD_THRMISC = 7, |
||
1718 | NT_FREEBSD_PROCSTAT_PROC = 8, |
||
1719 | NT_FREEBSD_PROCSTAT_FILES = 9, |
||
1720 | NT_FREEBSD_PROCSTAT_VMMAP = 10, |
||
1721 | NT_FREEBSD_PROCSTAT_GROUPS = 11, |
||
1722 | NT_FREEBSD_PROCSTAT_UMASK = 12, |
||
1723 | NT_FREEBSD_PROCSTAT_RLIMIT = 13, |
||
1724 | NT_FREEBSD_PROCSTAT_OSREL = 14, |
||
1725 | NT_FREEBSD_PROCSTAT_PSSTRINGS = 15, |
||
1726 | NT_FREEBSD_PROCSTAT_AUXV = 16, |
||
1727 | }; |
||
1728 | |||
1729 | // NetBSD core note types. |
||
1730 | enum { |
||
1731 | NT_NETBSDCORE_PROCINFO = 1, |
||
1732 | NT_NETBSDCORE_AUXV = 2, |
||
1733 | NT_NETBSDCORE_LWPSTATUS = 24, |
||
1734 | }; |
||
1735 | |||
1736 | // OpenBSD core note types. |
||
1737 | enum { |
||
1738 | NT_OPENBSD_PROCINFO = 10, |
||
1739 | NT_OPENBSD_AUXV = 11, |
||
1740 | NT_OPENBSD_REGS = 20, |
||
1741 | NT_OPENBSD_FPREGS = 21, |
||
1742 | NT_OPENBSD_XFPREGS = 22, |
||
1743 | NT_OPENBSD_WCOOKIE = 23, |
||
1744 | }; |
||
1745 | |||
1746 | // AMDGPU-specific section indices. |
||
1747 | enum { |
||
1748 | SHN_AMDGPU_LDS = 0xff00, // Variable in LDS; symbol encoded like SHN_COMMON |
||
1749 | }; |
||
1750 | |||
1751 | // AMD vendor specific notes. (Code Object V2) |
||
1752 | enum { |
||
1753 | NT_AMD_HSA_CODE_OBJECT_VERSION = 1, |
||
1754 | NT_AMD_HSA_HSAIL = 2, |
||
1755 | NT_AMD_HSA_ISA_VERSION = 3, |
||
1756 | // Note types with values between 4 and 9 (inclusive) are reserved. |
||
1757 | NT_AMD_HSA_METADATA = 10, |
||
1758 | NT_AMD_HSA_ISA_NAME = 11, |
||
1759 | NT_AMD_PAL_METADATA = 12 |
||
1760 | }; |
||
1761 | |||
1762 | // AMDGPU vendor specific notes. (Code Object V3) |
||
1763 | enum { |
||
1764 | // Note types with values between 0 and 31 (inclusive) are reserved. |
||
1765 | NT_AMDGPU_METADATA = 32 |
||
1766 | }; |
||
1767 | |||
1768 | // LLVMOMPOFFLOAD specific notes. |
||
1769 | enum : unsigned { |
||
1770 | NT_LLVM_OPENMP_OFFLOAD_VERSION = 1, |
||
1771 | NT_LLVM_OPENMP_OFFLOAD_PRODUCER = 2, |
||
1772 | NT_LLVM_OPENMP_OFFLOAD_PRODUCER_VERSION = 3 |
||
1773 | }; |
||
1774 | |||
1775 | enum { |
||
1776 | GNU_ABI_TAG_LINUX = 0, |
||
1777 | GNU_ABI_TAG_HURD = 1, |
||
1778 | GNU_ABI_TAG_SOLARIS = 2, |
||
1779 | GNU_ABI_TAG_FREEBSD = 3, |
||
1780 | GNU_ABI_TAG_NETBSD = 4, |
||
1781 | GNU_ABI_TAG_SYLLABLE = 5, |
||
1782 | GNU_ABI_TAG_NACL = 6, |
||
1783 | }; |
||
1784 | |||
1785 | constexpr const char *ELF_NOTE_GNU = "GNU"; |
||
1786 | |||
1787 | // Android packed relocation group flags. |
||
1788 | enum { |
||
1789 | RELOCATION_GROUPED_BY_INFO_FLAG = 1, |
||
1790 | RELOCATION_GROUPED_BY_OFFSET_DELTA_FLAG = 2, |
||
1791 | RELOCATION_GROUPED_BY_ADDEND_FLAG = 4, |
||
1792 | RELOCATION_GROUP_HAS_ADDEND_FLAG = 8, |
||
1793 | }; |
||
1794 | |||
1795 | // Compressed section header for ELF32. |
||
1796 | struct Elf32_Chdr { |
||
1797 | Elf32_Word ch_type; |
||
1798 | Elf32_Word ch_size; |
||
1799 | Elf32_Word ch_addralign; |
||
1800 | }; |
||
1801 | |||
1802 | // Compressed section header for ELF64. |
||
1803 | struct Elf64_Chdr { |
||
1804 | Elf64_Word ch_type; |
||
1805 | Elf64_Word ch_reserved; |
||
1806 | Elf64_Xword ch_size; |
||
1807 | Elf64_Xword ch_addralign; |
||
1808 | }; |
||
1809 | |||
1810 | // Note header for ELF32. |
||
1811 | struct Elf32_Nhdr { |
||
1812 | Elf32_Word n_namesz; |
||
1813 | Elf32_Word n_descsz; |
||
1814 | Elf32_Word n_type; |
||
1815 | }; |
||
1816 | |||
1817 | // Note header for ELF64. |
||
1818 | struct Elf64_Nhdr { |
||
1819 | Elf64_Word n_namesz; |
||
1820 | Elf64_Word n_descsz; |
||
1821 | Elf64_Word n_type; |
||
1822 | }; |
||
1823 | |||
1824 | // Legal values for ch_type field of compressed section header. |
||
1825 | enum { |
||
1826 | ELFCOMPRESS_ZLIB = 1, // ZLIB/DEFLATE algorithm. |
||
1827 | ELFCOMPRESS_ZSTD = 2, // Zstandard algorithm |
||
1828 | ELFCOMPRESS_LOOS = 0x60000000, // Start of OS-specific. |
||
1829 | ELFCOMPRESS_HIOS = 0x6fffffff, // End of OS-specific. |
||
1830 | ELFCOMPRESS_LOPROC = 0x70000000, // Start of processor-specific. |
||
1831 | ELFCOMPRESS_HIPROC = 0x7fffffff // End of processor-specific. |
||
1832 | }; |
||
1833 | |||
1834 | /// Convert an architecture name into ELF's e_machine value. |
||
1835 | uint16_t convertArchNameToEMachine(StringRef Arch); |
||
1836 | |||
1837 | /// Convert an ELF's e_machine value into an architecture name. |
||
1838 | StringRef convertEMachineToArchName(uint16_t EMachine); |
||
1839 | |||
1840 | } // end namespace ELF |
||
1841 | } // end namespace llvm |
||
1842 | |||
1843 | #endif // LLVM_BINARYFORMAT_ELF_H |