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/*===------------------ uintrintrin.h - UINTR intrinsics -------------------===
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 *
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 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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 * See https://llvm.org/LICENSE.txt for license information.
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 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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 *
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 *===-----------------------------------------------------------------------===
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 */
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#ifndef __X86GPRINTRIN_H
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#error "Never use <uintrintrin.h> directly; include <x86gprintrin.h> instead."
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#endif
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#ifndef __UINTRINTRIN_H
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#define __UINTRINTRIN_H
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/* Define the default attributes for the functions in this file */
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#define __DEFAULT_FN_ATTRS \
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  __attribute__((__always_inline__, __nodebug__, __target__("uintr")))
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#ifdef __x86_64__
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struct __uintr_frame
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{
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  unsigned long long rip;
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  unsigned long long rflags;
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  unsigned long long rsp;
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};
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/// Clears the user interrupt flag (UIF). Its effect takes place immediately: a
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///    user interrupt cannot be delivered on the instruction boundary following
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///    CLUI. Can be executed only if CR4.UINT = 1, the logical processor is in
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///    64-bit mode, and software is not executing inside an enclave; otherwise,
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///    each causes an invalid-opcode exception. Causes a transactional abort if
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///    executed inside a transactional region; the abort loads EAX as it would
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///    had it been due to an execution of CLI.
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///
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/// \headerfile <x86gprintrin.h>
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///
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/// This intrinsic corresponds to the <c> CLUI </c> instruction.
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///
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/// \code{.operation}
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///   UIF := 0
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/// \endcode
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static __inline__ void __DEFAULT_FN_ATTRS
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_clui (void)
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{
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  __builtin_ia32_clui();
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}
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/// Sets the user interrupt flag (UIF). Its effect takes place immediately; a
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///    user interrupt may be delivered on the instruction boundary following
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///    STUI. Can be executed only if CR4.UINT = 1, the logical processor is in
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///    64-bit mode, and software is not executing inside an enclave; otherwise,
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///    each causes an invalid-opcode exception. Causes a transactional abort if
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///    executed inside a transactional region; the abort loads EAX as it would
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///    had it been due to an execution of STI.
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///
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/// \headerfile <x86gprintrin.h>
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///
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/// This intrinsic corresponds to the <c> STUI </c> instruction.
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///
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/// \code{.operation}
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///   UIF := 1
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/// \endcode
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static __inline__ void __DEFAULT_FN_ATTRS
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_stui (void)
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{
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  __builtin_ia32_stui();
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}
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/// Get the current value of the user interrupt flag (UIF). Can be executed
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///    regardless of CPL and inside a transactional region. Can be executed only
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///    if CR4.UINT = 1, the logical processor is in 64-bit mode, and software is
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///    not executing inside an enclave; otherwise, it causes an invalid-opcode
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///    exception.
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///
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/// \headerfile <x86gprintrin.h>
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///
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/// This intrinsic corresponds to the <c> TESTUI </c> instruction.
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///
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/// \returns The current value of the user interrupt flag (UIF).
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///
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/// \code{.operation}
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///   CF := UIF
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///   ZF := 0
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///   AF := 0
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///   OF := 0
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///   PF := 0
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///   SF := 0
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///   dst := CF
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/// \endcode
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static __inline__ unsigned char __DEFAULT_FN_ATTRS
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_testui (void)
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{
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  return __builtin_ia32_testui();
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}
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/// Send interprocessor user interrupt. Can be executed only if
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///    CR4.UINT = IA32_UINT_TT[0] = 1, the logical processor is in 64-bit mode,
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///    and software is not executing inside an enclave; otherwise, it causes an
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///    invalid-opcode exception. May be executed at any privilege level, all of
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///    its memory accesses are performed with supervisor privilege.
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///
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/// \headerfile <x86gprintrin.h>
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///
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/// This intrinsic corresponds to the <c> SENDUIPI </c> instruction
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///
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/// \param __a
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///    Index of user-interrupt target table entry in user-interrupt target
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///    table.
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///
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/// \code{.operation}
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///   IF __a > UITTSZ
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///     GP (0)
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///   FI
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///   tempUITTE := MEM[UITTADDR + (a<<4)]
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///   // tempUITTE must be valid, and can't have any reserved bit set
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///   IF (tempUITTE.V == 0 OR tempUITTE[7:1] != 0)
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///     GP (0)
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///   FI
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///   tempUPID := MEM[tempUITTE.UPIDADDR] // under lock
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///   // tempUPID can't have any reserved bit set
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///   IF (tempUPID[15:2] != 0 OR tempUPID[31:24] != 0)
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///     GP (0) // release lock
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///   FI
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///   tempUPID.PIR[tempUITTE.UV] := 1;
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///   IF (tempUPID.SN == 0 AND tempUPID.ON == 0)
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///     tempUPID.ON := 1
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///     sendNotify := 1
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///   ELSE
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///     sendNotify := 0
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///   FI
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///   MEM[tempUITTE.UPIDADDR] := tempUPID // release lock
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///   IF sendNotify == 1
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///     IF IA32_APIC_BASE[10] == 1 // local APIC is in x2APIC mode
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///       // send ordinary IPI with vector tempUPID.NV to 32-bit physical APIC
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///       // ID tempUPID.NDST
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///       SendOrdinaryIPI(tempUPID.NV, tempUPID.NDST)
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///     ELSE
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///       // send ordinary IPI with vector tempUPID.NV to 8-bit physical APIC
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///       // ID tempUPID.NDST[15:8]
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///       SendOrdinaryIPI(tempUPID.NV, tempUPID.NDST[15:8])
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///     FI
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///   FI
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/// \endcode
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static __inline__ void __DEFAULT_FN_ATTRS
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_senduipi (unsigned long long __a)
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{
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  __builtin_ia32_senduipi(__a);
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}
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#endif /* __x86_64__ */
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#undef __DEFAULT_FN_ATTRS
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#endif /* __UINTRINTRIN_H */