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14 | pmbaty | 1 | /*===---- tmmintrin.h - SSSE3 intrinsics -----------------------------------=== |
2 | * |
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3 | * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
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4 | * See https://llvm.org/LICENSE.txt for license information. |
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5 | * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
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6 | * |
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7 | *===-----------------------------------------------------------------------=== |
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8 | */ |
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9 | |||
10 | #ifndef __TMMINTRIN_H |
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11 | #define __TMMINTRIN_H |
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12 | |||
13 | #if !defined(__i386__) && !defined(__x86_64__) |
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14 | #error "This header is only meant to be used on x86 and x64 architecture" |
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15 | #endif |
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16 | |||
17 | #include <pmmintrin.h> |
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18 | |||
19 | /* Define the default attributes for the functions in this file. */ |
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20 | #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("ssse3"), __min_vector_width__(64))) |
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21 | #define __DEFAULT_FN_ATTRS_MMX __attribute__((__always_inline__, __nodebug__, __target__("mmx,ssse3"), __min_vector_width__(64))) |
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22 | |||
23 | /// Computes the absolute value of each of the packed 8-bit signed |
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24 | /// integers in the source operand and stores the 8-bit unsigned integer |
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25 | /// results in the destination. |
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26 | /// |
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27 | /// \headerfile <x86intrin.h> |
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28 | /// |
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29 | /// This intrinsic corresponds to the \c PABSB instruction. |
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30 | /// |
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31 | /// \param __a |
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32 | /// A 64-bit vector of [8 x i8]. |
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33 | /// \returns A 64-bit integer vector containing the absolute values of the |
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34 | /// elements in the operand. |
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35 | static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX |
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36 | _mm_abs_pi8(__m64 __a) |
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37 | { |
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38 | return (__m64)__builtin_ia32_pabsb((__v8qi)__a); |
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39 | } |
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40 | |||
41 | /// Computes the absolute value of each of the packed 8-bit signed |
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42 | /// integers in the source operand and stores the 8-bit unsigned integer |
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43 | /// results in the destination. |
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44 | /// |
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45 | /// \headerfile <x86intrin.h> |
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46 | /// |
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47 | /// This intrinsic corresponds to the \c VPABSB instruction. |
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48 | /// |
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49 | /// \param __a |
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50 | /// A 128-bit vector of [16 x i8]. |
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51 | /// \returns A 128-bit integer vector containing the absolute values of the |
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52 | /// elements in the operand. |
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53 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
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54 | _mm_abs_epi8(__m128i __a) |
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55 | { |
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56 | return (__m128i)__builtin_elementwise_abs((__v16qs)__a); |
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57 | } |
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58 | |||
59 | /// Computes the absolute value of each of the packed 16-bit signed |
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60 | /// integers in the source operand and stores the 16-bit unsigned integer |
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61 | /// results in the destination. |
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62 | /// |
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63 | /// \headerfile <x86intrin.h> |
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64 | /// |
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65 | /// This intrinsic corresponds to the \c PABSW instruction. |
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66 | /// |
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67 | /// \param __a |
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68 | /// A 64-bit vector of [4 x i16]. |
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69 | /// \returns A 64-bit integer vector containing the absolute values of the |
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70 | /// elements in the operand. |
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71 | static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX |
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72 | _mm_abs_pi16(__m64 __a) |
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73 | { |
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74 | return (__m64)__builtin_ia32_pabsw((__v4hi)__a); |
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75 | } |
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76 | |||
77 | /// Computes the absolute value of each of the packed 16-bit signed |
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78 | /// integers in the source operand and stores the 16-bit unsigned integer |
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79 | /// results in the destination. |
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80 | /// |
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81 | /// \headerfile <x86intrin.h> |
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82 | /// |
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83 | /// This intrinsic corresponds to the \c VPABSW instruction. |
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84 | /// |
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85 | /// \param __a |
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86 | /// A 128-bit vector of [8 x i16]. |
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87 | /// \returns A 128-bit integer vector containing the absolute values of the |
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88 | /// elements in the operand. |
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89 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
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90 | _mm_abs_epi16(__m128i __a) |
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91 | { |
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92 | return (__m128i)__builtin_elementwise_abs((__v8hi)__a); |
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93 | } |
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94 | |||
95 | /// Computes the absolute value of each of the packed 32-bit signed |
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96 | /// integers in the source operand and stores the 32-bit unsigned integer |
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97 | /// results in the destination. |
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98 | /// |
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99 | /// \headerfile <x86intrin.h> |
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100 | /// |
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101 | /// This intrinsic corresponds to the \c PABSD instruction. |
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102 | /// |
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103 | /// \param __a |
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104 | /// A 64-bit vector of [2 x i32]. |
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105 | /// \returns A 64-bit integer vector containing the absolute values of the |
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106 | /// elements in the operand. |
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107 | static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX |
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108 | _mm_abs_pi32(__m64 __a) |
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109 | { |
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110 | return (__m64)__builtin_ia32_pabsd((__v2si)__a); |
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111 | } |
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112 | |||
113 | /// Computes the absolute value of each of the packed 32-bit signed |
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114 | /// integers in the source operand and stores the 32-bit unsigned integer |
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115 | /// results in the destination. |
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116 | /// |
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117 | /// \headerfile <x86intrin.h> |
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118 | /// |
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119 | /// This intrinsic corresponds to the \c VPABSD instruction. |
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120 | /// |
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121 | /// \param __a |
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122 | /// A 128-bit vector of [4 x i32]. |
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123 | /// \returns A 128-bit integer vector containing the absolute values of the |
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124 | /// elements in the operand. |
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125 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
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126 | _mm_abs_epi32(__m128i __a) |
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127 | { |
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128 | return (__m128i)__builtin_elementwise_abs((__v4si)__a); |
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129 | } |
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130 | |||
131 | /// Concatenates the two 128-bit integer vector operands, and |
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132 | /// right-shifts the result by the number of bytes specified in the immediate |
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133 | /// operand. |
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134 | /// |
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135 | /// \headerfile <x86intrin.h> |
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136 | /// |
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137 | /// \code |
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138 | /// __m128i _mm_alignr_epi8(__m128i a, __m128i b, const int n); |
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139 | /// \endcode |
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140 | /// |
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141 | /// This intrinsic corresponds to the \c PALIGNR instruction. |
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142 | /// |
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143 | /// \param a |
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144 | /// A 128-bit vector of [16 x i8] containing one of the source operands. |
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145 | /// \param b |
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146 | /// A 128-bit vector of [16 x i8] containing one of the source operands. |
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147 | /// \param n |
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148 | /// An immediate operand specifying how many bytes to right-shift the result. |
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149 | /// \returns A 128-bit integer vector containing the concatenated right-shifted |
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150 | /// value. |
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151 | #define _mm_alignr_epi8(a, b, n) \ |
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152 | ((__m128i)__builtin_ia32_palignr128((__v16qi)(__m128i)(a), \ |
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153 | (__v16qi)(__m128i)(b), (n))) |
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154 | |||
155 | /// Concatenates the two 64-bit integer vector operands, and right-shifts |
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156 | /// the result by the number of bytes specified in the immediate operand. |
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157 | /// |
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158 | /// \headerfile <x86intrin.h> |
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159 | /// |
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160 | /// \code |
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161 | /// __m64 _mm_alignr_pi8(__m64 a, __m64 b, const int n); |
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162 | /// \endcode |
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163 | /// |
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164 | /// This intrinsic corresponds to the \c PALIGNR instruction. |
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165 | /// |
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166 | /// \param a |
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167 | /// A 64-bit vector of [8 x i8] containing one of the source operands. |
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168 | /// \param b |
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169 | /// A 64-bit vector of [8 x i8] containing one of the source operands. |
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170 | /// \param n |
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171 | /// An immediate operand specifying how many bytes to right-shift the result. |
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172 | /// \returns A 64-bit integer vector containing the concatenated right-shifted |
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173 | /// value. |
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174 | #define _mm_alignr_pi8(a, b, n) \ |
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175 | ((__m64)__builtin_ia32_palignr((__v8qi)(__m64)(a), (__v8qi)(__m64)(b), (n))) |
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176 | |||
177 | /// Horizontally adds the adjacent pairs of values contained in 2 packed |
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178 | /// 128-bit vectors of [8 x i16]. |
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179 | /// |
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180 | /// \headerfile <x86intrin.h> |
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181 | /// |
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182 | /// This intrinsic corresponds to the \c VPHADDW instruction. |
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183 | /// |
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184 | /// \param __a |
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185 | /// A 128-bit vector of [8 x i16] containing one of the source operands. The |
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186 | /// horizontal sums of the values are stored in the lower bits of the |
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187 | /// destination. |
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188 | /// \param __b |
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189 | /// A 128-bit vector of [8 x i16] containing one of the source operands. The |
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190 | /// horizontal sums of the values are stored in the upper bits of the |
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191 | /// destination. |
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192 | /// \returns A 128-bit vector of [8 x i16] containing the horizontal sums of |
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193 | /// both operands. |
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194 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
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195 | _mm_hadd_epi16(__m128i __a, __m128i __b) |
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196 | { |
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197 | return (__m128i)__builtin_ia32_phaddw128((__v8hi)__a, (__v8hi)__b); |
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198 | } |
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199 | |||
200 | /// Horizontally adds the adjacent pairs of values contained in 2 packed |
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201 | /// 128-bit vectors of [4 x i32]. |
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202 | /// |
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203 | /// \headerfile <x86intrin.h> |
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204 | /// |
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205 | /// This intrinsic corresponds to the \c VPHADDD instruction. |
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206 | /// |
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207 | /// \param __a |
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208 | /// A 128-bit vector of [4 x i32] containing one of the source operands. The |
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209 | /// horizontal sums of the values are stored in the lower bits of the |
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210 | /// destination. |
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211 | /// \param __b |
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212 | /// A 128-bit vector of [4 x i32] containing one of the source operands. The |
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213 | /// horizontal sums of the values are stored in the upper bits of the |
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214 | /// destination. |
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215 | /// \returns A 128-bit vector of [4 x i32] containing the horizontal sums of |
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216 | /// both operands. |
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217 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
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218 | _mm_hadd_epi32(__m128i __a, __m128i __b) |
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219 | { |
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220 | return (__m128i)__builtin_ia32_phaddd128((__v4si)__a, (__v4si)__b); |
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221 | } |
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222 | |||
223 | /// Horizontally adds the adjacent pairs of values contained in 2 packed |
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224 | /// 64-bit vectors of [4 x i16]. |
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225 | /// |
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226 | /// \headerfile <x86intrin.h> |
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227 | /// |
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228 | /// This intrinsic corresponds to the \c PHADDW instruction. |
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229 | /// |
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230 | /// \param __a |
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231 | /// A 64-bit vector of [4 x i16] containing one of the source operands. The |
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232 | /// horizontal sums of the values are stored in the lower bits of the |
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233 | /// destination. |
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234 | /// \param __b |
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235 | /// A 64-bit vector of [4 x i16] containing one of the source operands. The |
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236 | /// horizontal sums of the values are stored in the upper bits of the |
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237 | /// destination. |
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238 | /// \returns A 64-bit vector of [4 x i16] containing the horizontal sums of both |
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239 | /// operands. |
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240 | static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX |
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241 | _mm_hadd_pi16(__m64 __a, __m64 __b) |
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242 | { |
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243 | return (__m64)__builtin_ia32_phaddw((__v4hi)__a, (__v4hi)__b); |
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244 | } |
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245 | |||
246 | /// Horizontally adds the adjacent pairs of values contained in 2 packed |
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247 | /// 64-bit vectors of [2 x i32]. |
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248 | /// |
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249 | /// \headerfile <x86intrin.h> |
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250 | /// |
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251 | /// This intrinsic corresponds to the \c PHADDD instruction. |
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252 | /// |
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253 | /// \param __a |
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254 | /// A 64-bit vector of [2 x i32] containing one of the source operands. The |
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255 | /// horizontal sums of the values are stored in the lower bits of the |
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256 | /// destination. |
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257 | /// \param __b |
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258 | /// A 64-bit vector of [2 x i32] containing one of the source operands. The |
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259 | /// horizontal sums of the values are stored in the upper bits of the |
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260 | /// destination. |
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261 | /// \returns A 64-bit vector of [2 x i32] containing the horizontal sums of both |
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262 | /// operands. |
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263 | static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX |
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264 | _mm_hadd_pi32(__m64 __a, __m64 __b) |
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265 | { |
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266 | return (__m64)__builtin_ia32_phaddd((__v2si)__a, (__v2si)__b); |
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267 | } |
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268 | |||
269 | /// Horizontally adds the adjacent pairs of values contained in 2 packed |
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270 | /// 128-bit vectors of [8 x i16]. Positive sums greater than 0x7FFF are |
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271 | /// saturated to 0x7FFF. Negative sums less than 0x8000 are saturated to |
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272 | /// 0x8000. |
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273 | /// |
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274 | /// \headerfile <x86intrin.h> |
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275 | /// |
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276 | /// This intrinsic corresponds to the \c VPHADDSW instruction. |
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277 | /// |
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278 | /// \param __a |
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279 | /// A 128-bit vector of [8 x i16] containing one of the source operands. The |
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280 | /// horizontal sums of the values are stored in the lower bits of the |
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281 | /// destination. |
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282 | /// \param __b |
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283 | /// A 128-bit vector of [8 x i16] containing one of the source operands. The |
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284 | /// horizontal sums of the values are stored in the upper bits of the |
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285 | /// destination. |
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286 | /// \returns A 128-bit vector of [8 x i16] containing the horizontal saturated |
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287 | /// sums of both operands. |
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288 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
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289 | _mm_hadds_epi16(__m128i __a, __m128i __b) |
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290 | { |
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291 | return (__m128i)__builtin_ia32_phaddsw128((__v8hi)__a, (__v8hi)__b); |
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292 | } |
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293 | |||
294 | /// Horizontally adds the adjacent pairs of values contained in 2 packed |
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295 | /// 64-bit vectors of [4 x i16]. Positive sums greater than 0x7FFF are |
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296 | /// saturated to 0x7FFF. Negative sums less than 0x8000 are saturated to |
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297 | /// 0x8000. |
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298 | /// |
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299 | /// \headerfile <x86intrin.h> |
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300 | /// |
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301 | /// This intrinsic corresponds to the \c PHADDSW instruction. |
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302 | /// |
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303 | /// \param __a |
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304 | /// A 64-bit vector of [4 x i16] containing one of the source operands. The |
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305 | /// horizontal sums of the values are stored in the lower bits of the |
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306 | /// destination. |
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307 | /// \param __b |
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308 | /// A 64-bit vector of [4 x i16] containing one of the source operands. The |
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309 | /// horizontal sums of the values are stored in the upper bits of the |
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310 | /// destination. |
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311 | /// \returns A 64-bit vector of [4 x i16] containing the horizontal saturated |
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312 | /// sums of both operands. |
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313 | static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX |
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314 | _mm_hadds_pi16(__m64 __a, __m64 __b) |
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315 | { |
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316 | return (__m64)__builtin_ia32_phaddsw((__v4hi)__a, (__v4hi)__b); |
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317 | } |
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318 | |||
319 | /// Horizontally subtracts the adjacent pairs of values contained in 2 |
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320 | /// packed 128-bit vectors of [8 x i16]. |
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321 | /// |
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322 | /// \headerfile <x86intrin.h> |
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323 | /// |
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324 | /// This intrinsic corresponds to the \c VPHSUBW instruction. |
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325 | /// |
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326 | /// \param __a |
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327 | /// A 128-bit vector of [8 x i16] containing one of the source operands. The |
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328 | /// horizontal differences between the values are stored in the lower bits of |
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329 | /// the destination. |
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330 | /// \param __b |
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331 | /// A 128-bit vector of [8 x i16] containing one of the source operands. The |
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332 | /// horizontal differences between the values are stored in the upper bits of |
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333 | /// the destination. |
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334 | /// \returns A 128-bit vector of [8 x i16] containing the horizontal differences |
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335 | /// of both operands. |
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336 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
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337 | _mm_hsub_epi16(__m128i __a, __m128i __b) |
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338 | { |
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339 | return (__m128i)__builtin_ia32_phsubw128((__v8hi)__a, (__v8hi)__b); |
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340 | } |
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341 | |||
342 | /// Horizontally subtracts the adjacent pairs of values contained in 2 |
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343 | /// packed 128-bit vectors of [4 x i32]. |
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344 | /// |
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345 | /// \headerfile <x86intrin.h> |
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346 | /// |
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347 | /// This intrinsic corresponds to the \c VPHSUBD instruction. |
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348 | /// |
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349 | /// \param __a |
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350 | /// A 128-bit vector of [4 x i32] containing one of the source operands. The |
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351 | /// horizontal differences between the values are stored in the lower bits of |
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352 | /// the destination. |
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353 | /// \param __b |
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354 | /// A 128-bit vector of [4 x i32] containing one of the source operands. The |
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355 | /// horizontal differences between the values are stored in the upper bits of |
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356 | /// the destination. |
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357 | /// \returns A 128-bit vector of [4 x i32] containing the horizontal differences |
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358 | /// of both operands. |
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359 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
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360 | _mm_hsub_epi32(__m128i __a, __m128i __b) |
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361 | { |
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362 | return (__m128i)__builtin_ia32_phsubd128((__v4si)__a, (__v4si)__b); |
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363 | } |
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364 | |||
365 | /// Horizontally subtracts the adjacent pairs of values contained in 2 |
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366 | /// packed 64-bit vectors of [4 x i16]. |
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367 | /// |
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368 | /// \headerfile <x86intrin.h> |
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369 | /// |
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370 | /// This intrinsic corresponds to the \c PHSUBW instruction. |
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371 | /// |
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372 | /// \param __a |
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373 | /// A 64-bit vector of [4 x i16] containing one of the source operands. The |
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374 | /// horizontal differences between the values are stored in the lower bits of |
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375 | /// the destination. |
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376 | /// \param __b |
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377 | /// A 64-bit vector of [4 x i16] containing one of the source operands. The |
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378 | /// horizontal differences between the values are stored in the upper bits of |
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379 | /// the destination. |
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380 | /// \returns A 64-bit vector of [4 x i16] containing the horizontal differences |
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381 | /// of both operands. |
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382 | static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX |
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383 | _mm_hsub_pi16(__m64 __a, __m64 __b) |
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384 | { |
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385 | return (__m64)__builtin_ia32_phsubw((__v4hi)__a, (__v4hi)__b); |
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386 | } |
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387 | |||
388 | /// Horizontally subtracts the adjacent pairs of values contained in 2 |
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389 | /// packed 64-bit vectors of [2 x i32]. |
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390 | /// |
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391 | /// \headerfile <x86intrin.h> |
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392 | /// |
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393 | /// This intrinsic corresponds to the \c PHSUBD instruction. |
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394 | /// |
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395 | /// \param __a |
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396 | /// A 64-bit vector of [2 x i32] containing one of the source operands. The |
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397 | /// horizontal differences between the values are stored in the lower bits of |
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398 | /// the destination. |
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399 | /// \param __b |
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400 | /// A 64-bit vector of [2 x i32] containing one of the source operands. The |
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401 | /// horizontal differences between the values are stored in the upper bits of |
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402 | /// the destination. |
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403 | /// \returns A 64-bit vector of [2 x i32] containing the horizontal differences |
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404 | /// of both operands. |
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405 | static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX |
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406 | _mm_hsub_pi32(__m64 __a, __m64 __b) |
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407 | { |
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408 | return (__m64)__builtin_ia32_phsubd((__v2si)__a, (__v2si)__b); |
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409 | } |
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410 | |||
411 | /// Horizontally subtracts the adjacent pairs of values contained in 2 |
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412 | /// packed 128-bit vectors of [8 x i16]. Positive differences greater than |
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413 | /// 0x7FFF are saturated to 0x7FFF. Negative differences less than 0x8000 are |
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414 | /// saturated to 0x8000. |
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415 | /// |
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416 | /// \headerfile <x86intrin.h> |
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417 | /// |
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418 | /// This intrinsic corresponds to the \c VPHSUBSW instruction. |
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419 | /// |
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420 | /// \param __a |
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421 | /// A 128-bit vector of [8 x i16] containing one of the source operands. The |
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422 | /// horizontal differences between the values are stored in the lower bits of |
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423 | /// the destination. |
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424 | /// \param __b |
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425 | /// A 128-bit vector of [8 x i16] containing one of the source operands. The |
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426 | /// horizontal differences between the values are stored in the upper bits of |
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427 | /// the destination. |
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428 | /// \returns A 128-bit vector of [8 x i16] containing the horizontal saturated |
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429 | /// differences of both operands. |
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430 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
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431 | _mm_hsubs_epi16(__m128i __a, __m128i __b) |
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432 | { |
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433 | return (__m128i)__builtin_ia32_phsubsw128((__v8hi)__a, (__v8hi)__b); |
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434 | } |
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435 | |||
436 | /// Horizontally subtracts the adjacent pairs of values contained in 2 |
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437 | /// packed 64-bit vectors of [4 x i16]. Positive differences greater than |
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438 | /// 0x7FFF are saturated to 0x7FFF. Negative differences less than 0x8000 are |
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439 | /// saturated to 0x8000. |
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440 | /// |
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441 | /// \headerfile <x86intrin.h> |
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442 | /// |
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443 | /// This intrinsic corresponds to the \c PHSUBSW instruction. |
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444 | /// |
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445 | /// \param __a |
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446 | /// A 64-bit vector of [4 x i16] containing one of the source operands. The |
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447 | /// horizontal differences between the values are stored in the lower bits of |
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448 | /// the destination. |
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449 | /// \param __b |
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450 | /// A 64-bit vector of [4 x i16] containing one of the source operands. The |
||
451 | /// horizontal differences between the values are stored in the upper bits of |
||
452 | /// the destination. |
||
453 | /// \returns A 64-bit vector of [4 x i16] containing the horizontal saturated |
||
454 | /// differences of both operands. |
||
455 | static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX |
||
456 | _mm_hsubs_pi16(__m64 __a, __m64 __b) |
||
457 | { |
||
458 | return (__m64)__builtin_ia32_phsubsw((__v4hi)__a, (__v4hi)__b); |
||
459 | } |
||
460 | |||
461 | /// Multiplies corresponding pairs of packed 8-bit unsigned integer |
||
462 | /// values contained in the first source operand and packed 8-bit signed |
||
463 | /// integer values contained in the second source operand, adds pairs of |
||
464 | /// contiguous products with signed saturation, and writes the 16-bit sums to |
||
465 | /// the corresponding bits in the destination. |
||
466 | /// |
||
467 | /// For example, bits [7:0] of both operands are multiplied, bits [15:8] of |
||
468 | /// both operands are multiplied, and the sum of both results is written to |
||
469 | /// bits [15:0] of the destination. |
||
470 | /// |
||
471 | /// \headerfile <x86intrin.h> |
||
472 | /// |
||
473 | /// This intrinsic corresponds to the \c VPMADDUBSW instruction. |
||
474 | /// |
||
475 | /// \param __a |
||
476 | /// A 128-bit integer vector containing the first source operand. |
||
477 | /// \param __b |
||
478 | /// A 128-bit integer vector containing the second source operand. |
||
479 | /// \returns A 128-bit integer vector containing the sums of products of both |
||
480 | /// operands: \n |
||
481 | /// \a R0 := (\a __a0 * \a __b0) + (\a __a1 * \a __b1) \n |
||
482 | /// \a R1 := (\a __a2 * \a __b2) + (\a __a3 * \a __b3) \n |
||
483 | /// \a R2 := (\a __a4 * \a __b4) + (\a __a5 * \a __b5) \n |
||
484 | /// \a R3 := (\a __a6 * \a __b6) + (\a __a7 * \a __b7) \n |
||
485 | /// \a R4 := (\a __a8 * \a __b8) + (\a __a9 * \a __b9) \n |
||
486 | /// \a R5 := (\a __a10 * \a __b10) + (\a __a11 * \a __b11) \n |
||
487 | /// \a R6 := (\a __a12 * \a __b12) + (\a __a13 * \a __b13) \n |
||
488 | /// \a R7 := (\a __a14 * \a __b14) + (\a __a15 * \a __b15) |
||
489 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
||
490 | _mm_maddubs_epi16(__m128i __a, __m128i __b) |
||
491 | { |
||
492 | return (__m128i)__builtin_ia32_pmaddubsw128((__v16qi)__a, (__v16qi)__b); |
||
493 | } |
||
494 | |||
495 | /// Multiplies corresponding pairs of packed 8-bit unsigned integer |
||
496 | /// values contained in the first source operand and packed 8-bit signed |
||
497 | /// integer values contained in the second source operand, adds pairs of |
||
498 | /// contiguous products with signed saturation, and writes the 16-bit sums to |
||
499 | /// the corresponding bits in the destination. |
||
500 | /// |
||
501 | /// For example, bits [7:0] of both operands are multiplied, bits [15:8] of |
||
502 | /// both operands are multiplied, and the sum of both results is written to |
||
503 | /// bits [15:0] of the destination. |
||
504 | /// |
||
505 | /// \headerfile <x86intrin.h> |
||
506 | /// |
||
507 | /// This intrinsic corresponds to the \c PMADDUBSW instruction. |
||
508 | /// |
||
509 | /// \param __a |
||
510 | /// A 64-bit integer vector containing the first source operand. |
||
511 | /// \param __b |
||
512 | /// A 64-bit integer vector containing the second source operand. |
||
513 | /// \returns A 64-bit integer vector containing the sums of products of both |
||
514 | /// operands: \n |
||
515 | /// \a R0 := (\a __a0 * \a __b0) + (\a __a1 * \a __b1) \n |
||
516 | /// \a R1 := (\a __a2 * \a __b2) + (\a __a3 * \a __b3) \n |
||
517 | /// \a R2 := (\a __a4 * \a __b4) + (\a __a5 * \a __b5) \n |
||
518 | /// \a R3 := (\a __a6 * \a __b6) + (\a __a7 * \a __b7) |
||
519 | static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX |
||
520 | _mm_maddubs_pi16(__m64 __a, __m64 __b) |
||
521 | { |
||
522 | return (__m64)__builtin_ia32_pmaddubsw((__v8qi)__a, (__v8qi)__b); |
||
523 | } |
||
524 | |||
525 | /// Multiplies packed 16-bit signed integer values, truncates the 32-bit |
||
526 | /// products to the 18 most significant bits by right-shifting, rounds the |
||
527 | /// truncated value by adding 1, and writes bits [16:1] to the destination. |
||
528 | /// |
||
529 | /// \headerfile <x86intrin.h> |
||
530 | /// |
||
531 | /// This intrinsic corresponds to the \c VPMULHRSW instruction. |
||
532 | /// |
||
533 | /// \param __a |
||
534 | /// A 128-bit vector of [8 x i16] containing one of the source operands. |
||
535 | /// \param __b |
||
536 | /// A 128-bit vector of [8 x i16] containing one of the source operands. |
||
537 | /// \returns A 128-bit vector of [8 x i16] containing the rounded and scaled |
||
538 | /// products of both operands. |
||
539 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
||
540 | _mm_mulhrs_epi16(__m128i __a, __m128i __b) |
||
541 | { |
||
542 | return (__m128i)__builtin_ia32_pmulhrsw128((__v8hi)__a, (__v8hi)__b); |
||
543 | } |
||
544 | |||
545 | /// Multiplies packed 16-bit signed integer values, truncates the 32-bit |
||
546 | /// products to the 18 most significant bits by right-shifting, rounds the |
||
547 | /// truncated value by adding 1, and writes bits [16:1] to the destination. |
||
548 | /// |
||
549 | /// \headerfile <x86intrin.h> |
||
550 | /// |
||
551 | /// This intrinsic corresponds to the \c PMULHRSW instruction. |
||
552 | /// |
||
553 | /// \param __a |
||
554 | /// A 64-bit vector of [4 x i16] containing one of the source operands. |
||
555 | /// \param __b |
||
556 | /// A 64-bit vector of [4 x i16] containing one of the source operands. |
||
557 | /// \returns A 64-bit vector of [4 x i16] containing the rounded and scaled |
||
558 | /// products of both operands. |
||
559 | static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX |
||
560 | _mm_mulhrs_pi16(__m64 __a, __m64 __b) |
||
561 | { |
||
562 | return (__m64)__builtin_ia32_pmulhrsw((__v4hi)__a, (__v4hi)__b); |
||
563 | } |
||
564 | |||
565 | /// Copies the 8-bit integers from a 128-bit integer vector to the |
||
566 | /// destination or clears 8-bit values in the destination, as specified by |
||
567 | /// the second source operand. |
||
568 | /// |
||
569 | /// \headerfile <x86intrin.h> |
||
570 | /// |
||
571 | /// This intrinsic corresponds to the \c VPSHUFB instruction. |
||
572 | /// |
||
573 | /// \param __a |
||
574 | /// A 128-bit integer vector containing the values to be copied. |
||
575 | /// \param __b |
||
576 | /// A 128-bit integer vector containing control bytes corresponding to |
||
577 | /// positions in the destination: |
||
578 | /// Bit 7: \n |
||
579 | /// 1: Clear the corresponding byte in the destination. \n |
||
580 | /// 0: Copy the selected source byte to the corresponding byte in the |
||
581 | /// destination. \n |
||
582 | /// Bits [6:4] Reserved. \n |
||
583 | /// Bits [3:0] select the source byte to be copied. |
||
584 | /// \returns A 128-bit integer vector containing the copied or cleared values. |
||
585 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
||
586 | _mm_shuffle_epi8(__m128i __a, __m128i __b) |
||
587 | { |
||
588 | return (__m128i)__builtin_ia32_pshufb128((__v16qi)__a, (__v16qi)__b); |
||
589 | } |
||
590 | |||
591 | /// Copies the 8-bit integers from a 64-bit integer vector to the |
||
592 | /// destination or clears 8-bit values in the destination, as specified by |
||
593 | /// the second source operand. |
||
594 | /// |
||
595 | /// \headerfile <x86intrin.h> |
||
596 | /// |
||
597 | /// This intrinsic corresponds to the \c PSHUFB instruction. |
||
598 | /// |
||
599 | /// \param __a |
||
600 | /// A 64-bit integer vector containing the values to be copied. |
||
601 | /// \param __b |
||
602 | /// A 64-bit integer vector containing control bytes corresponding to |
||
603 | /// positions in the destination: |
||
604 | /// Bit 7: \n |
||
605 | /// 1: Clear the corresponding byte in the destination. \n |
||
606 | /// 0: Copy the selected source byte to the corresponding byte in the |
||
607 | /// destination. \n |
||
608 | /// Bits [3:0] select the source byte to be copied. |
||
609 | /// \returns A 64-bit integer vector containing the copied or cleared values. |
||
610 | static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX |
||
611 | _mm_shuffle_pi8(__m64 __a, __m64 __b) |
||
612 | { |
||
613 | return (__m64)__builtin_ia32_pshufb((__v8qi)__a, (__v8qi)__b); |
||
614 | } |
||
615 | |||
616 | /// For each 8-bit integer in the first source operand, perform one of |
||
617 | /// the following actions as specified by the second source operand. |
||
618 | /// |
||
619 | /// If the byte in the second source is negative, calculate the two's |
||
620 | /// complement of the corresponding byte in the first source, and write that |
||
621 | /// value to the destination. If the byte in the second source is positive, |
||
622 | /// copy the corresponding byte from the first source to the destination. If |
||
623 | /// the byte in the second source is zero, clear the corresponding byte in |
||
624 | /// the destination. |
||
625 | /// |
||
626 | /// \headerfile <x86intrin.h> |
||
627 | /// |
||
628 | /// This intrinsic corresponds to the \c VPSIGNB instruction. |
||
629 | /// |
||
630 | /// \param __a |
||
631 | /// A 128-bit integer vector containing the values to be copied. |
||
632 | /// \param __b |
||
633 | /// A 128-bit integer vector containing control bytes corresponding to |
||
634 | /// positions in the destination. |
||
635 | /// \returns A 128-bit integer vector containing the resultant values. |
||
636 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
||
637 | _mm_sign_epi8(__m128i __a, __m128i __b) |
||
638 | { |
||
639 | return (__m128i)__builtin_ia32_psignb128((__v16qi)__a, (__v16qi)__b); |
||
640 | } |
||
641 | |||
642 | /// For each 16-bit integer in the first source operand, perform one of |
||
643 | /// the following actions as specified by the second source operand. |
||
644 | /// |
||
645 | /// If the word in the second source is negative, calculate the two's |
||
646 | /// complement of the corresponding word in the first source, and write that |
||
647 | /// value to the destination. If the word in the second source is positive, |
||
648 | /// copy the corresponding word from the first source to the destination. If |
||
649 | /// the word in the second source is zero, clear the corresponding word in |
||
650 | /// the destination. |
||
651 | /// |
||
652 | /// \headerfile <x86intrin.h> |
||
653 | /// |
||
654 | /// This intrinsic corresponds to the \c VPSIGNW instruction. |
||
655 | /// |
||
656 | /// \param __a |
||
657 | /// A 128-bit integer vector containing the values to be copied. |
||
658 | /// \param __b |
||
659 | /// A 128-bit integer vector containing control words corresponding to |
||
660 | /// positions in the destination. |
||
661 | /// \returns A 128-bit integer vector containing the resultant values. |
||
662 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
||
663 | _mm_sign_epi16(__m128i __a, __m128i __b) |
||
664 | { |
||
665 | return (__m128i)__builtin_ia32_psignw128((__v8hi)__a, (__v8hi)__b); |
||
666 | } |
||
667 | |||
668 | /// For each 32-bit integer in the first source operand, perform one of |
||
669 | /// the following actions as specified by the second source operand. |
||
670 | /// |
||
671 | /// If the doubleword in the second source is negative, calculate the two's |
||
672 | /// complement of the corresponding word in the first source, and write that |
||
673 | /// value to the destination. If the doubleword in the second source is |
||
674 | /// positive, copy the corresponding word from the first source to the |
||
675 | /// destination. If the doubleword in the second source is zero, clear the |
||
676 | /// corresponding word in the destination. |
||
677 | /// |
||
678 | /// \headerfile <x86intrin.h> |
||
679 | /// |
||
680 | /// This intrinsic corresponds to the \c VPSIGND instruction. |
||
681 | /// |
||
682 | /// \param __a |
||
683 | /// A 128-bit integer vector containing the values to be copied. |
||
684 | /// \param __b |
||
685 | /// A 128-bit integer vector containing control doublewords corresponding to |
||
686 | /// positions in the destination. |
||
687 | /// \returns A 128-bit integer vector containing the resultant values. |
||
688 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
||
689 | _mm_sign_epi32(__m128i __a, __m128i __b) |
||
690 | { |
||
691 | return (__m128i)__builtin_ia32_psignd128((__v4si)__a, (__v4si)__b); |
||
692 | } |
||
693 | |||
694 | /// For each 8-bit integer in the first source operand, perform one of |
||
695 | /// the following actions as specified by the second source operand. |
||
696 | /// |
||
697 | /// If the byte in the second source is negative, calculate the two's |
||
698 | /// complement of the corresponding byte in the first source, and write that |
||
699 | /// value to the destination. If the byte in the second source is positive, |
||
700 | /// copy the corresponding byte from the first source to the destination. If |
||
701 | /// the byte in the second source is zero, clear the corresponding byte in |
||
702 | /// the destination. |
||
703 | /// |
||
704 | /// \headerfile <x86intrin.h> |
||
705 | /// |
||
706 | /// This intrinsic corresponds to the \c PSIGNB instruction. |
||
707 | /// |
||
708 | /// \param __a |
||
709 | /// A 64-bit integer vector containing the values to be copied. |
||
710 | /// \param __b |
||
711 | /// A 64-bit integer vector containing control bytes corresponding to |
||
712 | /// positions in the destination. |
||
713 | /// \returns A 64-bit integer vector containing the resultant values. |
||
714 | static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX |
||
715 | _mm_sign_pi8(__m64 __a, __m64 __b) |
||
716 | { |
||
717 | return (__m64)__builtin_ia32_psignb((__v8qi)__a, (__v8qi)__b); |
||
718 | } |
||
719 | |||
720 | /// For each 16-bit integer in the first source operand, perform one of |
||
721 | /// the following actions as specified by the second source operand. |
||
722 | /// |
||
723 | /// If the word in the second source is negative, calculate the two's |
||
724 | /// complement of the corresponding word in the first source, and write that |
||
725 | /// value to the destination. If the word in the second source is positive, |
||
726 | /// copy the corresponding word from the first source to the destination. If |
||
727 | /// the word in the second source is zero, clear the corresponding word in |
||
728 | /// the destination. |
||
729 | /// |
||
730 | /// \headerfile <x86intrin.h> |
||
731 | /// |
||
732 | /// This intrinsic corresponds to the \c PSIGNW instruction. |
||
733 | /// |
||
734 | /// \param __a |
||
735 | /// A 64-bit integer vector containing the values to be copied. |
||
736 | /// \param __b |
||
737 | /// A 64-bit integer vector containing control words corresponding to |
||
738 | /// positions in the destination. |
||
739 | /// \returns A 64-bit integer vector containing the resultant values. |
||
740 | static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX |
||
741 | _mm_sign_pi16(__m64 __a, __m64 __b) |
||
742 | { |
||
743 | return (__m64)__builtin_ia32_psignw((__v4hi)__a, (__v4hi)__b); |
||
744 | } |
||
745 | |||
746 | /// For each 32-bit integer in the first source operand, perform one of |
||
747 | /// the following actions as specified by the second source operand. |
||
748 | /// |
||
749 | /// If the doubleword in the second source is negative, calculate the two's |
||
750 | /// complement of the corresponding doubleword in the first source, and |
||
751 | /// write that value to the destination. If the doubleword in the second |
||
752 | /// source is positive, copy the corresponding doubleword from the first |
||
753 | /// source to the destination. If the doubleword in the second source is |
||
754 | /// zero, clear the corresponding doubleword in the destination. |
||
755 | /// |
||
756 | /// \headerfile <x86intrin.h> |
||
757 | /// |
||
758 | /// This intrinsic corresponds to the \c PSIGND instruction. |
||
759 | /// |
||
760 | /// \param __a |
||
761 | /// A 64-bit integer vector containing the values to be copied. |
||
762 | /// \param __b |
||
763 | /// A 64-bit integer vector containing two control doublewords corresponding |
||
764 | /// to positions in the destination. |
||
765 | /// \returns A 64-bit integer vector containing the resultant values. |
||
766 | static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX |
||
767 | _mm_sign_pi32(__m64 __a, __m64 __b) |
||
768 | { |
||
769 | return (__m64)__builtin_ia32_psignd((__v2si)__a, (__v2si)__b); |
||
770 | } |
||
771 | |||
772 | #undef __DEFAULT_FN_ATTRS |
||
773 | #undef __DEFAULT_FN_ATTRS_MMX |
||
774 | |||
775 | #endif /* __TMMINTRIN_H */ |