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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 14 | pmbaty | 1 | /*===---- mm3dnow.h - 3DNow! intrinsics ------------------------------------=== |
| 2 | * |
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| 3 | * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
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| 4 | * See https://llvm.org/LICENSE.txt for license information. |
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| 5 | * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
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| 6 | * |
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| 7 | *===-----------------------------------------------------------------------=== |
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| 8 | */ |
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| 9 | |||
| 10 | #ifndef _MM3DNOW_H_INCLUDED |
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| 11 | #define _MM3DNOW_H_INCLUDED |
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| 12 | |||
| 13 | #include <mmintrin.h> |
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| 14 | #include <prfchwintrin.h> |
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| 15 | |||
| 16 | typedef float __v2sf __attribute__((__vector_size__(8))); |
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| 17 | |||
| 18 | /* Define the default attributes for the functions in this file. */ |
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| 19 | #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("3dnow"), __min_vector_width__(64))) |
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| 20 | |||
| 21 | static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("3dnow"))) |
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| 22 | _m_femms(void) { |
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| 23 | __builtin_ia32_femms(); |
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| 24 | } |
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| 25 | |||
| 26 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 27 | _m_pavgusb(__m64 __m1, __m64 __m2) { |
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| 28 | return (__m64)__builtin_ia32_pavgusb((__v8qi)__m1, (__v8qi)__m2); |
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| 29 | } |
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| 30 | |||
| 31 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 32 | _m_pf2id(__m64 __m) { |
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| 33 | return (__m64)__builtin_ia32_pf2id((__v2sf)__m); |
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| 34 | } |
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| 35 | |||
| 36 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 37 | _m_pfacc(__m64 __m1, __m64 __m2) { |
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| 38 | return (__m64)__builtin_ia32_pfacc((__v2sf)__m1, (__v2sf)__m2); |
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| 39 | } |
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| 40 | |||
| 41 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 42 | _m_pfadd(__m64 __m1, __m64 __m2) { |
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| 43 | return (__m64)__builtin_ia32_pfadd((__v2sf)__m1, (__v2sf)__m2); |
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| 44 | } |
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| 45 | |||
| 46 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 47 | _m_pfcmpeq(__m64 __m1, __m64 __m2) { |
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| 48 | return (__m64)__builtin_ia32_pfcmpeq((__v2sf)__m1, (__v2sf)__m2); |
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| 49 | } |
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| 50 | |||
| 51 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 52 | _m_pfcmpge(__m64 __m1, __m64 __m2) { |
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| 53 | return (__m64)__builtin_ia32_pfcmpge((__v2sf)__m1, (__v2sf)__m2); |
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| 54 | } |
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| 55 | |||
| 56 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 57 | _m_pfcmpgt(__m64 __m1, __m64 __m2) { |
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| 58 | return (__m64)__builtin_ia32_pfcmpgt((__v2sf)__m1, (__v2sf)__m2); |
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| 59 | } |
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| 60 | |||
| 61 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 62 | _m_pfmax(__m64 __m1, __m64 __m2) { |
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| 63 | return (__m64)__builtin_ia32_pfmax((__v2sf)__m1, (__v2sf)__m2); |
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| 64 | } |
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| 65 | |||
| 66 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 67 | _m_pfmin(__m64 __m1, __m64 __m2) { |
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| 68 | return (__m64)__builtin_ia32_pfmin((__v2sf)__m1, (__v2sf)__m2); |
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| 69 | } |
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| 70 | |||
| 71 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 72 | _m_pfmul(__m64 __m1, __m64 __m2) { |
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| 73 | return (__m64)__builtin_ia32_pfmul((__v2sf)__m1, (__v2sf)__m2); |
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| 74 | } |
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| 75 | |||
| 76 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 77 | _m_pfrcp(__m64 __m) { |
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| 78 | return (__m64)__builtin_ia32_pfrcp((__v2sf)__m); |
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| 79 | } |
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| 80 | |||
| 81 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 82 | _m_pfrcpit1(__m64 __m1, __m64 __m2) { |
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| 83 | return (__m64)__builtin_ia32_pfrcpit1((__v2sf)__m1, (__v2sf)__m2); |
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| 84 | } |
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| 85 | |||
| 86 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 87 | _m_pfrcpit2(__m64 __m1, __m64 __m2) { |
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| 88 | return (__m64)__builtin_ia32_pfrcpit2((__v2sf)__m1, (__v2sf)__m2); |
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| 89 | } |
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| 90 | |||
| 91 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 92 | _m_pfrsqrt(__m64 __m) { |
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| 93 | return (__m64)__builtin_ia32_pfrsqrt((__v2sf)__m); |
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| 94 | } |
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| 95 | |||
| 96 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 97 | _m_pfrsqrtit1(__m64 __m1, __m64 __m2) { |
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| 98 | return (__m64)__builtin_ia32_pfrsqit1((__v2sf)__m1, (__v2sf)__m2); |
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| 99 | } |
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| 100 | |||
| 101 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 102 | _m_pfsub(__m64 __m1, __m64 __m2) { |
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| 103 | return (__m64)__builtin_ia32_pfsub((__v2sf)__m1, (__v2sf)__m2); |
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| 104 | } |
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| 105 | |||
| 106 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 107 | _m_pfsubr(__m64 __m1, __m64 __m2) { |
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| 108 | return (__m64)__builtin_ia32_pfsubr((__v2sf)__m1, (__v2sf)__m2); |
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| 109 | } |
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| 110 | |||
| 111 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 112 | _m_pi2fd(__m64 __m) { |
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| 113 | return (__m64)__builtin_ia32_pi2fd((__v2si)__m); |
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| 114 | } |
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| 115 | |||
| 116 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 117 | _m_pmulhrw(__m64 __m1, __m64 __m2) { |
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| 118 | return (__m64)__builtin_ia32_pmulhrw((__v4hi)__m1, (__v4hi)__m2); |
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| 119 | } |
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| 120 | |||
| 121 | /* Handle the 3dnowa instructions here. */ |
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| 122 | #undef __DEFAULT_FN_ATTRS |
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| 123 | #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("3dnowa"), __min_vector_width__(64))) |
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| 124 | |||
| 125 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 126 | _m_pf2iw(__m64 __m) { |
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| 127 | return (__m64)__builtin_ia32_pf2iw((__v2sf)__m); |
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| 128 | } |
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| 129 | |||
| 130 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 131 | _m_pfnacc(__m64 __m1, __m64 __m2) { |
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| 132 | return (__m64)__builtin_ia32_pfnacc((__v2sf)__m1, (__v2sf)__m2); |
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| 133 | } |
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| 134 | |||
| 135 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 136 | _m_pfpnacc(__m64 __m1, __m64 __m2) { |
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| 137 | return (__m64)__builtin_ia32_pfpnacc((__v2sf)__m1, (__v2sf)__m2); |
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| 138 | } |
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| 139 | |||
| 140 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 141 | _m_pi2fw(__m64 __m) { |
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| 142 | return (__m64)__builtin_ia32_pi2fw((__v2si)__m); |
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| 143 | } |
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| 144 | |||
| 145 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 146 | _m_pswapdsf(__m64 __m) { |
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| 147 | return (__m64)__builtin_ia32_pswapdsf((__v2sf)__m); |
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| 148 | } |
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| 149 | |||
| 150 | static __inline__ __m64 __DEFAULT_FN_ATTRS |
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| 151 | _m_pswapdsi(__m64 __m) { |
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| 152 | return (__m64)__builtin_ia32_pswapdsi((__v2si)__m); |
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| 153 | } |
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| 154 | |||
| 155 | #undef __DEFAULT_FN_ATTRS |
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| 156 | |||
| 157 | #endif |