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| Rev | Author | Line No. | Line |
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| 14 | pmbaty | 1 | /*===-------- avxvnniint8intrin.h - AVXVNNIINT8 intrinsics -----------=== |
| 2 | * |
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| 3 | * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
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| 4 | * See https://llvm.org/LICENSE.txt for license information. |
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| 5 | * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
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| 6 | * |
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| 7 | *===-----------------------------------------------------------------------=== |
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| 8 | */ |
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| 9 | #ifndef __IMMINTRIN_H |
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| 10 | #error \ |
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| 11 | "Never use <avxvnniint8intrin.h> directly; include <immintrin.h> instead." |
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| 12 | #endif |
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| 13 | |||
| 14 | #ifndef __AVXVNNIINT8INTRIN_H |
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| 15 | #define __AVXVNNIINT8INTRIN_H |
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| 16 | |||
| 17 | /* Define the default attributes for the functions in this file. */ |
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| 18 | #define __DEFAULT_FN_ATTRS256 \ |
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| 19 | __attribute__((__always_inline__, __nodebug__, __target__("avxvnniint8"), \ |
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| 20 | __min_vector_width__(256))) |
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| 21 | #define __DEFAULT_FN_ATTRS128 \ |
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| 22 | __attribute__((__always_inline__, __nodebug__, __target__("avxvnniint8"), \ |
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| 23 | __min_vector_width__(128))) |
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| 24 | |||
| 25 | /// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with |
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| 26 | /// corresponding signed 8-bit integers in \a __B, producing 4 intermediate |
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| 27 | /// signed 16-bit results. Sum these 4 results with the corresponding |
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| 28 | /// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. |
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| 29 | /// |
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| 30 | /// \headerfile <x86intrin.h> |
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| 31 | /// |
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| 32 | /// \code |
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| 33 | /// _mm_dpbssd_epi32(__m128i __W, __m128i __A, __m128i __B); |
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| 34 | /// \endcode |
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| 35 | /// |
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| 36 | /// This intrinsic corresponds to the \c VPDPBSSD instruction. |
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| 37 | /// |
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| 38 | /// \param __A |
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| 39 | /// A 128-bit vector of [16 x char]. |
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| 40 | /// \param __B |
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| 41 | /// A 128-bit vector of [16 x char]. |
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| 42 | /// \returns |
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| 43 | /// A 128-bit vector of [4 x int]. |
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| 44 | /// |
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| 45 | /// \code{.operation} |
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| 46 | /// FOR j := 0 to 3 |
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| 47 | /// tmp1.word := SignExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j]) |
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| 48 | /// tmp2.word := SignExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1]) |
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| 49 | /// tmp3.word := SignExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2]) |
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| 50 | /// tmp4.word := SignExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3]) |
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| 51 | /// dst.dword[j] := __W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4 |
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| 52 | /// ENDFOR |
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| 53 | /// dst[MAX:128] := 0 |
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| 54 | /// \endcode |
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| 55 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpbssd_epi32(__m128i __W, |
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| 56 | __m128i __A, |
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| 57 | __m128i __B) { |
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| 58 | return (__m128i)__builtin_ia32_vpdpbssd128((__v4si)__W, (__v4si)__A, |
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| 59 | (__v4si)__B); |
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| 60 | } |
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| 61 | |||
| 62 | /// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with |
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| 63 | /// corresponding signed 8-bit integers in \a __B, producing 4 intermediate |
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| 64 | /// signed 16-bit results. Sum these 4 results with the corresponding |
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| 65 | /// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. |
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| 66 | /// |
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| 67 | /// \headerfile <x86intrin.h> |
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| 68 | /// |
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| 69 | /// \code |
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| 70 | /// _mm256_dpbssd_epi32(__m256i __W, __m256i __A, __m256i __B); |
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| 71 | /// \endcode |
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| 72 | /// |
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| 73 | /// This intrinsic corresponds to the \c VPDPBSSD instruction. |
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| 74 | /// |
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| 75 | /// \param __A |
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| 76 | /// A 256-bit vector of [32 x char]. |
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| 77 | /// \param __B |
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| 78 | /// A 256-bit vector of [32 x char]. |
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| 79 | /// \returns |
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| 80 | /// A 256-bit vector of [8 x int]. |
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| 81 | /// |
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| 82 | /// \code{.operation} |
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| 83 | /// FOR j := 0 to 7 |
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| 84 | /// tmp1.word := SignExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j]) |
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| 85 | /// tmp2.word := SignExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1]) |
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| 86 | /// tmp3.word := SignExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2]) |
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| 87 | /// tmp4.word := SignExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3]) |
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| 88 | /// dst.dword[j] := __W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4 |
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| 89 | /// ENDFOR |
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| 90 | /// dst[MAX:256] := 0 |
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| 91 | /// \endcode |
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| 92 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
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| 93 | _mm256_dpbssd_epi32(__m256i __W, __m256i __A, __m256i __B) { |
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| 94 | return (__m256i)__builtin_ia32_vpdpbssd256((__v8si)__W, (__v8si)__A, |
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| 95 | (__v8si)__B); |
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| 96 | } |
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| 97 | |||
| 98 | /// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with |
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| 99 | /// corresponding signed 8-bit integers in \a __B, producing 4 intermediate |
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| 100 | /// signed 16-bit results. Sum these 4 results with the corresponding |
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| 101 | /// 32-bit integer in \a __W with signed saturation, and store the packed |
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| 102 | /// 32-bit results in \a dst. |
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| 103 | /// |
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| 104 | /// \headerfile <x86intrin.h> |
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| 105 | /// |
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| 106 | /// \code |
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| 107 | /// _mm_dpbssds_epi32( __m128i __W, __m128i __A, __m128i __B); |
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| 108 | /// \endcode |
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| 109 | /// |
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| 110 | /// This intrinsic corresponds to the \c VPDPBSSD instruction. |
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| 111 | /// |
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| 112 | /// \param __A |
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| 113 | /// A 128-bit vector of [16 x char]. |
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| 114 | /// \param __B |
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| 115 | /// A 128-bit vector of [16 x char]. |
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| 116 | /// \returns |
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| 117 | /// A 128-bit vector of [4 x int]. |
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| 118 | /// |
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| 119 | /// \code{.operation} |
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| 120 | /// FOR j := 0 to 3 |
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| 121 | /// tmp1.word := SignExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j]) |
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| 122 | /// tmp2.word := SignExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1]) |
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| 123 | /// tmp3.word := SignExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2]) |
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| 124 | /// tmp4.word := SignExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3]) |
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| 125 | /// dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4) |
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| 126 | /// ENDFOR |
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| 127 | /// dst[MAX:128] := 0 |
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| 128 | /// \endcode |
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| 129 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpbssds_epi32(__m128i __W, |
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| 130 | __m128i __A, |
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| 131 | __m128i __B) { |
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| 132 | return (__m128i)__builtin_ia32_vpdpbssds128((__v4si)__W, (__v4si)__A, |
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| 133 | (__v4si)__B); |
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| 134 | } |
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| 135 | |||
| 136 | /// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with |
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| 137 | /// corresponding signed 8-bit integers in \a __B, producing 4 intermediate |
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| 138 | /// signed 16-bit results. Sum these 4 results with the corresponding |
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| 139 | /// 32-bit integer in \a __W with signed saturation, and store the packed |
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| 140 | /// 32-bit results in \a dst. |
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| 141 | /// |
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| 142 | /// \headerfile <x86intrin.h> |
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| 143 | /// |
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| 144 | /// \code |
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| 145 | /// _mm256_dpbssds_epi32(__m256i __W, __m256i __A, __m256i __B); |
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| 146 | /// \endcode |
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| 147 | /// |
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| 148 | /// This intrinsic corresponds to the \c VPDPBSSD instruction. |
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| 149 | /// |
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| 150 | /// \param __A |
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| 151 | /// A 256-bit vector of [32 x char]. |
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| 152 | /// \param __B |
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| 153 | /// A 256-bit vector of [32 x char]. |
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| 154 | /// \returns |
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| 155 | /// A 256-bit vector of [8 x int]. |
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| 156 | /// |
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| 157 | /// \code{.operation} |
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| 158 | /// FOR j := 0 to 7 |
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| 159 | /// tmp1.word := SignExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j]) |
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| 160 | /// tmp2.word := SignExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1]) |
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| 161 | /// tmp3.word := SignExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2]) |
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| 162 | /// tmp4.word := SignExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3]) |
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| 163 | /// dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4) |
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| 164 | /// ENDFOR |
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| 165 | /// dst[MAX:256] := 0 |
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| 166 | /// \endcode |
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| 167 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
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| 168 | _mm256_dpbssds_epi32(__m256i __W, __m256i __A, __m256i __B) { |
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| 169 | return (__m256i)__builtin_ia32_vpdpbssds256((__v8si)__W, (__v8si)__A, |
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| 170 | (__v8si)__B); |
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| 171 | } |
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| 172 | |||
| 173 | /// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with |
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| 174 | /// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate |
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| 175 | /// signed 16-bit results. Sum these 4 results with the corresponding |
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| 176 | /// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. |
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| 177 | /// |
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| 178 | /// \headerfile <x86intrin.h> |
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| 179 | /// |
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| 180 | /// \code |
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| 181 | /// _mm_dpbsud_epi32(__m128i __W, __m128i __A, __m128i __B); |
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| 182 | /// \endcode |
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| 183 | /// |
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| 184 | /// This intrinsic corresponds to the \c VPDPBSSD instruction. |
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| 185 | /// |
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| 186 | /// \param __A |
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| 187 | /// A 128-bit vector of [16 x char]. |
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| 188 | /// \param __B |
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| 189 | /// A 128-bit vector of [16 x unsigned char]. |
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| 190 | /// \returns |
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| 191 | /// A 128-bit vector of [4 x int]. |
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| 192 | /// |
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| 193 | /// \code{.operation} |
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| 194 | /// FOR j := 0 to 3 |
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| 195 | /// tmp1.word := Signed(SignExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j])) |
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| 196 | /// tmp2.word := Signed(SignExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1])) |
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| 197 | /// tmp3.word := Signed(SignExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2])) |
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| 198 | /// tmp4.word := Signed(SignExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3])) |
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| 199 | /// dst.dword[j] := __W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4 |
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| 200 | /// ENDFOR |
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| 201 | /// dst[MAX:128] := 0 |
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| 202 | /// \endcode |
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| 203 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpbsud_epi32(__m128i __W, |
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| 204 | __m128i __A, |
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| 205 | __m128i __B) { |
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| 206 | return (__m128i)__builtin_ia32_vpdpbsud128((__v4si)__W, (__v4si)__A, |
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| 207 | (__v4si)__B); |
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| 208 | } |
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| 209 | |||
| 210 | /// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with |
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| 211 | /// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate |
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| 212 | /// signed 16-bit results. Sum these 4 results with the corresponding |
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| 213 | /// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. |
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| 214 | /// |
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| 215 | /// \headerfile <x86intrin.h> |
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| 216 | /// |
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| 217 | /// \code |
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| 218 | /// _mm256_dpbsud_epi32(__m256i __W, __m256i __A, __m256i __B); |
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| 219 | /// \endcode |
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| 220 | /// |
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| 221 | /// This intrinsic corresponds to the \c VPDPBSSD instruction. |
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| 222 | /// |
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| 223 | /// \param __A |
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| 224 | /// A 256-bit vector of [32 x char]. |
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| 225 | /// \param __B |
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| 226 | /// A 256-bit vector of [32 x unsigned char]. |
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| 227 | /// \returns |
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| 228 | /// A 256-bit vector of [8 x int]. |
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| 229 | /// |
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| 230 | /// \code{.operation} |
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| 231 | /// FOR j := 0 to 7 |
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| 232 | /// tmp1.word := Signed(SignExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j])) |
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| 233 | /// tmp2.word := Signed(SignExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1])) |
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| 234 | /// tmp3.word := Signed(SignExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2])) |
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| 235 | /// tmp4.word := Signed(SignExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3])) |
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| 236 | /// dst.dword[j] := __W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4 |
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| 237 | /// ENDFOR |
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| 238 | /// dst[MAX:256] := 0 |
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| 239 | /// \endcode |
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| 240 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
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| 241 | _mm256_dpbsud_epi32(__m256i __W, __m256i __A, __m256i __B) { |
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| 242 | return (__m256i)__builtin_ia32_vpdpbsud256((__v8si)__W, (__v8si)__A, |
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| 243 | (__v8si)__B); |
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| 244 | } |
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| 245 | |||
| 246 | /// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with |
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| 247 | /// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate |
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| 248 | /// signed 16-bit results. Sum these 4 results with the corresponding |
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| 249 | /// 32-bit integer in \a __W with signed saturation, and store the packed |
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| 250 | /// 32-bit results in \a dst. |
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| 251 | /// |
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| 252 | /// \headerfile <x86intrin.h> |
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| 253 | /// |
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| 254 | /// \code |
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| 255 | /// _mm_dpbsuds_epi32( __m128i __W, __m128i __A, __m128i __B); |
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| 256 | /// \endcode |
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| 257 | /// |
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| 258 | /// This intrinsic corresponds to the \c VPDPBSSD instruction. |
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| 259 | /// |
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| 260 | /// \param __A |
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| 261 | /// A 128-bit vector of [16 x char]. |
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| 262 | /// \param __B |
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| 263 | /// A 128-bit vector of [16 x unsigned char]. |
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| 264 | /// \returns |
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| 265 | /// A 128-bit vector of [4 x int]. |
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| 266 | /// |
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| 267 | /// \code{.operation} |
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| 268 | /// FOR j := 0 to 3 |
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| 269 | /// tmp1.word := Signed(SignExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j])) |
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| 270 | /// tmp2.word := Signed(SignExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1])) |
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| 271 | /// tmp3.word := Signed(SignExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2])) |
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| 272 | /// tmp4.word := Signed(SignExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3])) |
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| 273 | /// dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4) |
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| 274 | /// ENDFOR |
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| 275 | /// dst[MAX:128] := 0 |
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| 276 | /// \endcode |
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| 277 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpbsuds_epi32(__m128i __W, |
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| 278 | __m128i __A, |
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| 279 | __m128i __B) { |
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| 280 | return (__m128i)__builtin_ia32_vpdpbsuds128((__v4si)__W, (__v4si)__A, |
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| 281 | (__v4si)__B); |
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| 282 | } |
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| 283 | |||
| 284 | /// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with |
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| 285 | /// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate |
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| 286 | /// signed 16-bit results. Sum these 4 results with the corresponding |
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| 287 | /// 32-bit integer in \a __W with signed saturation, and store the packed |
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| 288 | /// 32-bit results in \a dst. |
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| 289 | /// |
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| 290 | /// \headerfile <x86intrin.h> |
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| 291 | /// |
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| 292 | /// \code |
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| 293 | /// _mm256_dpbsuds_epi32(__m256i __W, __m256i __A, __m256i __B); |
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| 294 | /// \endcode |
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| 295 | /// |
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| 296 | /// This intrinsic corresponds to the \c VPDPBSSD instruction. |
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| 297 | /// |
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| 298 | /// \param __A |
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| 299 | /// A 256-bit vector of [32 x char]. |
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| 300 | /// \param __B |
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| 301 | /// A 256-bit vector of [32 x unsigned char]. |
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| 302 | /// \returns |
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| 303 | /// A 256-bit vector of [8 x int]. |
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| 304 | /// |
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| 305 | /// \code{.operation} |
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| 306 | /// FOR j := 0 to 7 |
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| 307 | /// tmp1.word := Signed(SignExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j])) |
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| 308 | /// tmp2.word := Signed(SignExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1])) |
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| 309 | /// tmp3.word := Signed(SignExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2])) |
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| 310 | /// tmp4.word := Signed(SignExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3])) |
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| 311 | /// dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4) |
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| 312 | /// ENDFOR |
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| 313 | /// dst[MAX:256] := 0 |
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| 314 | /// \endcode |
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| 315 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
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| 316 | _mm256_dpbsuds_epi32(__m256i __W, __m256i __A, __m256i __B) { |
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| 317 | return (__m256i)__builtin_ia32_vpdpbsuds256((__v8si)__W, (__v8si)__A, |
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| 318 | (__v8si)__B); |
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| 319 | } |
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| 320 | |||
| 321 | /// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with |
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| 322 | /// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate |
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| 323 | /// signed 16-bit results. Sum these 4 results with the corresponding |
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| 324 | /// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. |
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| 325 | /// |
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| 326 | /// \headerfile <x86intrin.h> |
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| 327 | /// |
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| 328 | /// \code |
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| 329 | /// _mm_dpbuud_epi32(__m128i __W, __m128i __A, __m128i __B); |
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| 330 | /// \endcode |
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| 331 | /// |
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| 332 | /// This intrinsic corresponds to the \c VPDPBSSD instruction. |
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| 333 | /// |
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| 334 | /// \param __A |
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| 335 | /// A 128-bit vector of [16 x unsigned char]. |
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| 336 | /// \param __B |
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| 337 | /// A 128-bit vector of [16 x unsigned char]. |
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| 338 | /// \returns |
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| 339 | /// A 128-bit vector of [4 x int]. |
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| 340 | /// |
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| 341 | /// \code{.operation} |
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| 342 | /// FOR j := 0 to 3 |
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| 343 | /// tmp1.word := ZeroExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j]) |
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| 344 | /// tmp2.word := ZeroExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1]) |
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| 345 | /// tmp3.word := ZeroExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2]) |
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| 346 | /// tmp4.word := ZeroExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3]) |
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| 347 | /// dst.dword[j] := __W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4 |
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| 348 | /// ENDFOR |
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| 349 | /// dst[MAX:128] := 0 |
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| 350 | /// \endcode |
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| 351 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpbuud_epi32(__m128i __W, |
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| 352 | __m128i __A, |
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| 353 | __m128i __B) { |
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| 354 | return (__m128i)__builtin_ia32_vpdpbuud128((__v4si)__W, (__v4si)__A, |
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| 355 | (__v4si)__B); |
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| 356 | } |
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| 357 | |||
| 358 | /// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with |
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| 359 | /// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate |
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| 360 | /// signed 16-bit results. Sum these 4 results with the corresponding |
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| 361 | /// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. |
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| 362 | /// |
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| 363 | /// \headerfile <x86intrin.h> |
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| 364 | /// |
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| 365 | /// \code |
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| 366 | /// _mm256_dpbuud_epi32(__m256i __W, __m256i __A, __m256i __B); |
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| 367 | /// \endcode |
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| 368 | /// |
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| 369 | /// This intrinsic corresponds to the \c VPDPBSSD instruction. |
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| 370 | /// |
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| 371 | /// \param __A |
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| 372 | /// A 256-bit vector of [32 x unsigned char]. |
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| 373 | /// \param __B |
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| 374 | /// A 256-bit vector of [32 x unsigned char]. |
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| 375 | /// \returns |
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| 376 | /// A 256-bit vector of [8 x int]. |
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| 377 | /// |
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| 378 | /// \code{.operation} |
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| 379 | /// FOR j := 0 to 7 |
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| 380 | /// tmp1.word := ZeroExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j]) |
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| 381 | /// tmp2.word := ZeroExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1]) |
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| 382 | /// tmp3.word := ZeroExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2]) |
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| 383 | /// tmp4.word := ZeroExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3]) |
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| 384 | /// dst.dword[j] := __W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4 |
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| 385 | /// ENDFOR |
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| 386 | /// dst[MAX:256] := 0 |
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| 387 | /// \endcode |
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| 388 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
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| 389 | _mm256_dpbuud_epi32(__m256i __W, __m256i __A, __m256i __B) { |
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| 390 | return (__m256i)__builtin_ia32_vpdpbuud256((__v8si)__W, (__v8si)__A, |
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| 391 | (__v8si)__B); |
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| 392 | } |
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| 393 | |||
| 394 | /// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with |
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| 395 | /// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate |
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| 396 | /// signed 16-bit results. Sum these 4 results with the corresponding |
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| 397 | /// 32-bit integer in \a __W with signed saturation, and store the packed |
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| 398 | /// 32-bit results in \a dst. |
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| 399 | /// |
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| 400 | /// \headerfile <x86intrin.h> |
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| 401 | /// |
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| 402 | /// \code |
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| 403 | /// _mm_dpbuuds_epi32( __m128i __W, __m128i __A, __m128i __B); |
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| 404 | /// \endcode |
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| 405 | /// |
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| 406 | /// This intrinsic corresponds to the \c VPDPBUUDS instruction. |
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| 407 | /// |
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| 408 | /// \param __A |
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| 409 | /// A 128-bit vector of [16 x unsigned char]. |
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| 410 | /// \param __B |
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| 411 | /// A 128-bit vector of [16 x unsigned char]. |
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| 412 | /// \returns |
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| 413 | /// A 128-bit vector of [4 x int]. |
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| 414 | /// |
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| 415 | /// \code{.operation} |
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| 416 | /// FOR j := 0 to 3 |
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| 417 | /// tmp1.word := ZeroExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j]) |
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| 418 | /// tmp2.word := ZeroExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1]) |
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| 419 | /// tmp3.word := ZeroExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2]) |
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| 420 | /// tmp4.word := ZeroExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3]) |
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| 421 | /// dst.dword[j] := UNSIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4) |
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| 422 | /// ENDFOR |
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| 423 | /// dst[MAX:128] := 0 |
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| 424 | /// \endcode |
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| 425 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpbuuds_epi32(__m128i __W, |
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| 426 | __m128i __A, |
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| 427 | __m128i __B) { |
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| 428 | return (__m128i)__builtin_ia32_vpdpbuuds128((__v4si)__W, (__v4si)__A, |
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| 429 | (__v4si)__B); |
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| 430 | } |
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| 431 | |||
| 432 | /// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with |
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| 433 | /// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate |
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| 434 | /// signed 16-bit results. Sum these 4 results with the corresponding |
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| 435 | /// 32-bit integer in \a __W with signed saturation, and store the packed |
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| 436 | /// 32-bit results in \a dst. |
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| 437 | /// |
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| 438 | /// \headerfile <x86intrin.h> |
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| 439 | /// |
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| 440 | /// \code |
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| 441 | /// _mm256_dpbuuds_epi32(__m256i __W, __m256i __A, __m256i __B); |
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| 442 | /// \endcode |
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| 443 | /// |
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| 444 | /// This intrinsic corresponds to the \c VPDPBUUDS instruction. |
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| 445 | /// |
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| 446 | /// \param __A |
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| 447 | /// A 256-bit vector of [32 x unsigned char]. |
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| 448 | /// \param __B |
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| 449 | /// A 256-bit vector of [32 x unsigned char]. |
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| 450 | /// \returns |
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| 451 | /// A 256-bit vector of [8 x int]. |
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| 452 | /// |
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| 453 | /// \code{.operation} |
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| 454 | /// FOR j := 0 to 7 |
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| 455 | /// tmp1.word := ZeroExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j]) |
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| 456 | /// tmp2.word := ZeroExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1]) |
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| 457 | /// tmp3.word := ZeroExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2]) |
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| 458 | /// tmp4.word := ZeroExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3]) |
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| 459 | /// dst.dword[j] := UNSIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4) |
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| 460 | /// ENDFOR |
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| 461 | /// dst[MAX:256] := 0 |
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| 462 | /// \endcode |
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| 463 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
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| 464 | _mm256_dpbuuds_epi32(__m256i __W, __m256i __A, __m256i __B) { |
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| 465 | return (__m256i)__builtin_ia32_vpdpbuuds256((__v8si)__W, (__v8si)__A, |
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| 466 | (__v8si)__B); |
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| 467 | } |
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| 468 | #undef __DEFAULT_FN_ATTRS128 |
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| 469 | #undef __DEFAULT_FN_ATTRS256 |
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| 470 | |||
| 471 | #endif // __AVXVNNIINT8INTRIN_H |