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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 14 | pmbaty | 1 | //===- X86TargetParser.def - X86 target parsing defines ---------*- C++ -*-===// |
| 2 | // |
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| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
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| 4 | // See https://llvm.org/LICENSE.txt for license information. |
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| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
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| 6 | // |
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| 7 | //===----------------------------------------------------------------------===// |
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| 8 | // |
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| 9 | // This file provides defines to build up the X86 target parser's logic. |
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| 10 | // |
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| 11 | //===----------------------------------------------------------------------===// |
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| 12 | |||
| 13 | // NOTE: NO INCLUDE GUARD DESIRED! |
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| 14 | |||
| 15 | #ifndef X86_VENDOR |
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| 16 | #define X86_VENDOR(ENUM, STR) |
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| 17 | #endif |
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| 18 | X86_VENDOR(VENDOR_INTEL, "intel") |
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| 19 | X86_VENDOR(VENDOR_AMD, "amd") |
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| 20 | #undef X86_VENDOR |
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| 21 | |||
| 22 | // This macro is used for cpu types present in compiler-rt/libgcc. |
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| 23 | #ifndef X86_CPU_TYPE |
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| 24 | #define X86_CPU_TYPE(ENUM, STR) |
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| 25 | #endif |
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| 26 | |||
| 27 | #ifndef X86_CPU_TYPE_ALIAS |
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| 28 | #define X86_CPU_TYPE_ALIAS(ENUM, STR) |
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| 29 | #endif |
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| 30 | |||
| 31 | // This list must match what is implemented in libgcc and compilert-rt. Clang |
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| 32 | // uses this to know how to implement __builtin_cpu_is. |
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| 33 | X86_CPU_TYPE(INTEL_BONNELL, "bonnell") |
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| 34 | X86_CPU_TYPE(INTEL_CORE2, "core2") |
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| 35 | X86_CPU_TYPE(INTEL_COREI7, "corei7") |
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| 36 | X86_CPU_TYPE(AMDFAM10H, "amdfam10h") |
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| 37 | X86_CPU_TYPE(AMDFAM15H, "amdfam15h") |
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| 38 | X86_CPU_TYPE(INTEL_SILVERMONT, "silvermont") |
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| 39 | X86_CPU_TYPE(INTEL_KNL, "knl") |
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| 40 | X86_CPU_TYPE(AMD_BTVER1, "btver1") |
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| 41 | X86_CPU_TYPE(AMD_BTVER2, "btver2") |
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| 42 | X86_CPU_TYPE(AMDFAM17H, "amdfam17h") |
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| 43 | X86_CPU_TYPE(INTEL_KNM, "knm") |
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| 44 | X86_CPU_TYPE(INTEL_GOLDMONT, "goldmont") |
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| 45 | X86_CPU_TYPE(INTEL_GOLDMONT_PLUS, "goldmont-plus") |
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| 46 | X86_CPU_TYPE(INTEL_TREMONT, "tremont") |
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| 47 | X86_CPU_TYPE(AMDFAM19H, "amdfam19h") |
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| 48 | X86_CPU_TYPE(ZHAOXIN_FAM7H, "zhaoxin_fam7h") |
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| 49 | X86_CPU_TYPE(INTEL_SIERRAFOREST, "sierraforest") |
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| 50 | X86_CPU_TYPE(INTEL_GRANDRIDGE, "grandridge") |
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| 51 | |||
| 52 | // Alternate names supported by __builtin_cpu_is and target multiversioning. |
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| 53 | X86_CPU_TYPE_ALIAS(INTEL_BONNELL, "atom") |
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| 54 | X86_CPU_TYPE_ALIAS(AMDFAM10H, "amdfam10") |
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| 55 | X86_CPU_TYPE_ALIAS(AMDFAM15H, "amdfam15") |
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| 56 | X86_CPU_TYPE_ALIAS(INTEL_SILVERMONT, "slm") |
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| 57 | |||
| 58 | #undef X86_CPU_TYPE_ALIAS |
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| 59 | #undef X86_CPU_TYPE |
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| 60 | |||
| 61 | // This macro is used for cpu subtypes present in compiler-rt/libgcc. |
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| 62 | #ifndef X86_CPU_SUBTYPE |
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| 63 | #define X86_CPU_SUBTYPE(ENUM, STR) |
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| 64 | #endif |
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| 65 | |||
| 66 | #ifndef X86_CPU_SUBTYPE_ALIAS |
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| 67 | #define X86_CPU_SUBTYPE_ALIAS(ENUM, STR) |
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| 68 | #endif |
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| 69 | |||
| 70 | // This list must match what is implemented in libgcc and compilert-rt. Clang |
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| 71 | // uses this to know how to implement __builtin_cpu_is. |
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| 72 | X86_CPU_SUBTYPE(INTEL_COREI7_NEHALEM, "nehalem") |
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| 73 | X86_CPU_SUBTYPE(INTEL_COREI7_WESTMERE, "westmere") |
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| 74 | X86_CPU_SUBTYPE(INTEL_COREI7_SANDYBRIDGE, "sandybridge") |
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| 75 | X86_CPU_SUBTYPE(AMDFAM10H_BARCELONA, "barcelona") |
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| 76 | X86_CPU_SUBTYPE(AMDFAM10H_SHANGHAI, "shanghai") |
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| 77 | X86_CPU_SUBTYPE(AMDFAM10H_ISTANBUL, "istanbul") |
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| 78 | X86_CPU_SUBTYPE(AMDFAM15H_BDVER1, "bdver1") |
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| 79 | X86_CPU_SUBTYPE(AMDFAM15H_BDVER2, "bdver2") |
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| 80 | X86_CPU_SUBTYPE(AMDFAM15H_BDVER3, "bdver3") |
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| 81 | X86_CPU_SUBTYPE(AMDFAM15H_BDVER4, "bdver4") |
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| 82 | X86_CPU_SUBTYPE(AMDFAM17H_ZNVER1, "znver1") |
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| 83 | X86_CPU_SUBTYPE(INTEL_COREI7_IVYBRIDGE, "ivybridge") |
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| 84 | X86_CPU_SUBTYPE(INTEL_COREI7_HASWELL, "haswell") |
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| 85 | X86_CPU_SUBTYPE(INTEL_COREI7_BROADWELL, "broadwell") |
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| 86 | X86_CPU_SUBTYPE(INTEL_COREI7_SKYLAKE, "skylake") |
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| 87 | X86_CPU_SUBTYPE(INTEL_COREI7_SKYLAKE_AVX512, "skylake-avx512") |
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| 88 | X86_CPU_SUBTYPE(INTEL_COREI7_CANNONLAKE, "cannonlake") |
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| 89 | X86_CPU_SUBTYPE(INTEL_COREI7_ICELAKE_CLIENT, "icelake-client") |
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| 90 | X86_CPU_SUBTYPE(INTEL_COREI7_ICELAKE_SERVER, "icelake-server") |
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| 91 | X86_CPU_SUBTYPE(AMDFAM17H_ZNVER2, "znver2") |
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| 92 | X86_CPU_SUBTYPE(INTEL_COREI7_CASCADELAKE, "cascadelake") |
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| 93 | X86_CPU_SUBTYPE(INTEL_COREI7_TIGERLAKE, "tigerlake") |
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| 94 | X86_CPU_SUBTYPE(INTEL_COREI7_COOPERLAKE, "cooperlake") |
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| 95 | X86_CPU_SUBTYPE(INTEL_COREI7_SAPPHIRERAPIDS, "sapphirerapids") |
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| 96 | X86_CPU_SUBTYPE(INTEL_COREI7_ALDERLAKE, "alderlake") |
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| 97 | X86_CPU_SUBTYPE(AMDFAM19H_ZNVER3, "znver3") |
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| 98 | X86_CPU_SUBTYPE(INTEL_COREI7_ROCKETLAKE, "rocketlake") |
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| 99 | X86_CPU_SUBTYPE(ZHAOXIN_FAM7H_LUJIAZUI, "zhaoxin_fam7h_lujiazui") |
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| 100 | X86_CPU_SUBTYPE(AMDFAM19H_ZNVER4, "znver4") |
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| 101 | X86_CPU_SUBTYPE(INTEL_COREI7_GRANITERAPIDS, "graniterapids") |
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| 102 | |||
| 103 | // Alternate names supported by __builtin_cpu_is and target multiversioning. |
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| 104 | X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_ALDERLAKE, "raptorlake") |
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| 105 | X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_ALDERLAKE, "meteorlake") |
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| 106 | X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_SAPPHIRERAPIDS, "emeraldrapids") |
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| 107 | |||
| 108 | #undef X86_CPU_SUBTYPE_ALIAS |
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| 109 | #undef X86_CPU_SUBTYPE |
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| 110 | |||
| 111 | // This macro is used for cpu types present in compiler-rt/libgcc. The third |
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| 112 | // parameter PRIORITY is as required by the attribute 'target' checking. Note |
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| 113 | // that not all are supported/prioritized by GCC, so synchronization with GCC's |
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| 114 | // implementation may require changing some existing values. |
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| 115 | // |
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| 116 | // We cannot just re-sort the list though because its order is dictated by the |
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| 117 | // order of bits in CodeGenFunction::GetX86CpuSupportsMask. |
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| 118 | #ifndef X86_FEATURE_COMPAT |
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| 119 | #define X86_FEATURE_COMPAT(ENUM, STR, PRIORITY) X86_FEATURE(ENUM, STR) |
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| 120 | #endif |
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| 121 | |||
| 122 | #ifndef X86_FEATURE |
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| 123 | #define X86_FEATURE(ENUM, STR) |
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| 124 | #endif |
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| 125 | |||
| 126 | X86_FEATURE_COMPAT(CMOV, "cmov", 0) |
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| 127 | X86_FEATURE_COMPAT(MMX, "mmx", 1) |
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| 128 | X86_FEATURE_COMPAT(POPCNT, "popcnt", 9) |
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| 129 | X86_FEATURE_COMPAT(SSE, "sse", 2) |
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| 130 | X86_FEATURE_COMPAT(SSE2, "sse2", 3) |
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| 131 | X86_FEATURE_COMPAT(SSE3, "sse3", 4) |
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| 132 | X86_FEATURE_COMPAT(SSSE3, "ssse3", 5) |
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| 133 | X86_FEATURE_COMPAT(SSE4_1, "sse4.1", 7) |
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| 134 | X86_FEATURE_COMPAT(SSE4_2, "sse4.2", 8) |
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| 135 | X86_FEATURE_COMPAT(AVX, "avx", 12) |
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| 136 | X86_FEATURE_COMPAT(AVX2, "avx2", 18) |
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| 137 | X86_FEATURE_COMPAT(SSE4_A, "sse4a", 6) |
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| 138 | X86_FEATURE_COMPAT(FMA4, "fma4", 14) |
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| 139 | X86_FEATURE_COMPAT(XOP, "xop", 15) |
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| 140 | X86_FEATURE_COMPAT(FMA, "fma", 16) |
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| 141 | X86_FEATURE_COMPAT(AVX512F, "avx512f", 19) |
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| 142 | X86_FEATURE_COMPAT(BMI, "bmi", 13) |
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| 143 | X86_FEATURE_COMPAT(BMI2, "bmi2", 17) |
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| 144 | X86_FEATURE_COMPAT(AES, "aes", 10) |
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| 145 | X86_FEATURE_COMPAT(PCLMUL, "pclmul", 11) |
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| 146 | X86_FEATURE_COMPAT(AVX512VL, "avx512vl", 20) |
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| 147 | X86_FEATURE_COMPAT(AVX512BW, "avx512bw", 21) |
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| 148 | X86_FEATURE_COMPAT(AVX512DQ, "avx512dq", 22) |
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| 149 | X86_FEATURE_COMPAT(AVX512CD, "avx512cd", 23) |
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| 150 | X86_FEATURE_COMPAT(AVX512ER, "avx512er", 24) |
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| 151 | X86_FEATURE_COMPAT(AVX512PF, "avx512pf", 25) |
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| 152 | X86_FEATURE_COMPAT(AVX512VBMI, "avx512vbmi", 26) |
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| 153 | X86_FEATURE_COMPAT(AVX512IFMA, "avx512ifma", 27) |
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| 154 | X86_FEATURE_COMPAT(AVX5124VNNIW, "avx5124vnniw", 28) |
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| 155 | X86_FEATURE_COMPAT(AVX5124FMAPS, "avx5124fmaps", 29) |
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| 156 | X86_FEATURE_COMPAT(AVX512VPOPCNTDQ, "avx512vpopcntdq", 30) |
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| 157 | X86_FEATURE_COMPAT(AVX512VBMI2, "avx512vbmi2", 31) |
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| 158 | X86_FEATURE_COMPAT(GFNI, "gfni", 32) |
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| 159 | X86_FEATURE_COMPAT(VPCLMULQDQ, "vpclmulqdq", 33) |
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| 160 | X86_FEATURE_COMPAT(AVX512VNNI, "avx512vnni", 34) |
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| 161 | X86_FEATURE_COMPAT(AVX512BITALG, "avx512bitalg", 35) |
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| 162 | X86_FEATURE_COMPAT(AVX512BF16, "avx512bf16", 36) |
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| 163 | X86_FEATURE_COMPAT(AVX512VP2INTERSECT, "avx512vp2intersect", 37) |
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| 164 | // Features below here are not in libgcc/compiler-rt. |
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| 165 | X86_FEATURE (3DNOW, "3dnow") |
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| 166 | X86_FEATURE (3DNOWA, "3dnowa") |
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| 167 | X86_FEATURE (64BIT, "64bit") |
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| 168 | X86_FEATURE (ADX, "adx") |
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| 169 | X86_FEATURE (AMX_BF16, "amx-bf16") |
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| 170 | X86_FEATURE (AMX_INT8, "amx-int8") |
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| 171 | X86_FEATURE (AMX_TILE, "amx-tile") |
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| 172 | X86_FEATURE (CLDEMOTE, "cldemote") |
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| 173 | X86_FEATURE (CLFLUSHOPT, "clflushopt") |
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| 174 | X86_FEATURE (CLWB, "clwb") |
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| 175 | X86_FEATURE (CLZERO, "clzero") |
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| 176 | X86_FEATURE (CMPXCHG16B, "cx16") |
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| 177 | X86_FEATURE (CMPXCHG8B, "cx8") |
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| 178 | X86_FEATURE (CRC32, "crc32") |
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| 179 | X86_FEATURE (ENQCMD, "enqcmd") |
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| 180 | X86_FEATURE (F16C, "f16c") |
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| 181 | X86_FEATURE (FSGSBASE, "fsgsbase") |
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| 182 | X86_FEATURE (FXSR, "fxsr") |
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| 183 | X86_FEATURE (INVPCID, "invpcid") |
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| 184 | X86_FEATURE (KL, "kl") |
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| 185 | X86_FEATURE (WIDEKL, "widekl") |
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| 186 | X86_FEATURE (LWP, "lwp") |
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| 187 | X86_FEATURE (LZCNT, "lzcnt") |
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| 188 | X86_FEATURE (MOVBE, "movbe") |
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| 189 | X86_FEATURE (MOVDIR64B, "movdir64b") |
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| 190 | X86_FEATURE (MOVDIRI, "movdiri") |
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| 191 | X86_FEATURE (MWAITX, "mwaitx") |
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| 192 | X86_FEATURE (PCONFIG, "pconfig") |
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| 193 | X86_FEATURE (PKU, "pku") |
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| 194 | X86_FEATURE (PREFETCHI, "prefetchi") |
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| 195 | X86_FEATURE (PREFETCHWT1, "prefetchwt1") |
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| 196 | X86_FEATURE (PRFCHW, "prfchw") |
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| 197 | X86_FEATURE (PTWRITE, "ptwrite") |
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| 198 | X86_FEATURE (RDPID, "rdpid") |
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| 199 | X86_FEATURE (RDPRU, "rdpru") |
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| 200 | X86_FEATURE (RDRND, "rdrnd") |
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| 201 | X86_FEATURE (RDSEED, "rdseed") |
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| 202 | X86_FEATURE (RTM, "rtm") |
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| 203 | X86_FEATURE (SAHF, "sahf") |
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| 204 | X86_FEATURE (SERIALIZE, "serialize") |
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| 205 | X86_FEATURE (SGX, "sgx") |
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| 206 | X86_FEATURE (SHA, "sha") |
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| 207 | X86_FEATURE (SHSTK, "shstk") |
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| 208 | X86_FEATURE (TBM, "tbm") |
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| 209 | X86_FEATURE (TSXLDTRK, "tsxldtrk") |
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| 210 | X86_FEATURE (UINTR, "uintr") |
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| 211 | X86_FEATURE (VAES, "vaes") |
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| 212 | X86_FEATURE (VZEROUPPER, "vzeroupper") |
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| 213 | X86_FEATURE (WAITPKG, "waitpkg") |
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| 214 | X86_FEATURE (WBNOINVD, "wbnoinvd") |
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| 215 | X86_FEATURE (X87, "x87") |
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| 216 | X86_FEATURE (XSAVE, "xsave") |
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| 217 | X86_FEATURE (XSAVEC, "xsavec") |
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| 218 | X86_FEATURE (XSAVEOPT, "xsaveopt") |
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| 219 | X86_FEATURE (XSAVES, "xsaves") |
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| 220 | X86_FEATURE (HRESET, "hreset") |
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| 221 | X86_FEATURE (RAOINT, "raoint") |
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| 222 | X86_FEATURE (AVX512FP16, "avx512fp16") |
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| 223 | X86_FEATURE (AMX_FP16, "amx-fp16") |
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| 224 | X86_FEATURE (CMPCCXADD, "cmpccxadd") |
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| 225 | X86_FEATURE (AVXNECONVERT, "avxneconvert") |
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| 226 | X86_FEATURE (AVXVNNI, "avxvnni") |
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| 227 | X86_FEATURE (AVXIFMA, "avxifma") |
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| 228 | X86_FEATURE (AVXVNNIINT8, "avxvnniint8") |
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| 229 | // These features aren't really CPU features, but the frontend can set them. |
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| 230 | X86_FEATURE (RETPOLINE_EXTERNAL_THUNK, "retpoline-external-thunk") |
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| 231 | X86_FEATURE (RETPOLINE_INDIRECT_BRANCHES, "retpoline-indirect-branches") |
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| 232 | X86_FEATURE (RETPOLINE_INDIRECT_CALLS, "retpoline-indirect-calls") |
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| 233 | X86_FEATURE (LVI_CFI, "lvi-cfi") |
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| 234 | X86_FEATURE (LVI_LOAD_HARDENING, "lvi-load-hardening") |
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| 235 | #undef X86_FEATURE_COMPAT |
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| 236 | #undef X86_FEATURE |
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| 237 | |||
| 238 | #ifndef CPU_SPECIFIC |
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| 239 | #define CPU_SPECIFIC(NAME, TUNE_NAME, MANGLING, FEATURES) |
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| 240 | #endif |
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| 241 | |||
| 242 | #ifndef CPU_SPECIFIC_ALIAS |
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| 243 | #define CPU_SPECIFIC_ALIAS(NEW_NAME, TUNE_NAME, NAME) |
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| 244 | #endif |
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| 245 | |||
| 246 | CPU_SPECIFIC("generic", "generic", 'A', "") |
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| 247 | CPU_SPECIFIC("pentium", "pentium", 'B', "") |
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| 248 | CPU_SPECIFIC("pentium_pro", "pentiumpro", 'C', "+cmov") |
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| 249 | CPU_SPECIFIC("pentium_mmx", "pentium-mmx", 'D', "+mmx") |
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| 250 | CPU_SPECIFIC("pentium_ii", "pentium2", 'E', "+cmov,+mmx") |
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| 251 | CPU_SPECIFIC("pentium_iii", "pentium3", 'H', "+cmov,+mmx,+sse") |
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| 252 | CPU_SPECIFIC_ALIAS("pentium_iii_no_xmm_regs", "pentium3", "pentium_iii") |
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| 253 | CPU_SPECIFIC("pentium_4", "pentium4", 'J', "+cmov,+mmx,+sse,+sse2") |
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| 254 | CPU_SPECIFIC("pentium_m", "pentium-m", 'K', "+cmov,+mmx,+sse,+sse2") |
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| 255 | CPU_SPECIFIC("pentium_4_sse3", "prescott", 'L', "+cmov,+mmx,+sse,+sse2,+sse3") |
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| 256 | CPU_SPECIFIC("core_2_duo_ssse3", "core2", 'M', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3") |
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| 257 | CPU_SPECIFIC("core_2_duo_sse4_1", "penryn", 'N', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1") |
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| 258 | CPU_SPECIFIC("atom", "atom", 'O', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+movbe") |
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| 259 | CPU_SPECIFIC("atom_sse4_2", "silvermont", 'c', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt") |
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| 260 | CPU_SPECIFIC("core_i7_sse4_2", "nehalem", 'P', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt") |
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| 261 | CPU_SPECIFIC("core_aes_pclmulqdq", "westmere", 'Q', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt") |
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| 262 | CPU_SPECIFIC("atom_sse4_2_movbe", "silvermont", 'd', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt") |
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| 263 | CPU_SPECIFIC("goldmont", "goldmont", 'i', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt") |
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| 264 | CPU_SPECIFIC("sandybridge", "sandybridge", 'R', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt,+avx") |
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| 265 | CPU_SPECIFIC_ALIAS("core_2nd_gen_avx", "sandybridge", "sandybridge") |
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| 266 | CPU_SPECIFIC("ivybridge", "ivybridge", 'S', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt,+f16c,+avx") |
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| 267 | CPU_SPECIFIC_ALIAS("core_3rd_gen_avx", "ivybridge", "ivybridge") |
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| 268 | CPU_SPECIFIC("haswell", "haswell", 'V', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2") |
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| 269 | CPU_SPECIFIC_ALIAS("core_4th_gen_avx", "haswell", "haswell") |
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| 270 | CPU_SPECIFIC("core_4th_gen_avx_tsx", "haswell", 'W', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2") |
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| 271 | CPU_SPECIFIC("broadwell", "broadwell", 'X', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+adx") |
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| 272 | CPU_SPECIFIC_ALIAS("core_5th_gen_avx", "broadwell", "broadwell") |
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| 273 | CPU_SPECIFIC("core_5th_gen_avx_tsx", "broadwell", 'Y', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+adx") |
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| 274 | CPU_SPECIFIC("knl", "knl", 'Z', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512f,+adx,+avx512er,+avx512pf,+avx512cd") |
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| 275 | CPU_SPECIFIC_ALIAS("mic_avx512", "knl", "knl") |
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| 276 | CPU_SPECIFIC("skylake", "skylake", 'b', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+adx,+mpx") |
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| 277 | CPU_SPECIFIC( "skylake_avx512", "skylake-avx512", 'a', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512dq,+avx512f,+adx,+avx512cd,+avx512bw,+avx512vl,+clwb") |
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| 278 | CPU_SPECIFIC("cannonlake", "cannonlake", 'e', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512dq,+avx512f,+adx,+avx512ifma,+avx512cd,+avx512bw,+avx512vl,+avx512vbmi") |
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| 279 | CPU_SPECIFIC("knm", "knm", 'j', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512f,+adx,+avx512er,+avx512pf,+avx512cd,+avx5124fmaps,+avx5124vnniw,+avx512vpopcntdq") |
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| 280 | |||
| 281 | #undef CPU_SPECIFIC_ALIAS |
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| 282 | #undef CPU_SPECIFIC |