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| 14 | pmbaty | 1 | //===---------------------- RetireControlUnit.h -----------------*- C++ -*-===// |
| 2 | // |
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| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
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| 4 | // See https://llvm.org/LICENSE.txt for license information. |
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| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
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| 6 | // |
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| 7 | //===----------------------------------------------------------------------===// |
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| 8 | /// \file |
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| 9 | /// |
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| 10 | /// This file simulates the hardware responsible for retiring instructions. |
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| 11 | /// |
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| 12 | //===----------------------------------------------------------------------===// |
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| 13 | |||
| 14 | #ifndef LLVM_MCA_HARDWAREUNITS_RETIRECONTROLUNIT_H |
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| 15 | #define LLVM_MCA_HARDWAREUNITS_RETIRECONTROLUNIT_H |
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| 16 | |||
| 17 | #include "llvm/MC/MCSchedule.h" |
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| 18 | #include "llvm/MCA/HardwareUnits/HardwareUnit.h" |
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| 19 | #include "llvm/MCA/Instruction.h" |
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| 20 | #include <vector> |
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| 21 | |||
| 22 | namespace llvm { |
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| 23 | namespace mca { |
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| 24 | |||
| 25 | /// This class tracks which instructions are in-flight (i.e., dispatched but not |
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| 26 | /// retired) in the OoO backend. |
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| 27 | // |
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| 28 | /// This class checks on every cycle if/which instructions can be retired. |
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| 29 | /// Instructions are retired in program order. |
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| 30 | /// In the event of an instruction being retired, the pipeline that owns |
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| 31 | /// this RetireControlUnit (RCU) gets notified. |
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| 32 | /// |
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| 33 | /// On instruction retired, register updates are all architecturally |
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| 34 | /// committed, and any physicall registers previously allocated for the |
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| 35 | /// retired instruction are freed. |
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| 36 | struct RetireControlUnit : public HardwareUnit { |
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| 37 | // A RUToken is created by the RCU for every instruction dispatched to the |
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| 38 | // schedulers. These "tokens" are managed by the RCU in its token Queue. |
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| 39 | // |
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| 40 | // On every cycle ('cycleEvent'), the RCU iterates through the token queue |
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| 41 | // looking for any token with its 'Executed' flag set. If a token has that |
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| 42 | // flag set, then the instruction has reached the write-back stage and will |
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| 43 | // be retired by the RCU. |
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| 44 | // |
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| 45 | // 'NumSlots' represents the number of entries consumed by the instruction in |
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| 46 | // the reorder buffer. Those entries will become available again once the |
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| 47 | // instruction is retired. |
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| 48 | // |
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| 49 | // Note that the size of the reorder buffer is defined by the scheduling |
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| 50 | // model via field 'NumMicroOpBufferSize'. |
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| 51 | struct RUToken { |
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| 52 | InstRef IR; |
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| 53 | unsigned NumSlots; // Slots reserved to this instruction. |
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| 54 | bool Executed; // True if the instruction is past the WB stage. |
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| 55 | }; |
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| 56 | |||
| 57 | private: |
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| 58 | unsigned NextAvailableSlotIdx; |
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| 59 | unsigned CurrentInstructionSlotIdx; |
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| 60 | unsigned NumROBEntries; |
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| 61 | unsigned AvailableEntries; |
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| 62 | unsigned MaxRetirePerCycle; // 0 means no limit. |
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| 63 | std::vector<RUToken> Queue; |
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| 64 | |||
| 65 | unsigned normalizeQuantity(unsigned Quantity) const { |
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| 66 | // Some instructions may declare a number of uOps which exceeds the size |
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| 67 | // of the reorder buffer. To avoid problems, cap the amount of slots to |
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| 68 | // the size of the reorder buffer. |
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| 69 | Quantity = std::min(Quantity, NumROBEntries); |
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| 70 | |||
| 71 | // Further normalize the number of micro opcodes for instructions that |
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| 72 | // declare zero opcodes. This should match the behavior of method |
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| 73 | // reserveSlot(). |
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| 74 | return std::max(Quantity, 1U); |
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| 75 | } |
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| 76 | |||
| 77 | unsigned computeNextSlotIdx() const; |
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| 78 | |||
| 79 | public: |
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| 80 | RetireControlUnit(const MCSchedModel &SM); |
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| 81 | |||
| 82 | bool isEmpty() const { return AvailableEntries == NumROBEntries; } |
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| 83 | |||
| 84 | bool isAvailable(unsigned Quantity = 1) const { |
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| 85 | return AvailableEntries >= normalizeQuantity(Quantity); |
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| 86 | } |
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| 87 | |||
| 88 | unsigned getMaxRetirePerCycle() const { return MaxRetirePerCycle; } |
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| 89 | |||
| 90 | // Reserves a number of slots, and returns a new token reference. |
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| 91 | unsigned dispatch(const InstRef &IS); |
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| 92 | |||
| 93 | // Return the current token from the RCU's circular token queue. |
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| 94 | const RUToken &getCurrentToken() const; |
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| 95 | |||
| 96 | const RUToken &peekNextToken() const; |
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| 97 | |||
| 98 | // Advance the pointer to the next token in the circular token queue. |
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| 99 | void consumeCurrentToken(); |
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| 100 | |||
| 101 | // Update the RCU token to represent the executed state. |
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| 102 | void onInstructionExecuted(unsigned TokenID); |
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| 103 | |||
| 104 | #ifndef NDEBUG |
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| 105 | void dump() const; |
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| 106 | #endif |
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| 107 | |||
| 108 | // Assigned to instructions that are not handled by the RCU. |
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| 109 | static const unsigned UnhandledTokenID = ~0U; |
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| 110 | }; |
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| 111 | |||
| 112 | } // namespace mca |
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| 113 | } // namespace llvm |
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| 114 | |||
| 115 | #endif // LLVM_MCA_HARDWAREUNITS_RETIRECONTROLUNIT_H |