Subversion Repositories QNX 8.QNX8 LLVM/Clang compiler suite

//===- llvm/CodeGen/MachineInstr.h - MachineInstr class ---------*- C++ -*-===//

//

// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.

// See https://llvm.org/LICENSE.txt for license information.

// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception

//

//===----------------------------------------------------------------------===//

//

// This file contains the declaration of the MachineInstr class, which is the

// basic representation for all target dependent machine instructions used by

// the back end.

//

//===----------------------------------------------------------------------===//

#ifndef LLVM_CODEGEN_MACHINEINSTR_H

#define LLVM_CODEGEN_MACHINEINSTR_H

#include "llvm/ADT/DenseMapInfo.h"

#include "llvm/ADT/PointerSumType.h"

#include "llvm/ADT/SmallSet.h"

#include "llvm/ADT/ilist.h"

#include "llvm/ADT/ilist_node.h"

#include "llvm/ADT/iterator_range.h"

#include "llvm/CodeGen/MachineMemOperand.h"

#include "llvm/CodeGen/MachineOperand.h"

#include "llvm/CodeGen/TargetOpcodes.h"

#include "llvm/IR/DebugLoc.h"

#include "llvm/IR/InlineAsm.h"

#include "llvm/MC/MCInstrDesc.h"

#include "llvm/MC/MCSymbol.h"

#include "llvm/Support/ArrayRecycler.h"

#include "llvm/Support/TrailingObjects.h"

#include <algorithm>

#include <cassert>

#include <cstdint>

#include <utility>

namespace llvm {

class DILabel;

class Instruction;

class MDNode;

class AAResults;

template <typename T> class ArrayRef;

class DIExpression;

class DILocalVariable;

class MachineBasicBlock;

class MachineFunction;

class MachineRegisterInfo;

class ModuleSlotTracker;

class raw_ostream;

template <typename T> class SmallVectorImpl;

class SmallBitVector;

class StringRef;

class TargetInstrInfo;

class TargetRegisterClass;

class TargetRegisterInfo;

//===----------------------------------------------------------------------===//

/// Representation of each machine instruction.

///

/// This class isn't a POD type, but it must have a trivial destructor. When a

/// MachineFunction is deleted, all the contained MachineInstrs are deallocated

/// without having their destructor called.

///

class MachineInstr

    : public ilist_node_with_parent<MachineInstr, MachineBasicBlock,

                                    ilist_sentinel_tracking<true>> {

public:

  using mmo_iterator = ArrayRef<MachineMemOperand *>::iterator;

  /// Flags to specify different kinds of comments to output in

  /// assembly code.  These flags carry semantic information not

  /// otherwise easily derivable from the IR text.

  ///

  enum CommentFlag {

    ReloadReuse = 0x1,    // higher bits are reserved for target dep comments.

    NoSchedComment = 0x2,

    TAsmComments = 0x4    // Target Asm comments should start from this value.

  };

  enum MIFlag {

    NoFlags      = 0,

    FrameSetup   = 1 << 0,              // Instruction is used as a part of

                                        // function frame setup code.

    FrameDestroy = 1 << 1,              // Instruction is used as a part of

                                        // function frame destruction code.

    BundledPred  = 1 << 2,              // Instruction has bundled predecessors.

    BundledSucc  = 1 << 3,              // Instruction has bundled successors.

    FmNoNans     = 1 << 4,              // Instruction does not support Fast

                                        // math nan values.

    FmNoInfs     = 1 << 5,              // Instruction does not support Fast

                                        // math infinity values.

    FmNsz        = 1 << 6,              // Instruction is not required to retain

                                        // signed zero values.

    FmArcp       = 1 << 7,              // Instruction supports Fast math

                                        // reciprocal approximations.

    FmContract   = 1 << 8,              // Instruction supports Fast math

                                        // contraction operations like fma.

    FmAfn        = 1 << 9,              // Instruction may map to Fast math

                                        // intrinsic approximation.

    FmReassoc    = 1 << 10,             // Instruction supports Fast math

                                        // reassociation of operand order.

    NoUWrap      = 1 << 11,             // Instruction supports binary operator

                                        // no unsigned wrap.

    NoSWrap      = 1 << 12,             // Instruction supports binary operator

                                        // no signed wrap.

    IsExact      = 1 << 13,             // Instruction supports division is

                                        // known to be exact.

    NoFPExcept   = 1 << 14,             // Instruction does not raise

                                        // floatint-point exceptions.

    NoMerge      = 1 << 15,             // Passes that drop source location info

                                        // (e.g. branch folding) should skip

                                        // this instruction.

  };

private:

  const MCInstrDesc *MCID;              // Instruction descriptor.

  MachineBasicBlock *Parent = nullptr;  // Pointer to the owning basic block.

  // Operands are allocated by an ArrayRecycler.

  MachineOperand *Operands = nullptr;   // Pointer to the first operand.

  unsigned NumOperands = 0;             // Number of operands on instruction.

  uint16_t Flags = 0;                   // Various bits of additional

                                        // information about machine

                                        // instruction.

  uint8_t AsmPrinterFlags = 0;          // Various bits of information used by

                                        // the AsmPrinter to emit helpful

                                        // comments.  This is *not* semantic

                                        // information.  Do not use this for

                                        // anything other than to convey comment

                                        // information to AsmPrinter.

  // OperandCapacity has uint8_t size, so it should be next to AsmPrinterFlags

  // to properly pack.

  using OperandCapacity = ArrayRecycler<MachineOperand>::Capacity;

  OperandCapacity CapOperands;          // Capacity of the Operands array.

  /// Internal implementation detail class that provides out-of-line storage for

  /// extra info used by the machine instruction when this info cannot be stored

  /// in-line within the instruction itself.

  ///

  /// This has to be defined eagerly due to the implementation constraints of

  /// `PointerSumType` where it is used.

  class ExtraInfo final : TrailingObjects<ExtraInfo, MachineMemOperand *,

                                          MCSymbol *, MDNode *, uint32_t> {

  public:

    static ExtraInfo *create(BumpPtrAllocator &Allocator,

                             ArrayRef<MachineMemOperand *> MMOs,

                             MCSymbol *PreInstrSymbol = nullptr,

                             MCSymbol *PostInstrSymbol = nullptr,

                             MDNode *HeapAllocMarker = nullptr,

                             MDNode *PCSections = nullptr,

                             uint32_t CFIType = 0) {

      bool HasPreInstrSymbol = PreInstrSymbol != nullptr;

      bool HasPostInstrSymbol = PostInstrSymbol != nullptr;

      bool HasHeapAllocMarker = HeapAllocMarker != nullptr;

      bool HasCFIType = CFIType != 0;

      bool HasPCSections = PCSections != nullptr;

      auto *Result = new (Allocator.Allocate(

          totalSizeToAlloc<MachineMemOperand *, MCSymbol *, MDNode *, uint32_t>(

              MMOs.size(), HasPreInstrSymbol + HasPostInstrSymbol,

              HasHeapAllocMarker + HasPCSections, HasCFIType),

          alignof(ExtraInfo)))

          ExtraInfo(MMOs.size(), HasPreInstrSymbol, HasPostInstrSymbol,

                    HasHeapAllocMarker, HasPCSections, HasCFIType);

      // Copy the actual data into the trailing objects.

      std::copy(MMOs.begin(), MMOs.end(),

                Result->getTrailingObjects<MachineMemOperand *>());

      if (HasPreInstrSymbol)

        Result->getTrailingObjects<MCSymbol *>()[0] = PreInstrSymbol;

      if (HasPostInstrSymbol)

        Result->getTrailingObjects<MCSymbol *>()[HasPreInstrSymbol] =

            PostInstrSymbol;

      if (HasHeapAllocMarker)

        Result->getTrailingObjects<MDNode *>()[0] = HeapAllocMarker;

      if (HasPCSections)

        Result->getTrailingObjects<MDNode *>()[HasHeapAllocMarker] =

            PCSections;

      if (HasCFIType)

        Result->getTrailingObjects<uint32_t>()[0] = CFIType;

      return Result;

    }

    ArrayRef<MachineMemOperand *> getMMOs() const {

      return ArrayRef(getTrailingObjects<MachineMemOperand *>(), NumMMOs);

    }

    MCSymbol *getPreInstrSymbol() const {

      return HasPreInstrSymbol ? getTrailingObjects<MCSymbol *>()[0] : nullptr;

    }

    MCSymbol *getPostInstrSymbol() const {

      return HasPostInstrSymbol

                 ? getTrailingObjects<MCSymbol *>()[HasPreInstrSymbol]

                 : nullptr;

    }

    MDNode *getHeapAllocMarker() const {

      return HasHeapAllocMarker ? getTrailingObjects<MDNode *>()[0] : nullptr;

    }

    MDNode *getPCSections() const {

      return HasPCSections

                 ? getTrailingObjects<MDNode *>()[HasHeapAllocMarker]

                 : nullptr;

    }

    uint32_t getCFIType() const {

      return HasCFIType ? getTrailingObjects<uint32_t>()[0] : 0;

    }

  private:

    friend TrailingObjects;

    // Description of the extra info, used to interpret the actual optional

    // data appended.

    //

    // Note that this is not terribly space optimized. This leaves a great deal

    // of flexibility to fit more in here later.

    const int NumMMOs;

    const bool HasPreInstrSymbol;

    const bool HasPostInstrSymbol;

    const bool HasHeapAllocMarker;

    const bool HasPCSections;

    const bool HasCFIType;

    // Implement the `TrailingObjects` internal API.

    size_t numTrailingObjects(OverloadToken<MachineMemOperand *>) const {

      return NumMMOs;

    }

    size_t numTrailingObjects(OverloadToken<MCSymbol *>) const {

      return HasPreInstrSymbol + HasPostInstrSymbol;

    }

    size_t numTrailingObjects(OverloadToken<MDNode *>) const {

      return HasHeapAllocMarker + HasPCSections;

    }

    size_t numTrailingObjects(OverloadToken<uint32_t>) const {

      return HasCFIType;

    }

    // Just a boring constructor to allow us to initialize the sizes. Always use

    // the `create` routine above.

    ExtraInfo(int NumMMOs, bool HasPreInstrSymbol, bool HasPostInstrSymbol,

              bool HasHeapAllocMarker, bool HasPCSections, bool HasCFIType)

        : NumMMOs(NumMMOs), HasPreInstrSymbol(HasPreInstrSymbol),

          HasPostInstrSymbol(HasPostInstrSymbol),

          HasHeapAllocMarker(HasHeapAllocMarker), HasPCSections(HasPCSections),

          HasCFIType(HasCFIType) {}

  };

  /// Enumeration of the kinds of inline extra info available. It is important

  /// that the `MachineMemOperand` inline kind has a tag value of zero to make

  /// it accessible as an `ArrayRef`.

  enum ExtraInfoInlineKinds {

    EIIK_MMO = 0,

    EIIK_PreInstrSymbol,

    EIIK_PostInstrSymbol,

    EIIK_OutOfLine

  };

  // We store extra information about the instruction here. The common case is

  // expected to be nothing or a single pointer (typically a MMO or a symbol).

  // We work to optimize this common case by storing it inline here rather than

  // requiring a separate allocation, but we fall back to an allocation when

  // multiple pointers are needed.

  PointerSumType<ExtraInfoInlineKinds,

                 PointerSumTypeMember<EIIK_MMO, MachineMemOperand *>,

                 PointerSumTypeMember<EIIK_PreInstrSymbol, MCSymbol *>,

                 PointerSumTypeMember<EIIK_PostInstrSymbol, MCSymbol *>,

                 PointerSumTypeMember<EIIK_OutOfLine, ExtraInfo *>>

      Info;

  DebugLoc DbgLoc; // Source line information.

  /// Unique instruction number. Used by DBG_INSTR_REFs to refer to the values

  /// defined by this instruction.

  unsigned DebugInstrNum;

  // Intrusive list support

  friend struct ilist_traits<MachineInstr>;

  friend struct ilist_callback_traits<MachineBasicBlock>;

  void setParent(MachineBasicBlock *P) { Parent = P; }

  /// This constructor creates a copy of the given

  /// MachineInstr in the given MachineFunction.

  MachineInstr(MachineFunction &, const MachineInstr &);

  /// This constructor create a MachineInstr and add the implicit operands.

  /// It reserves space for number of operands specified by

  /// MCInstrDesc.  An explicit DebugLoc is supplied.

  MachineInstr(MachineFunction &, const MCInstrDesc &TID, DebugLoc DL,

               bool NoImp = false);

  // MachineInstrs are pool-allocated and owned by MachineFunction.

  friend class MachineFunction;

  void

  dumprImpl(const MachineRegisterInfo &MRI, unsigned Depth, unsigned MaxDepth,

            SmallPtrSetImpl<const MachineInstr *> &AlreadySeenInstrs) const;

public:

  MachineInstr(const MachineInstr &) = delete;

  MachineInstr &operator=(const MachineInstr &) = delete;

  // Use MachineFunction::DeleteMachineInstr() instead.

  ~MachineInstr() = delete;

  const MachineBasicBlock* getParent() const { return Parent; }

  MachineBasicBlock* getParent() { return Parent; }

  /// Move the instruction before \p MovePos.

  void moveBefore(MachineInstr *MovePos);

  /// Return the function that contains the basic block that this instruction

  /// belongs to.

  ///

  /// Note: this is undefined behaviour if the instruction does not have a

  /// parent.

  const MachineFunction *getMF() const;

  MachineFunction *getMF() {

    return const_cast<MachineFunction *>(

        static_cast<const MachineInstr *>(this)->getMF());

  }

  /// Return the asm printer flags bitvector.

  uint8_t getAsmPrinterFlags() const { return AsmPrinterFlags; }

  /// Clear the AsmPrinter bitvector.

  void clearAsmPrinterFlags() { AsmPrinterFlags = 0; }

  /// Return whether an AsmPrinter flag is set.

  bool getAsmPrinterFlag(CommentFlag Flag) const {

    return AsmPrinterFlags & Flag;

  }

  /// Set a flag for the AsmPrinter.

  void setAsmPrinterFlag(uint8_t Flag) {

    AsmPrinterFlags |= Flag;

  }

  /// Clear specific AsmPrinter flags.

  void clearAsmPrinterFlag(CommentFlag Flag) {

    AsmPrinterFlags &= ~Flag;

  }

  /// Return the MI flags bitvector.

  uint16_t getFlags() const {

    return Flags;

  }

  /// Return whether an MI flag is set.

  bool getFlag(MIFlag Flag) const {

    return Flags & Flag;

  }

  /// Set a MI flag.

  void setFlag(MIFlag Flag) {

    Flags |= (uint16_t)Flag;

  }

  void setFlags(unsigned flags) {

    // Filter out the automatically maintained flags.

    unsigned Mask = BundledPred | BundledSucc;

    Flags = (Flags & Mask) | (flags & ~Mask);

  }

  /// clearFlag - Clear a MI flag.

  void clearFlag(MIFlag Flag) {

    Flags &= ~((uint16_t)Flag);

  }

  /// Return true if MI is in a bundle (but not the first MI in a bundle).

  ///

  /// A bundle looks like this before it's finalized:

  ///   ----------------

  ///   |      MI      |

  ///   ----------------

  ///          |

  ///   ----------------

  ///   |      MI    * |

  ///   ----------------

  ///          |

  ///   ----------------

  ///   |      MI    * |

  ///   ----------------

  /// In this case, the first MI starts a bundle but is not inside a bundle, the

  /// next 2 MIs are considered "inside" the bundle.

  ///

  /// After a bundle is finalized, it looks like this:

  ///   ----------------

  ///   |    Bundle    |

  ///   ----------------

  ///          |

  ///   ----------------

  ///   |      MI    * |

  ///   ----------------

  ///          |

  ///   ----------------

  ///   |      MI    * |

  ///   ----------------

  ///          |

  ///   ----------------

  ///   |      MI    * |

  ///   ----------------

  /// The first instruction has the special opcode "BUNDLE". It's not "inside"

  /// a bundle, but the next three MIs are.

  bool isInsideBundle() const {

    return getFlag(BundledPred);

  }

  /// Return true if this instruction part of a bundle. This is true

  /// if either itself or its following instruction is marked "InsideBundle".

  bool isBundled() const {

    return isBundledWithPred() || isBundledWithSucc();

  }

  /// Return true if this instruction is part of a bundle, and it is not the

  /// first instruction in the bundle.

  bool isBundledWithPred() const { return getFlag(BundledPred); }

  /// Return true if this instruction is part of a bundle, and it is not the

  /// last instruction in the bundle.

  bool isBundledWithSucc() const { return getFlag(BundledSucc); }

  /// Bundle this instruction with its predecessor. This can be an unbundled

  /// instruction, or it can be the first instruction in a bundle.

  void bundleWithPred();

  /// Bundle this instruction with its successor. This can be an unbundled

  /// instruction, or it can be the last instruction in a bundle.

  void bundleWithSucc();

  /// Break bundle above this instruction.

  void unbundleFromPred();

  /// Break bundle below this instruction.

  void unbundleFromSucc();

  /// Returns the debug location id of this MachineInstr.

  const DebugLoc &getDebugLoc() const { return DbgLoc; }

  /// Return the operand containing the offset to be used if this DBG_VALUE

  /// instruction is indirect; will be an invalid register if this value is

  /// not indirect, and an immediate with value 0 otherwise.

  const MachineOperand &getDebugOffset() const {

    assert(isNonListDebugValue() && "not a DBG_VALUE");

    return getOperand(1);

  }

  MachineOperand &getDebugOffset() {

    assert(isNonListDebugValue() && "not a DBG_VALUE");

    return getOperand(1);

  }

  /// Return the operand for the debug variable referenced by

  /// this DBG_VALUE instruction.

  const MachineOperand &getDebugVariableOp() const;

  MachineOperand &getDebugVariableOp();

  /// Return the debug variable referenced by

  /// this DBG_VALUE instruction.

  const DILocalVariable *getDebugVariable() const;

  /// Return the operand for the complex address expression referenced by

  /// this DBG_VALUE instruction.

  const MachineOperand &getDebugExpressionOp() const;

  MachineOperand &getDebugExpressionOp();

  /// Return the complex address expression referenced by

  /// this DBG_VALUE instruction.

  const DIExpression *getDebugExpression() const;

  /// Return the debug label referenced by

  /// this DBG_LABEL instruction.

  const DILabel *getDebugLabel() const;

  /// Fetch the instruction number of this MachineInstr. If it does not have

  /// one already, a new and unique number will be assigned.

  unsigned getDebugInstrNum();

  /// Fetch instruction number of this MachineInstr -- but before it's inserted

  /// into \p MF. Needed for transformations that create an instruction but

  /// don't immediately insert them.

  unsigned getDebugInstrNum(MachineFunction &MF);

  /// Examine the instruction number of this MachineInstr. May be zero if

  /// it hasn't been assigned a number yet.

  unsigned peekDebugInstrNum() const { return DebugInstrNum; }

  /// Set instruction number of this MachineInstr. Avoid using unless you're

  /// deserializing this information.

  void setDebugInstrNum(unsigned Num) { DebugInstrNum = Num; }

  /// Drop any variable location debugging information associated with this

  /// instruction. Use when an instruction is modified in such a way that it no

  /// longer defines the value it used to. Variable locations using that value

  /// will be dropped.

  void dropDebugNumber() { DebugInstrNum = 0; }

  /// Emit an error referring to the source location of this instruction.

  /// This should only be used for inline assembly that is somehow

  /// impossible to compile. Other errors should have been handled much

  /// earlier.

  ///

  /// If this method returns, the caller should try to recover from the error.

  void emitError(StringRef Msg) const;

  /// Returns the target instruction descriptor of this MachineInstr.

  const MCInstrDesc &getDesc() const { return *MCID; }

  /// Returns the opcode of this MachineInstr.

  unsigned getOpcode() const { return MCID->Opcode; }

  /// Retuns the total number of operands.

  unsigned getNumOperands() const { return NumOperands; }

  /// Returns the total number of operands which are debug locations.

  unsigned getNumDebugOperands() const {

    return std::distance(debug_operands().begin(), debug_operands().end());

  }

  const MachineOperand& getOperand(unsigned i) const {

    assert(i < getNumOperands() && "getOperand() out of range!");

    return Operands[i];

  }

  MachineOperand& getOperand(unsigned i) {

    assert(i < getNumOperands() && "getOperand() out of range!");

    return Operands[i];

  }

  MachineOperand &getDebugOperand(unsigned Index) {

    assert(Index < getNumDebugOperands() && "getDebugOperand() out of range!");

    return *(debug_operands().begin() + Index);

  }

  const MachineOperand &getDebugOperand(unsigned Index) const {

    assert(Index < getNumDebugOperands() && "getDebugOperand() out of range!");

    return *(debug_operands().begin() + Index);

  }

  SmallSet<Register, 4> getUsedDebugRegs() const {

    assert(isDebugValue() && "not a DBG_VALUE*");

    SmallSet<Register, 4> UsedRegs;

    for (const auto &MO : debug_operands())

      if (MO.isReg() && MO.getReg())

        UsedRegs.insert(MO.getReg());

    return UsedRegs;

  }

  /// Returns whether this debug value has at least one debug operand with the

  /// register \p Reg.

  bool hasDebugOperandForReg(Register Reg) const {

    return any_of(debug_operands(), [Reg](const MachineOperand &Op) {

      return Op.isReg() && Op.getReg() == Reg;

    });

  }

  /// Returns a range of all of the operands that correspond to a debug use of

  /// \p Reg.

  template <typename Operand, typename Instruction>

  static iterator_range<

      filter_iterator<Operand *, std::function<bool(Operand &Op)>>>

  getDebugOperandsForReg(Instruction *MI, Register Reg) {

    std::function<bool(Operand & Op)> OpUsesReg(

        [Reg](Operand &Op) { return Op.isReg() && Op.getReg() == Reg; });

    return make_filter_range(MI->debug_operands(), OpUsesReg);

  }

  iterator_range<filter_iterator<const MachineOperand *,

                                 std::function<bool(const MachineOperand &Op)>>>

  getDebugOperandsForReg(Register Reg) const {

    return MachineInstr::getDebugOperandsForReg<const MachineOperand,

                                                const MachineInstr>(this, Reg);

  }

  iterator_range<filter_iterator<MachineOperand *,

                                 std::function<bool(MachineOperand &Op)>>>

  getDebugOperandsForReg(Register Reg) {

    return MachineInstr::getDebugOperandsForReg<MachineOperand, MachineInstr>(

        this, Reg);

  }

  bool isDebugOperand(const MachineOperand *Op) const {

    return Op >= adl_begin(debug_operands()) && Op <= adl_end(debug_operands());

  }

  unsigned getDebugOperandIndex(const MachineOperand *Op) const {

    assert(isDebugOperand(Op) && "Expected a debug operand.");

    return std::distance(adl_begin(debug_operands()), Op);

  }

  /// Returns the total number of definitions.

  unsigned getNumDefs() const {

    return getNumExplicitDefs() + MCID->implicit_defs().size();

  }

  /// Returns true if the instruction has implicit definition.

  bool hasImplicitDef() const {

    for (const MachineOperand &MO : implicit_operands())

      if (MO.isDef() && MO.isImplicit())

        return true;

    return false;

  }

  /// Returns the implicit operands number.

  unsigned getNumImplicitOperands() const {

    return getNumOperands() - getNumExplicitOperands();

  }

  /// Return true if operand \p OpIdx is a subregister index.

  bool isOperandSubregIdx(unsigned OpIdx) const {

    assert(getOperand(OpIdx).isImm() && "Expected MO_Immediate operand type.");

    if (isExtractSubreg() && OpIdx == 2)

      return true;

    if (isInsertSubreg() && OpIdx == 3)

      return true;

    if (isRegSequence() && OpIdx > 1 && (OpIdx % 2) == 0)

      return true;

    if (isSubregToReg() && OpIdx == 3)

      return true;

    return false;

  }

  /// Returns the number of non-implicit operands.

  unsigned getNumExplicitOperands() const;

  /// Returns the number of non-implicit definitions.

  unsigned getNumExplicitDefs() const;

  /// iterator/begin/end - Iterate over all operands of a machine instruction.

  using mop_iterator = MachineOperand *;

  using const_mop_iterator = const MachineOperand *;

  mop_iterator operands_begin() { return Operands; }

  mop_iterator operands_end() { return Operands + NumOperands; }

  const_mop_iterator operands_begin() const { return Operands; }

  const_mop_iterator operands_end() const { return Operands + NumOperands; }

  iterator_range<mop_iterator> operands() {

    return make_range(operands_begin(), operands_end());

  }

  iterator_range<const_mop_iterator> operands() const {

    return make_range(operands_begin(), operands_end());

  }

  iterator_range<mop_iterator> explicit_operands() {

    return make_range(operands_begin(),

                      operands_begin() + getNumExplicitOperands());

  }

  iterator_range<const_mop_iterator> explicit_operands() const {

    return make_range(operands_begin(),

                      operands_begin() + getNumExplicitOperands());

  }

  iterator_range<mop_iterator> implicit_operands() {

    return make_range(explicit_operands().end(), operands_end());

  }

  iterator_range<const_mop_iterator> implicit_operands() const {

    return make_range(explicit_operands().end(), operands_end());

  }

  /// Returns a range over all operands that are used to determine the variable

  /// location for this DBG_VALUE instruction.

  iterator_range<mop_iterator> debug_operands() {

    assert((isDebugValueLike()) && "Must be a debug value instruction.");

    return isNonListDebugValue()

               ? make_range(operands_begin(), operands_begin() + 1)

               : make_range(operands_begin() + 2, operands_end());

  }

  /// \copydoc debug_operands()

  iterator_range<const_mop_iterator> debug_operands() const {

    assert((isDebugValueLike()) && "Must be a debug value instruction.");

    return isNonListDebugValue()

               ? make_range(operands_begin(), operands_begin() + 1)

               : make_range(operands_begin() + 2, operands_end());

  }

  /// Returns a range over all explicit operands that are register definitions.

  /// Implicit definition are not included!

  iterator_range<mop_iterator> defs() {

    return make_range(operands_begin(),

                      operands_begin() + getNumExplicitDefs());

  }

  /// \copydoc defs()

  iterator_range<const_mop_iterator> defs() const {

    return make_range(operands_begin(),

                      operands_begin() + getNumExplicitDefs());

  }

  /// Returns a range that includes all operands that are register uses.

  /// This may include unrelated operands which are not register uses.

  iterator_range<mop_iterator> uses() {

    return make_range(operands_begin() + getNumExplicitDefs(), operands_end());

  }

  /// \copydoc uses()

  iterator_range<const_mop_iterator> uses() const {

    return make_range(operands_begin() + getNumExplicitDefs(), operands_end());

  }

  iterator_range<mop_iterator> explicit_uses() {

    return make_range(operands_begin() + getNumExplicitDefs(),

                      operands_begin() + getNumExplicitOperands());

  }

  iterator_range<const_mop_iterator> explicit_uses() const {

    return make_range(operands_begin() + getNumExplicitDefs(),

                      operands_begin() + getNumExplicitOperands());

  }

  /// Returns the number of the operand iterator \p I points to.

  unsigned getOperandNo(const_mop_iterator I) const {

    return I - operands_begin();

  }

  /// Access to memory operands of the instruction. If there are none, that does

  /// not imply anything about whether the function accesses memory. Instead,

  /// the caller must behave conservatively.

  ArrayRef<MachineMemOperand *> memoperands() const {

    if (!Info)

      return {};

    if (Info.is<EIIK_MMO>())

      return ArrayRef(Info.getAddrOfZeroTagPointer(), 1);

    if (ExtraInfo *EI = Info.get<EIIK_OutOfLine>())

      return EI->getMMOs();

    return {};

  }

  /// Access to memory operands of the instruction.

  ///

  /// If `memoperands_begin() == memoperands_end()`, that does not imply

  /// anything about whether the function accesses memory. Instead, the caller

  /// must behave conservatively.

  mmo_iterator memoperands_begin() const { return memoperands().begin(); }

  /// Access to memory operands of the instruction.

  ///

  /// If `memoperands_begin() == memoperands_end()`, that does not imply

  /// anything about whether the function accesses memory. Instead, the caller

  /// must behave conservatively.

  mmo_iterator memoperands_end() const { return memoperands().end(); }

  /// Return true if we don't have any memory operands which described the

  /// memory access done by this instruction.  If this is true, calling code

  /// must be conservative.

  bool memoperands_empty() const { return memoperands().empty(); }

  /// Return true if this instruction has exactly one MachineMemOperand.

  bool hasOneMemOperand() const { return memoperands().size() == 1; }

  /// Return the number of memory operands.

  unsigned getNumMemOperands() const { return memoperands().size(); }

  /// Helper to extract a pre-instruction symbol if one has been added.

  MCSymbol *getPreInstrSymbol() const {

    if (!Info)

      return nullptr;

    if (MCSymbol *S = Info.get<EIIK_PreInstrSymbol>())

      return S;

    if (ExtraInfo *EI = Info.get<EIIK_OutOfLine>())

      return EI->getPreInstrSymbol();

    return nullptr;

  }

  /// Helper to extract a post-instruction symbol if one has been added.

  MCSymbol *getPostInstrSymbol() const {

    if (!Info)

      return nullptr;

    if (MCSymbol *S = Info.get<EIIK_PostInstrSymbol>())

      return S;

    if (ExtraInfo *EI = Info.get<EIIK_OutOfLine>())

      return EI->getPostInstrSymbol();

    return nullptr;

  }

  /// Helper to extract a heap alloc marker if one has been added.

  MDNode *getHeapAllocMarker() const {

    if (!Info)

      return nullptr;

    if (ExtraInfo *EI = Info.get<EIIK_OutOfLine>())

      return EI->getHeapAllocMarker();

    return nullptr;

  }

  /// Helper to extract PCSections metadata target sections.

  MDNode *getPCSections() const {

    if (!Info)

      return nullptr;

    if (ExtraInfo *EI = Info.get<EIIK_OutOfLine>())