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Rev | Author | Line No. | Line |
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14 | pmbaty | 1 | #ifdef GET_NEON_BUILTINS |
2 | TARGET_BUILTIN(__builtin_neon___a32_vcvt_bf16_f32, "V8ScV16Sci", "n", "bf16") |
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3 | TARGET_BUILTIN(__builtin_neon___a64_vcvtq_low_bf16_f32, "V16ScV16Sci", "n", "bf16") |
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4 | TARGET_BUILTIN(__builtin_neon_splat_lane_bf16, "V8ScV8ScIii", "n", "bf16") |
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5 | BUILTIN(__builtin_neon_splat_lane_v, "V8ScV8ScIii", "n") |
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6 | TARGET_BUILTIN(__builtin_neon_splat_laneq_bf16, "V8ScV16ScIii", "n", "bf16") |
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7 | BUILTIN(__builtin_neon_splat_laneq_v, "V8ScV16ScIii", "n") |
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8 | TARGET_BUILTIN(__builtin_neon_splatq_lane_bf16, "V16ScV8ScIii", "n", "bf16") |
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9 | BUILTIN(__builtin_neon_splatq_lane_v, "V16ScV8ScIii", "n") |
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10 | TARGET_BUILTIN(__builtin_neon_splatq_laneq_bf16, "V16ScV16ScIii", "n", "bf16") |
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11 | BUILTIN(__builtin_neon_splatq_laneq_v, "V16ScV16ScIii", "n") |
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12 | TARGET_BUILTIN(__builtin_neon_vabd_f16, "V8ScV8ScV8Sci", "n", "fullfp16") |
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13 | BUILTIN(__builtin_neon_vabd_v, "V8ScV8ScV8Sci", "n") |
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14 | BUILTIN(__builtin_neon_vabdd_f64, "ddd", "n") |
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15 | TARGET_BUILTIN(__builtin_neon_vabdq_f16, "V16ScV16ScV16Sci", "n", "fullfp16") |
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16 | BUILTIN(__builtin_neon_vabdq_v, "V16ScV16ScV16Sci", "n") |
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17 | BUILTIN(__builtin_neon_vabds_f32, "fff", "n") |
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18 | TARGET_BUILTIN(__builtin_neon_vabs_f16, "V8ScV8Sci", "n", "fullfp16") |
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19 | BUILTIN(__builtin_neon_vabs_v, "V8ScV8Sci", "n") |
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20 | BUILTIN(__builtin_neon_vabsd_s64, "WiWi", "n") |
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21 | TARGET_BUILTIN(__builtin_neon_vabsq_f16, "V16ScV16Sci", "n", "fullfp16") |
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22 | BUILTIN(__builtin_neon_vabsq_v, "V16ScV16Sci", "n") |
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23 | BUILTIN(__builtin_neon_vadd_v, "V8ScV8ScV8Sci", "n") |
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24 | BUILTIN(__builtin_neon_vaddd_s64, "WiWiWi", "n") |
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25 | BUILTIN(__builtin_neon_vaddd_u64, "UWiUWiUWi", "n") |
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26 | BUILTIN(__builtin_neon_vaddhn_v, "V8ScV16ScV16Sci", "n") |
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27 | BUILTIN(__builtin_neon_vaddlv_s16, "iV4s", "n") |
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28 | BUILTIN(__builtin_neon_vaddlv_s32, "WiV2i", "n") |
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29 | BUILTIN(__builtin_neon_vaddlv_s8, "sV8Sc", "n") |
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30 | BUILTIN(__builtin_neon_vaddlv_u16, "UiV4Us", "n") |
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31 | BUILTIN(__builtin_neon_vaddlv_u32, "UWiV2Ui", "n") |
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32 | BUILTIN(__builtin_neon_vaddlv_u8, "UsV8Uc", "n") |
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33 | BUILTIN(__builtin_neon_vaddlvq_s16, "iV8s", "n") |
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34 | BUILTIN(__builtin_neon_vaddlvq_s32, "WiV4i", "n") |
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35 | BUILTIN(__builtin_neon_vaddlvq_s8, "sV16Sc", "n") |
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36 | BUILTIN(__builtin_neon_vaddlvq_u16, "UiV8Us", "n") |
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37 | BUILTIN(__builtin_neon_vaddlvq_u32, "UWiV4Ui", "n") |
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38 | BUILTIN(__builtin_neon_vaddlvq_u8, "UsV16Uc", "n") |
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39 | BUILTIN(__builtin_neon_vaddq_p128, "ULLLiULLLiULLLi", "n") |
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40 | BUILTIN(__builtin_neon_vaddq_v, "V16ScV16ScV16Sci", "n") |
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41 | BUILTIN(__builtin_neon_vaddv_f32, "fV2f", "n") |
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42 | BUILTIN(__builtin_neon_vaddv_s16, "sV4s", "n") |
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43 | BUILTIN(__builtin_neon_vaddv_s32, "iV2i", "n") |
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44 | BUILTIN(__builtin_neon_vaddv_s8, "ScV8Sc", "n") |
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45 | BUILTIN(__builtin_neon_vaddv_u16, "UsV4Us", "n") |
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46 | BUILTIN(__builtin_neon_vaddv_u32, "UiV2Ui", "n") |
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47 | BUILTIN(__builtin_neon_vaddv_u8, "UcV8Uc", "n") |
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48 | BUILTIN(__builtin_neon_vaddvq_f32, "fV4f", "n") |
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49 | BUILTIN(__builtin_neon_vaddvq_f64, "dV2d", "n") |
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50 | BUILTIN(__builtin_neon_vaddvq_s16, "sV8s", "n") |
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51 | BUILTIN(__builtin_neon_vaddvq_s32, "iV4i", "n") |
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52 | BUILTIN(__builtin_neon_vaddvq_s64, "WiV2Wi", "n") |
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53 | BUILTIN(__builtin_neon_vaddvq_s8, "ScV16Sc", "n") |
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54 | BUILTIN(__builtin_neon_vaddvq_u16, "UsV8Us", "n") |
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55 | BUILTIN(__builtin_neon_vaddvq_u32, "UiV4Ui", "n") |
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56 | BUILTIN(__builtin_neon_vaddvq_u64, "UWiV2UWi", "n") |
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57 | BUILTIN(__builtin_neon_vaddvq_u8, "UcV16Uc", "n") |
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58 | TARGET_BUILTIN(__builtin_neon_vaesdq_u8, "V16ScV16ScV16Sci", "n", "aes") |
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59 | TARGET_BUILTIN(__builtin_neon_vaeseq_u8, "V16ScV16ScV16Sci", "n", "aes") |
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60 | TARGET_BUILTIN(__builtin_neon_vaesimcq_u8, "V16ScV16Sci", "n", "aes") |
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61 | TARGET_BUILTIN(__builtin_neon_vaesmcq_u8, "V16ScV16Sci", "n", "aes") |
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62 | TARGET_BUILTIN(__builtin_neon_vbcaxq_s16, "V16ScV16ScV16ScV16Sci", "n", "sha3") |
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63 | TARGET_BUILTIN(__builtin_neon_vbcaxq_s32, "V16ScV16ScV16ScV16Sci", "n", "sha3") |
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64 | TARGET_BUILTIN(__builtin_neon_vbcaxq_s64, "V16ScV16ScV16ScV16Sci", "n", "sha3") |
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65 | TARGET_BUILTIN(__builtin_neon_vbcaxq_s8, "V16ScV16ScV16ScV16Sci", "n", "sha3") |
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66 | TARGET_BUILTIN(__builtin_neon_vbcaxq_u16, "V16ScV16ScV16ScV16Sci", "n", "sha3") |
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67 | TARGET_BUILTIN(__builtin_neon_vbcaxq_u32, "V16ScV16ScV16ScV16Sci", "n", "sha3") |
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68 | TARGET_BUILTIN(__builtin_neon_vbcaxq_u64, "V16ScV16ScV16ScV16Sci", "n", "sha3") |
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69 | TARGET_BUILTIN(__builtin_neon_vbcaxq_u8, "V16ScV16ScV16ScV16Sci", "n", "sha3") |
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70 | TARGET_BUILTIN(__builtin_neon_vbfdot_f32, "V8ScV8ScV8ScV8Sci", "n", "bf16") |
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71 | TARGET_BUILTIN(__builtin_neon_vbfdotq_f32, "V16ScV16ScV16ScV16Sci", "n", "bf16") |
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72 | TARGET_BUILTIN(__builtin_neon_vbfmlalbq_f32, "V16ScV16ScV16ScV16Sci", "n", "bf16") |
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73 | TARGET_BUILTIN(__builtin_neon_vbfmlaltq_f32, "V16ScV16ScV16ScV16Sci", "n", "bf16") |
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74 | TARGET_BUILTIN(__builtin_neon_vbfmmlaq_f32, "V16ScV16ScV16ScV16Sci", "n", "bf16") |
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75 | TARGET_BUILTIN(__builtin_neon_vbsl_f16, "V8ScV8ScV8ScV8Sci", "n", "fullfp16") |
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76 | BUILTIN(__builtin_neon_vbsl_v, "V8ScV8ScV8ScV8Sci", "n") |
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77 | TARGET_BUILTIN(__builtin_neon_vbslq_f16, "V16ScV16ScV16ScV16Sci", "n", "fullfp16") |
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78 | BUILTIN(__builtin_neon_vbslq_v, "V16ScV16ScV16ScV16Sci", "n") |
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79 | TARGET_BUILTIN(__builtin_neon_vcadd_rot270_f16, "V8ScV8ScV8Sci", "n", "v8.3a,fullfp16") |
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80 | TARGET_BUILTIN(__builtin_neon_vcadd_rot270_f32, "V8ScV8ScV8Sci", "n", "v8.3a") |
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81 | TARGET_BUILTIN(__builtin_neon_vcadd_rot90_f16, "V8ScV8ScV8Sci", "n", "v8.3a,fullfp16") |
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82 | TARGET_BUILTIN(__builtin_neon_vcadd_rot90_f32, "V8ScV8ScV8Sci", "n", "v8.3a") |
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83 | TARGET_BUILTIN(__builtin_neon_vcaddq_rot270_f16, "V16ScV16ScV16Sci", "n", "v8.3a,fullfp16") |
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84 | TARGET_BUILTIN(__builtin_neon_vcaddq_rot270_f32, "V16ScV16ScV16Sci", "n", "v8.3a") |
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85 | TARGET_BUILTIN(__builtin_neon_vcaddq_rot270_f64, "V16ScV16ScV16Sci", "n", "v8.3a") |
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86 | TARGET_BUILTIN(__builtin_neon_vcaddq_rot90_f16, "V16ScV16ScV16Sci", "n", "v8.3a,fullfp16") |
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87 | TARGET_BUILTIN(__builtin_neon_vcaddq_rot90_f32, "V16ScV16ScV16Sci", "n", "v8.3a") |
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88 | TARGET_BUILTIN(__builtin_neon_vcaddq_rot90_f64, "V16ScV16ScV16Sci", "n", "v8.3a") |
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89 | TARGET_BUILTIN(__builtin_neon_vcage_f16, "V8ScV8ScV8Sci", "n", "fullfp16") |
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90 | BUILTIN(__builtin_neon_vcage_v, "V8ScV8ScV8Sci", "n") |
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91 | BUILTIN(__builtin_neon_vcaged_f64, "UWidd", "n") |
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92 | TARGET_BUILTIN(__builtin_neon_vcageq_f16, "V16ScV16ScV16Sci", "n", "fullfp16") |
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93 | BUILTIN(__builtin_neon_vcageq_v, "V16ScV16ScV16Sci", "n") |
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94 | BUILTIN(__builtin_neon_vcages_f32, "Uiff", "n") |
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95 | TARGET_BUILTIN(__builtin_neon_vcagt_f16, "V8ScV8ScV8Sci", "n", "fullfp16") |
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96 | BUILTIN(__builtin_neon_vcagt_v, "V8ScV8ScV8Sci", "n") |
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97 | BUILTIN(__builtin_neon_vcagtd_f64, "UWidd", "n") |
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98 | TARGET_BUILTIN(__builtin_neon_vcagtq_f16, "V16ScV16ScV16Sci", "n", "fullfp16") |
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99 | BUILTIN(__builtin_neon_vcagtq_v, "V16ScV16ScV16Sci", "n") |
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100 | BUILTIN(__builtin_neon_vcagts_f32, "Uiff", "n") |
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101 | TARGET_BUILTIN(__builtin_neon_vcale_f16, "V8ScV8ScV8Sci", "n", "fullfp16") |
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102 | BUILTIN(__builtin_neon_vcale_v, "V8ScV8ScV8Sci", "n") |
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103 | BUILTIN(__builtin_neon_vcaled_f64, "UWidd", "n") |
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104 | TARGET_BUILTIN(__builtin_neon_vcaleq_f16, "V16ScV16ScV16Sci", "n", "fullfp16") |
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105 | BUILTIN(__builtin_neon_vcaleq_v, "V16ScV16ScV16Sci", "n") |
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106 | BUILTIN(__builtin_neon_vcales_f32, "Uiff", "n") |
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107 | TARGET_BUILTIN(__builtin_neon_vcalt_f16, "V8ScV8ScV8Sci", "n", "fullfp16") |
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108 | BUILTIN(__builtin_neon_vcalt_v, "V8ScV8ScV8Sci", "n") |
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109 | BUILTIN(__builtin_neon_vcaltd_f64, "UWidd", "n") |
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110 | TARGET_BUILTIN(__builtin_neon_vcaltq_f16, "V16ScV16ScV16Sci", "n", "fullfp16") |
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111 | BUILTIN(__builtin_neon_vcaltq_v, "V16ScV16ScV16Sci", "n") |
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112 | BUILTIN(__builtin_neon_vcalts_f32, "Uiff", "n") |
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113 | BUILTIN(__builtin_neon_vceqd_f64, "UWidd", "n") |
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114 | BUILTIN(__builtin_neon_vceqd_s64, "UWiWiWi", "n") |
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115 | BUILTIN(__builtin_neon_vceqd_u64, "UWiUWiUWi", "n") |
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116 | BUILTIN(__builtin_neon_vceqs_f32, "Uiff", "n") |
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117 | TARGET_BUILTIN(__builtin_neon_vceqz_f16, "V8ScV8Sci", "n", "fullfp16") |
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118 | BUILTIN(__builtin_neon_vceqz_v, "V8ScV8Sci", "n") |
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119 | BUILTIN(__builtin_neon_vceqzd_f64, "UWid", "n") |
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120 | BUILTIN(__builtin_neon_vceqzd_s64, "UWiWi", "n") |
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121 | BUILTIN(__builtin_neon_vceqzd_u64, "UWiUWi", "n") |
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122 | TARGET_BUILTIN(__builtin_neon_vceqzq_f16, "V16ScV16Sci", "n", "fullfp16") |
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123 | BUILTIN(__builtin_neon_vceqzq_v, "V16ScV16Sci", "n") |
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124 | BUILTIN(__builtin_neon_vceqzs_f32, "Uif", "n") |
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125 | BUILTIN(__builtin_neon_vcged_f64, "UWidd", "n") |
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126 | BUILTIN(__builtin_neon_vcged_s64, "UWiWiWi", "n") |
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127 | BUILTIN(__builtin_neon_vcged_u64, "UWiUWiUWi", "n") |
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128 | BUILTIN(__builtin_neon_vcges_f32, "Uiff", "n") |
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129 | TARGET_BUILTIN(__builtin_neon_vcgez_f16, "V8ScV8Sci", "n", "fullfp16") |
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130 | BUILTIN(__builtin_neon_vcgez_v, "V8ScV8Sci", "n") |
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131 | BUILTIN(__builtin_neon_vcgezd_f64, "UWid", "n") |
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132 | BUILTIN(__builtin_neon_vcgezd_s64, "UWiWi", "n") |
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133 | TARGET_BUILTIN(__builtin_neon_vcgezq_f16, "V16ScV16Sci", "n", "fullfp16") |
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134 | BUILTIN(__builtin_neon_vcgezq_v, "V16ScV16Sci", "n") |
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135 | BUILTIN(__builtin_neon_vcgezs_f32, "Uif", "n") |
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136 | BUILTIN(__builtin_neon_vcgtd_f64, "UWidd", "n") |
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137 | BUILTIN(__builtin_neon_vcgtd_s64, "UWiWiWi", "n") |
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138 | BUILTIN(__builtin_neon_vcgtd_u64, "UWiUWiUWi", "n") |
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139 | BUILTIN(__builtin_neon_vcgts_f32, "Uiff", "n") |
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140 | TARGET_BUILTIN(__builtin_neon_vcgtz_f16, "V8ScV8Sci", "n", "fullfp16") |
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141 | BUILTIN(__builtin_neon_vcgtz_v, "V8ScV8Sci", "n") |
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142 | BUILTIN(__builtin_neon_vcgtzd_f64, "UWid", "n") |
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143 | BUILTIN(__builtin_neon_vcgtzd_s64, "UWiWi", "n") |
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144 | TARGET_BUILTIN(__builtin_neon_vcgtzq_f16, "V16ScV16Sci", "n", "fullfp16") |
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145 | BUILTIN(__builtin_neon_vcgtzq_v, "V16ScV16Sci", "n") |
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146 | BUILTIN(__builtin_neon_vcgtzs_f32, "Uif", "n") |
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147 | BUILTIN(__builtin_neon_vcled_f64, "UWidd", "n") |
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148 | BUILTIN(__builtin_neon_vcled_s64, "UWiWiWi", "n") |
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149 | BUILTIN(__builtin_neon_vcled_u64, "UWiUWiUWi", "n") |
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150 | BUILTIN(__builtin_neon_vcles_f32, "Uiff", "n") |
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151 | TARGET_BUILTIN(__builtin_neon_vclez_f16, "V8ScV8Sci", "n", "fullfp16") |
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152 | BUILTIN(__builtin_neon_vclez_v, "V8ScV8Sci", "n") |
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153 | BUILTIN(__builtin_neon_vclezd_f64, "UWid", "n") |
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154 | BUILTIN(__builtin_neon_vclezd_s64, "UWiWi", "n") |
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155 | TARGET_BUILTIN(__builtin_neon_vclezq_f16, "V16ScV16Sci", "n", "fullfp16") |
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156 | BUILTIN(__builtin_neon_vclezq_v, "V16ScV16Sci", "n") |
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157 | BUILTIN(__builtin_neon_vclezs_f32, "Uif", "n") |
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158 | BUILTIN(__builtin_neon_vcls_v, "V8ScV8Sci", "n") |
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159 | BUILTIN(__builtin_neon_vclsq_v, "V16ScV16Sci", "n") |
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160 | BUILTIN(__builtin_neon_vcltd_f64, "UWidd", "n") |
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161 | BUILTIN(__builtin_neon_vcltd_s64, "UWiWiWi", "n") |
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162 | BUILTIN(__builtin_neon_vcltd_u64, "UWiUWiUWi", "n") |
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163 | BUILTIN(__builtin_neon_vclts_f32, "Uiff", "n") |
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164 | TARGET_BUILTIN(__builtin_neon_vcltz_f16, "V8ScV8Sci", "n", "fullfp16") |
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165 | BUILTIN(__builtin_neon_vcltz_v, "V8ScV8Sci", "n") |
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166 | BUILTIN(__builtin_neon_vcltzd_f64, "UWid", "n") |
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167 | BUILTIN(__builtin_neon_vcltzd_s64, "UWiWi", "n") |
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168 | TARGET_BUILTIN(__builtin_neon_vcltzq_f16, "V16ScV16Sci", "n", "fullfp16") |
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169 | BUILTIN(__builtin_neon_vcltzq_v, "V16ScV16Sci", "n") |
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170 | BUILTIN(__builtin_neon_vcltzs_f32, "Uif", "n") |
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171 | BUILTIN(__builtin_neon_vclz_v, "V8ScV8Sci", "n") |
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172 | BUILTIN(__builtin_neon_vclzq_v, "V16ScV16Sci", "n") |
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173 | TARGET_BUILTIN(__builtin_neon_vcmla_f16, "V8ScV8ScV8ScV8Sci", "n", "v8.3a,fullfp16") |
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174 | TARGET_BUILTIN(__builtin_neon_vcmla_f32, "V8ScV8ScV8ScV8Sci", "n", "v8.3a") |
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175 | TARGET_BUILTIN(__builtin_neon_vcmla_f64, "V8ScV8ScV8ScV8Sci", "n", "v8.3a") |
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176 | TARGET_BUILTIN(__builtin_neon_vcmla_rot180_f16, "V8ScV8ScV8ScV8Sci", "n", "v8.3a,fullfp16") |
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177 | TARGET_BUILTIN(__builtin_neon_vcmla_rot180_f32, "V8ScV8ScV8ScV8Sci", "n", "v8.3a") |
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178 | TARGET_BUILTIN(__builtin_neon_vcmla_rot180_f64, "V8ScV8ScV8ScV8Sci", "n", "v8.3a") |
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179 | TARGET_BUILTIN(__builtin_neon_vcmla_rot270_f16, "V8ScV8ScV8ScV8Sci", "n", "v8.3a,fullfp16") |
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180 | TARGET_BUILTIN(__builtin_neon_vcmla_rot270_f32, "V8ScV8ScV8ScV8Sci", "n", "v8.3a") |
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181 | TARGET_BUILTIN(__builtin_neon_vcmla_rot270_f64, "V8ScV8ScV8ScV8Sci", "n", "v8.3a") |
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182 | TARGET_BUILTIN(__builtin_neon_vcmla_rot90_f16, "V8ScV8ScV8ScV8Sci", "n", "v8.3a,fullfp16") |
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183 | TARGET_BUILTIN(__builtin_neon_vcmla_rot90_f32, "V8ScV8ScV8ScV8Sci", "n", "v8.3a") |
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184 | TARGET_BUILTIN(__builtin_neon_vcmla_rot90_f64, "V8ScV8ScV8ScV8Sci", "n", "v8.3a") |
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185 | TARGET_BUILTIN(__builtin_neon_vcmlaq_f16, "V16ScV16ScV16ScV16Sci", "n", "v8.3a,fullfp16") |
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186 | TARGET_BUILTIN(__builtin_neon_vcmlaq_f32, "V16ScV16ScV16ScV16Sci", "n", "v8.3a") |
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187 | TARGET_BUILTIN(__builtin_neon_vcmlaq_f64, "V16ScV16ScV16ScV16Sci", "n", "v8.3a") |
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188 | TARGET_BUILTIN(__builtin_neon_vcmlaq_rot180_f16, "V16ScV16ScV16ScV16Sci", "n", "v8.3a,fullfp16") |
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189 | TARGET_BUILTIN(__builtin_neon_vcmlaq_rot180_f32, "V16ScV16ScV16ScV16Sci", "n", "v8.3a") |
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190 | TARGET_BUILTIN(__builtin_neon_vcmlaq_rot180_f64, "V16ScV16ScV16ScV16Sci", "n", "v8.3a") |
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191 | TARGET_BUILTIN(__builtin_neon_vcmlaq_rot270_f16, "V16ScV16ScV16ScV16Sci", "n", "v8.3a,fullfp16") |
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192 | TARGET_BUILTIN(__builtin_neon_vcmlaq_rot270_f32, "V16ScV16ScV16ScV16Sci", "n", "v8.3a") |
||
193 | TARGET_BUILTIN(__builtin_neon_vcmlaq_rot270_f64, "V16ScV16ScV16ScV16Sci", "n", "v8.3a") |
||
194 | TARGET_BUILTIN(__builtin_neon_vcmlaq_rot90_f16, "V16ScV16ScV16ScV16Sci", "n", "v8.3a,fullfp16") |
||
195 | TARGET_BUILTIN(__builtin_neon_vcmlaq_rot90_f32, "V16ScV16ScV16ScV16Sci", "n", "v8.3a") |
||
196 | TARGET_BUILTIN(__builtin_neon_vcmlaq_rot90_f64, "V16ScV16ScV16ScV16Sci", "n", "v8.3a") |
||
197 | BUILTIN(__builtin_neon_vcnt_v, "V8ScV8Sci", "n") |
||
198 | BUILTIN(__builtin_neon_vcntq_v, "V16ScV16Sci", "n") |
||
199 | BUILTIN(__builtin_neon_vcvt_f16_f32, "V8ScV16Sci", "n") |
||
200 | TARGET_BUILTIN(__builtin_neon_vcvt_f16_s16, "V8ScV8Sci", "n", "fullfp16") |
||
201 | TARGET_BUILTIN(__builtin_neon_vcvt_f16_u16, "V8ScV8Sci", "n", "fullfp16") |
||
202 | BUILTIN(__builtin_neon_vcvt_f32_f16, "V16ScV8Sci", "n") |
||
203 | BUILTIN(__builtin_neon_vcvt_f32_f64, "V8ScV16Sci", "n") |
||
204 | BUILTIN(__builtin_neon_vcvt_f32_v, "V8ScV8Sci", "n") |
||
205 | BUILTIN(__builtin_neon_vcvt_f64_f32, "V16ScV8Sci", "n") |
||
206 | BUILTIN(__builtin_neon_vcvt_f64_v, "V8ScV8Sci", "n") |
||
207 | TARGET_BUILTIN(__builtin_neon_vcvt_n_f16_s16, "V8ScV8ScIii", "n", "fullfp16") |
||
208 | TARGET_BUILTIN(__builtin_neon_vcvt_n_f16_u16, "V8ScV8ScIii", "n", "fullfp16") |
||
209 | BUILTIN(__builtin_neon_vcvt_n_f32_v, "V8ScV8ScIii", "n") |
||
210 | BUILTIN(__builtin_neon_vcvt_n_f64_v, "V8ScV8ScIii", "n") |
||
211 | TARGET_BUILTIN(__builtin_neon_vcvt_n_s16_f16, "V8ScV8ScIii", "n", "fullfp16") |
||
212 | BUILTIN(__builtin_neon_vcvt_n_s32_v, "V8ScV8ScIii", "n") |
||
213 | BUILTIN(__builtin_neon_vcvt_n_s64_v, "V8ScV8ScIii", "n") |
||
214 | TARGET_BUILTIN(__builtin_neon_vcvt_n_u16_f16, "V8ScV8ScIii", "n", "fullfp16") |
||
215 | BUILTIN(__builtin_neon_vcvt_n_u32_v, "V8ScV8ScIii", "n") |
||
216 | BUILTIN(__builtin_neon_vcvt_n_u64_v, "V8ScV8ScIii", "n") |
||
217 | TARGET_BUILTIN(__builtin_neon_vcvt_s16_f16, "V8ScV8Sci", "n", "fullfp16") |
||
218 | BUILTIN(__builtin_neon_vcvt_s32_v, "V8ScV8Sci", "n") |
||
219 | BUILTIN(__builtin_neon_vcvt_s64_v, "V8ScV8Sci", "n") |
||
220 | TARGET_BUILTIN(__builtin_neon_vcvt_u16_f16, "V8ScV8Sci", "n", "fullfp16") |
||
221 | BUILTIN(__builtin_neon_vcvt_u32_v, "V8ScV8Sci", "n") |
||
222 | BUILTIN(__builtin_neon_vcvt_u64_v, "V8ScV8Sci", "n") |
||
223 | TARGET_BUILTIN(__builtin_neon_vcvta_s16_f16, "V8ScV8Sci", "n", "fullfp16") |
||
224 | BUILTIN(__builtin_neon_vcvta_s32_v, "V8ScV8Sci", "n") |
||
225 | BUILTIN(__builtin_neon_vcvta_s64_v, "V8ScV8Sci", "n") |
||
226 | TARGET_BUILTIN(__builtin_neon_vcvta_u16_f16, "V8ScV8Sci", "n", "fullfp16") |
||
227 | BUILTIN(__builtin_neon_vcvta_u32_v, "V8ScV8Sci", "n") |
||
228 | BUILTIN(__builtin_neon_vcvta_u64_v, "V8ScV8Sci", "n") |
||
229 | BUILTIN(__builtin_neon_vcvtad_s64_f64, "Wid", "n") |
||
230 | BUILTIN(__builtin_neon_vcvtad_u64_f64, "UWid", "n") |
||
231 | TARGET_BUILTIN(__builtin_neon_vcvtaq_s16_f16, "V16ScV16Sci", "n", "fullfp16") |
||
232 | BUILTIN(__builtin_neon_vcvtaq_s32_v, "V16ScV16Sci", "n") |
||
233 | BUILTIN(__builtin_neon_vcvtaq_s64_v, "V16ScV16Sci", "n") |
||
234 | TARGET_BUILTIN(__builtin_neon_vcvtaq_u16_f16, "V16ScV16Sci", "n", "fullfp16") |
||
235 | BUILTIN(__builtin_neon_vcvtaq_u32_v, "V16ScV16Sci", "n") |
||
236 | BUILTIN(__builtin_neon_vcvtaq_u64_v, "V16ScV16Sci", "n") |
||
237 | BUILTIN(__builtin_neon_vcvtas_s32_f32, "if", "n") |
||
238 | BUILTIN(__builtin_neon_vcvtas_u32_f32, "Uif", "n") |
||
239 | BUILTIN(__builtin_neon_vcvtd_f64_s64, "dWi", "n") |
||
240 | BUILTIN(__builtin_neon_vcvtd_f64_u64, "dUWi", "n") |
||
241 | BUILTIN(__builtin_neon_vcvtd_n_f64_s64, "dWiIi", "n") |
||
242 | BUILTIN(__builtin_neon_vcvtd_n_f64_u64, "dUWiIi", "n") |
||
243 | BUILTIN(__builtin_neon_vcvtd_n_s64_f64, "WidIi", "n") |
||
244 | BUILTIN(__builtin_neon_vcvtd_n_u64_f64, "UWidIi", "n") |
||
245 | BUILTIN(__builtin_neon_vcvtd_s64_f64, "Wid", "n") |
||
246 | BUILTIN(__builtin_neon_vcvtd_u64_f64, "UWid", "n") |
||
247 | TARGET_BUILTIN(__builtin_neon_vcvth_bf16_f32, "yf", "n", "bf16") |
||
248 | TARGET_BUILTIN(__builtin_neon_vcvtm_s16_f16, "V8ScV8Sci", "n", "fullfp16") |
||
249 | BUILTIN(__builtin_neon_vcvtm_s32_v, "V8ScV8Sci", "n") |
||
250 | BUILTIN(__builtin_neon_vcvtm_s64_v, "V8ScV8Sci", "n") |
||
251 | TARGET_BUILTIN(__builtin_neon_vcvtm_u16_f16, "V8ScV8Sci", "n", "fullfp16") |
||
252 | BUILTIN(__builtin_neon_vcvtm_u32_v, "V8ScV8Sci", "n") |
||
253 | BUILTIN(__builtin_neon_vcvtm_u64_v, "V8ScV8Sci", "n") |
||
254 | BUILTIN(__builtin_neon_vcvtmd_s64_f64, "Wid", "n") |
||
255 | BUILTIN(__builtin_neon_vcvtmd_u64_f64, "UWid", "n") |
||
256 | TARGET_BUILTIN(__builtin_neon_vcvtmq_s16_f16, "V16ScV16Sci", "n", "fullfp16") |
||
257 | BUILTIN(__builtin_neon_vcvtmq_s32_v, "V16ScV16Sci", "n") |
||
258 | BUILTIN(__builtin_neon_vcvtmq_s64_v, "V16ScV16Sci", "n") |
||
259 | TARGET_BUILTIN(__builtin_neon_vcvtmq_u16_f16, "V16ScV16Sci", "n", "fullfp16") |
||
260 | BUILTIN(__builtin_neon_vcvtmq_u32_v, "V16ScV16Sci", "n") |
||
261 | BUILTIN(__builtin_neon_vcvtmq_u64_v, "V16ScV16Sci", "n") |
||
262 | BUILTIN(__builtin_neon_vcvtms_s32_f32, "if", "n") |
||
263 | BUILTIN(__builtin_neon_vcvtms_u32_f32, "Uif", "n") |
||
264 | TARGET_BUILTIN(__builtin_neon_vcvtn_s16_f16, "V8ScV8Sci", "n", "fullfp16") |
||
265 | BUILTIN(__builtin_neon_vcvtn_s32_v, "V8ScV8Sci", "n") |
||
266 | BUILTIN(__builtin_neon_vcvtn_s64_v, "V8ScV8Sci", "n") |
||
267 | TARGET_BUILTIN(__builtin_neon_vcvtn_u16_f16, "V8ScV8Sci", "n", "fullfp16") |
||
268 | BUILTIN(__builtin_neon_vcvtn_u32_v, "V8ScV8Sci", "n") |
||
269 | BUILTIN(__builtin_neon_vcvtn_u64_v, "V8ScV8Sci", "n") |
||
270 | BUILTIN(__builtin_neon_vcvtnd_s64_f64, "Wid", "n") |
||
271 | BUILTIN(__builtin_neon_vcvtnd_u64_f64, "UWid", "n") |
||
272 | TARGET_BUILTIN(__builtin_neon_vcvtnq_s16_f16, "V16ScV16Sci", "n", "fullfp16") |
||
273 | BUILTIN(__builtin_neon_vcvtnq_s32_v, "V16ScV16Sci", "n") |
||
274 | BUILTIN(__builtin_neon_vcvtnq_s64_v, "V16ScV16Sci", "n") |
||
275 | TARGET_BUILTIN(__builtin_neon_vcvtnq_u16_f16, "V16ScV16Sci", "n", "fullfp16") |
||
276 | BUILTIN(__builtin_neon_vcvtnq_u32_v, "V16ScV16Sci", "n") |
||
277 | BUILTIN(__builtin_neon_vcvtnq_u64_v, "V16ScV16Sci", "n") |
||
278 | BUILTIN(__builtin_neon_vcvtns_s32_f32, "if", "n") |
||
279 | BUILTIN(__builtin_neon_vcvtns_u32_f32, "Uif", "n") |
||
280 | TARGET_BUILTIN(__builtin_neon_vcvtp_s16_f16, "V8ScV8Sci", "n", "fullfp16") |
||
281 | BUILTIN(__builtin_neon_vcvtp_s32_v, "V8ScV8Sci", "n") |
||
282 | BUILTIN(__builtin_neon_vcvtp_s64_v, "V8ScV8Sci", "n") |
||
283 | TARGET_BUILTIN(__builtin_neon_vcvtp_u16_f16, "V8ScV8Sci", "n", "fullfp16") |
||
284 | BUILTIN(__builtin_neon_vcvtp_u32_v, "V8ScV8Sci", "n") |
||
285 | BUILTIN(__builtin_neon_vcvtp_u64_v, "V8ScV8Sci", "n") |
||
286 | BUILTIN(__builtin_neon_vcvtpd_s64_f64, "Wid", "n") |
||
287 | BUILTIN(__builtin_neon_vcvtpd_u64_f64, "UWid", "n") |
||
288 | TARGET_BUILTIN(__builtin_neon_vcvtpq_s16_f16, "V16ScV16Sci", "n", "fullfp16") |
||
289 | BUILTIN(__builtin_neon_vcvtpq_s32_v, "V16ScV16Sci", "n") |
||
290 | BUILTIN(__builtin_neon_vcvtpq_s64_v, "V16ScV16Sci", "n") |
||
291 | TARGET_BUILTIN(__builtin_neon_vcvtpq_u16_f16, "V16ScV16Sci", "n", "fullfp16") |
||
292 | BUILTIN(__builtin_neon_vcvtpq_u32_v, "V16ScV16Sci", "n") |
||
293 | BUILTIN(__builtin_neon_vcvtpq_u64_v, "V16ScV16Sci", "n") |
||
294 | BUILTIN(__builtin_neon_vcvtps_s32_f32, "if", "n") |
||
295 | BUILTIN(__builtin_neon_vcvtps_u32_f32, "Uif", "n") |
||
296 | TARGET_BUILTIN(__builtin_neon_vcvtq_f16_s16, "V16ScV16Sci", "n", "fullfp16") |
||
297 | TARGET_BUILTIN(__builtin_neon_vcvtq_f16_u16, "V16ScV16Sci", "n", "fullfp16") |
||
298 | BUILTIN(__builtin_neon_vcvtq_f32_v, "V16ScV16Sci", "n") |
||
299 | BUILTIN(__builtin_neon_vcvtq_f64_v, "V16ScV16Sci", "n") |
||
300 | TARGET_BUILTIN(__builtin_neon_vcvtq_high_bf16_f32, "V16ScV16ScV16Sci", "n", "bf16") |
||
301 | TARGET_BUILTIN(__builtin_neon_vcvtq_n_f16_s16, "V16ScV16ScIii", "n", "fullfp16") |
||
302 | TARGET_BUILTIN(__builtin_neon_vcvtq_n_f16_u16, "V16ScV16ScIii", "n", "fullfp16") |
||
303 | BUILTIN(__builtin_neon_vcvtq_n_f32_v, "V16ScV16ScIii", "n") |
||
304 | BUILTIN(__builtin_neon_vcvtq_n_f64_v, "V16ScV16ScIii", "n") |
||
305 | TARGET_BUILTIN(__builtin_neon_vcvtq_n_s16_f16, "V16ScV16ScIii", "n", "fullfp16") |
||
306 | BUILTIN(__builtin_neon_vcvtq_n_s32_v, "V16ScV16ScIii", "n") |
||
307 | BUILTIN(__builtin_neon_vcvtq_n_s64_v, "V16ScV16ScIii", "n") |
||
308 | TARGET_BUILTIN(__builtin_neon_vcvtq_n_u16_f16, "V16ScV16ScIii", "n", "fullfp16") |
||
309 | BUILTIN(__builtin_neon_vcvtq_n_u32_v, "V16ScV16ScIii", "n") |
||
310 | BUILTIN(__builtin_neon_vcvtq_n_u64_v, "V16ScV16ScIii", "n") |
||
311 | TARGET_BUILTIN(__builtin_neon_vcvtq_s16_f16, "V16ScV16Sci", "n", "fullfp16") |
||
312 | BUILTIN(__builtin_neon_vcvtq_s32_v, "V16ScV16Sci", "n") |
||
313 | BUILTIN(__builtin_neon_vcvtq_s64_v, "V16ScV16Sci", "n") |
||
314 | TARGET_BUILTIN(__builtin_neon_vcvtq_u16_f16, "V16ScV16Sci", "n", "fullfp16") |
||
315 | BUILTIN(__builtin_neon_vcvtq_u32_v, "V16ScV16Sci", "n") |
||
316 | BUILTIN(__builtin_neon_vcvtq_u64_v, "V16ScV16Sci", "n") |
||
317 | BUILTIN(__builtin_neon_vcvts_f32_s32, "fi", "n") |
||
318 | BUILTIN(__builtin_neon_vcvts_f32_u32, "fUi", "n") |
||
319 | BUILTIN(__builtin_neon_vcvts_n_f32_s32, "fiIi", "n") |
||
320 | BUILTIN(__builtin_neon_vcvts_n_f32_u32, "fUiIi", "n") |
||
321 | BUILTIN(__builtin_neon_vcvts_n_s32_f32, "ifIi", "n") |
||
322 | BUILTIN(__builtin_neon_vcvts_n_u32_f32, "UifIi", "n") |
||
323 | BUILTIN(__builtin_neon_vcvts_s32_f32, "if", "n") |
||
324 | BUILTIN(__builtin_neon_vcvts_u32_f32, "Uif", "n") |
||
325 | BUILTIN(__builtin_neon_vcvtx_f32_v, "V8ScV16Sci", "n") |
||
326 | BUILTIN(__builtin_neon_vcvtxd_f32_f64, "fd", "n") |
||
327 | TARGET_BUILTIN(__builtin_neon_vdot_s32, "V8ScV8ScV8ScV8Sci", "n", "dotprod") |
||
328 | TARGET_BUILTIN(__builtin_neon_vdot_u32, "V8ScV8ScV8ScV8Sci", "n", "dotprod") |
||
329 | TARGET_BUILTIN(__builtin_neon_vdotq_s32, "V16ScV16ScV16ScV16Sci", "n", "dotprod") |
||
330 | TARGET_BUILTIN(__builtin_neon_vdotq_u32, "V16ScV16ScV16ScV16Sci", "n", "dotprod") |
||
331 | BUILTIN(__builtin_neon_vdupb_lane_i8, "UcV8ScIi", "n") |
||
332 | BUILTIN(__builtin_neon_vdupb_laneq_i8, "UcV16ScIi", "n") |
||
333 | BUILTIN(__builtin_neon_vdupd_lane_f64, "dV1dIi", "n") |
||
334 | BUILTIN(__builtin_neon_vdupd_lane_i64, "UWiV1WiIi", "n") |
||
335 | BUILTIN(__builtin_neon_vdupd_laneq_f64, "dV2dIi", "n") |
||
336 | BUILTIN(__builtin_neon_vdupd_laneq_i64, "UWiV2WiIi", "n") |
||
337 | TARGET_BUILTIN(__builtin_neon_vduph_lane_bf16, "yV4yIi", "n", "bf16") |
||
338 | TARGET_BUILTIN(__builtin_neon_vduph_lane_f16, "hV4hIi", "n", "fullfp16") |
||
339 | BUILTIN(__builtin_neon_vduph_lane_i16, "UsV4sIi", "n") |
||
340 | TARGET_BUILTIN(__builtin_neon_vduph_laneq_bf16, "yV8yIi", "n", "bf16") |
||
341 | TARGET_BUILTIN(__builtin_neon_vduph_laneq_f16, "hV8hIi", "n", "fullfp16") |
||
342 | BUILTIN(__builtin_neon_vduph_laneq_i16, "UsV8sIi", "n") |
||
343 | BUILTIN(__builtin_neon_vdups_lane_f32, "fV2fIi", "n") |
||
344 | BUILTIN(__builtin_neon_vdups_lane_i32, "UiV2iIi", "n") |
||
345 | BUILTIN(__builtin_neon_vdups_laneq_f32, "fV4fIi", "n") |
||
346 | BUILTIN(__builtin_neon_vdups_laneq_i32, "UiV4iIi", "n") |
||
347 | TARGET_BUILTIN(__builtin_neon_veor3q_s16, "V16ScV16ScV16ScV16Sci", "n", "sha3") |
||
348 | TARGET_BUILTIN(__builtin_neon_veor3q_s32, "V16ScV16ScV16ScV16Sci", "n", "sha3") |
||
349 | TARGET_BUILTIN(__builtin_neon_veor3q_s64, "V16ScV16ScV16ScV16Sci", "n", "sha3") |
||
350 | TARGET_BUILTIN(__builtin_neon_veor3q_s8, "V16ScV16ScV16ScV16Sci", "n", "sha3") |
||
351 | TARGET_BUILTIN(__builtin_neon_veor3q_u16, "V16ScV16ScV16ScV16Sci", "n", "sha3") |
||
352 | TARGET_BUILTIN(__builtin_neon_veor3q_u32, "V16ScV16ScV16ScV16Sci", "n", "sha3") |
||
353 | TARGET_BUILTIN(__builtin_neon_veor3q_u64, "V16ScV16ScV16ScV16Sci", "n", "sha3") |
||
354 | TARGET_BUILTIN(__builtin_neon_veor3q_u8, "V16ScV16ScV16ScV16Sci", "n", "sha3") |
||
355 | TARGET_BUILTIN(__builtin_neon_vext_f16, "V8ScV8ScV8ScIii", "n", "fullfp16") |
||
356 | BUILTIN(__builtin_neon_vext_v, "V8ScV8ScV8ScIii", "n") |
||
357 | TARGET_BUILTIN(__builtin_neon_vextq_f16, "V16ScV16ScV16ScIii", "n", "fullfp16") |
||
358 | BUILTIN(__builtin_neon_vextq_v, "V16ScV16ScV16ScIii", "n") |
||
359 | TARGET_BUILTIN(__builtin_neon_vfma_f16, "V8ScV8ScV8ScV8Sci", "n", "fullfp16") |
||
360 | TARGET_BUILTIN(__builtin_neon_vfma_lane_f16, "V8ScV8ScV8ScV8ScIii", "n", "fullfp16") |
||
361 | BUILTIN(__builtin_neon_vfma_lane_v, "V8ScV8ScV8ScV8ScIii", "n") |
||
362 | TARGET_BUILTIN(__builtin_neon_vfma_laneq_f16, "V8ScV8ScV8ScV16ScIii", "n", "fullfp16") |
||
363 | BUILTIN(__builtin_neon_vfma_laneq_v, "V8ScV8ScV8ScV16ScIii", "n") |
||
364 | BUILTIN(__builtin_neon_vfma_v, "V8ScV8ScV8ScV8Sci", "n") |
||
365 | BUILTIN(__builtin_neon_vfmad_lane_f64, "dddV1dIi", "n") |
||
366 | BUILTIN(__builtin_neon_vfmad_laneq_f64, "dddV2dIi", "n") |
||
367 | TARGET_BUILTIN(__builtin_neon_vfmah_lane_f16, "hhhV4hIi", "n", "fullfp16") |
||
368 | TARGET_BUILTIN(__builtin_neon_vfmah_laneq_f16, "hhhV8hIi", "n", "fullfp16") |
||
369 | TARGET_BUILTIN(__builtin_neon_vfmaq_f16, "V16ScV16ScV16ScV16Sci", "n", "fullfp16") |
||
370 | TARGET_BUILTIN(__builtin_neon_vfmaq_lane_f16, "V16ScV16ScV16ScV8ScIii", "n", "fullfp16") |
||
371 | BUILTIN(__builtin_neon_vfmaq_lane_v, "V16ScV16ScV16ScV8ScIii", "n") |
||
372 | TARGET_BUILTIN(__builtin_neon_vfmaq_laneq_f16, "V16ScV16ScV16ScV16ScIii", "n", "fullfp16") |
||
373 | BUILTIN(__builtin_neon_vfmaq_laneq_v, "V16ScV16ScV16ScV16ScIii", "n") |
||
374 | BUILTIN(__builtin_neon_vfmaq_v, "V16ScV16ScV16ScV16Sci", "n") |
||
375 | BUILTIN(__builtin_neon_vfmas_lane_f32, "fffV2fIi", "n") |
||
376 | BUILTIN(__builtin_neon_vfmas_laneq_f32, "fffV4fIi", "n") |
||
377 | TARGET_BUILTIN(__builtin_neon_vfmlal_high_f16, "V8ScV8ScV8ScV8Sci", "n", "fp16fml") |
||
378 | TARGET_BUILTIN(__builtin_neon_vfmlal_low_f16, "V8ScV8ScV8ScV8Sci", "n", "fp16fml") |
||
379 | TARGET_BUILTIN(__builtin_neon_vfmlalq_high_f16, "V16ScV16ScV16ScV16Sci", "n", "fp16fml") |
||
380 | TARGET_BUILTIN(__builtin_neon_vfmlalq_low_f16, "V16ScV16ScV16ScV16Sci", "n", "fp16fml") |
||
381 | TARGET_BUILTIN(__builtin_neon_vfmlsl_high_f16, "V8ScV8ScV8ScV8Sci", "n", "fp16fml") |
||
382 | TARGET_BUILTIN(__builtin_neon_vfmlsl_low_f16, "V8ScV8ScV8ScV8Sci", "n", "fp16fml") |
||
383 | TARGET_BUILTIN(__builtin_neon_vfmlslq_high_f16, "V16ScV16ScV16ScV16Sci", "n", "fp16fml") |
||
384 | TARGET_BUILTIN(__builtin_neon_vfmlslq_low_f16, "V16ScV16ScV16ScV16Sci", "n", "fp16fml") |
||
385 | TARGET_BUILTIN(__builtin_neon_vget_lane_bf16, "yV4yIi", "n", "bf16") |
||
386 | BUILTIN(__builtin_neon_vget_lane_f32, "fV2fIi", "n") |
||
387 | BUILTIN(__builtin_neon_vget_lane_f64, "dV1dIi", "n") |
||
388 | BUILTIN(__builtin_neon_vget_lane_i16, "UsV4sIi", "n") |
||
389 | BUILTIN(__builtin_neon_vget_lane_i32, "UiV2iIi", "n") |
||
390 | BUILTIN(__builtin_neon_vget_lane_i64, "UWiV1WiIi", "n") |
||
391 | BUILTIN(__builtin_neon_vget_lane_i8, "UcV8ScIi", "n") |
||
392 | TARGET_BUILTIN(__builtin_neon_vgetq_lane_bf16, "yV8yIi", "n", "bf16") |
||
393 | BUILTIN(__builtin_neon_vgetq_lane_f32, "fV4fIi", "n") |
||
394 | BUILTIN(__builtin_neon_vgetq_lane_f64, "dV2dIi", "n") |
||
395 | BUILTIN(__builtin_neon_vgetq_lane_i16, "UsV8sIi", "n") |
||
396 | BUILTIN(__builtin_neon_vgetq_lane_i32, "UiV4iIi", "n") |
||
397 | BUILTIN(__builtin_neon_vgetq_lane_i64, "UWiV2WiIi", "n") |
||
398 | BUILTIN(__builtin_neon_vgetq_lane_i8, "UcV16ScIi", "n") |
||
399 | BUILTIN(__builtin_neon_vhadd_v, "V8ScV8ScV8Sci", "n") |
||
400 | BUILTIN(__builtin_neon_vhaddq_v, "V16ScV16ScV16Sci", "n") |
||
401 | BUILTIN(__builtin_neon_vhsub_v, "V8ScV8ScV8Sci", "n") |
||
402 | BUILTIN(__builtin_neon_vhsubq_v, "V16ScV16ScV16Sci", "n") |
||
403 | TARGET_BUILTIN(__builtin_neon_vld1_bf16, "V8ScvC*i", "n", "bf16") |
||
404 | TARGET_BUILTIN(__builtin_neon_vld1_bf16_x2, "vv*vC*i", "n", "bf16") |
||
405 | TARGET_BUILTIN(__builtin_neon_vld1_bf16_x3, "vv*vC*i", "n", "bf16") |
||
406 | TARGET_BUILTIN(__builtin_neon_vld1_bf16_x4, "vv*vC*i", "n", "bf16") |
||
407 | TARGET_BUILTIN(__builtin_neon_vld1_dup_bf16, "V8ScvC*i", "n", "bf16") |
||
408 | BUILTIN(__builtin_neon_vld1_dup_v, "V8ScvC*i", "n") |
||
409 | TARGET_BUILTIN(__builtin_neon_vld1_lane_bf16, "V8ScvC*V8ScIii", "n", "bf16") |
||
410 | BUILTIN(__builtin_neon_vld1_lane_v, "V8ScvC*V8ScIii", "n") |
||
411 | BUILTIN(__builtin_neon_vld1_v, "V8ScvC*i", "n") |
||
412 | BUILTIN(__builtin_neon_vld1_x2_v, "vv*vC*i", "n") |
||
413 | BUILTIN(__builtin_neon_vld1_x3_v, "vv*vC*i", "n") |
||
414 | BUILTIN(__builtin_neon_vld1_x4_v, "vv*vC*i", "n") |
||
415 | TARGET_BUILTIN(__builtin_neon_vld1q_bf16, "V16ScvC*i", "n", "bf16") |
||
416 | TARGET_BUILTIN(__builtin_neon_vld1q_bf16_x2, "vv*vC*i", "n", "bf16") |
||
417 | TARGET_BUILTIN(__builtin_neon_vld1q_bf16_x3, "vv*vC*i", "n", "bf16") |
||
418 | TARGET_BUILTIN(__builtin_neon_vld1q_bf16_x4, "vv*vC*i", "n", "bf16") |
||
419 | TARGET_BUILTIN(__builtin_neon_vld1q_dup_bf16, "V16ScvC*i", "n", "bf16") |
||
420 | BUILTIN(__builtin_neon_vld1q_dup_v, "V16ScvC*i", "n") |
||
421 | TARGET_BUILTIN(__builtin_neon_vld1q_lane_bf16, "V16ScvC*V16ScIii", "n", "bf16") |
||
422 | BUILTIN(__builtin_neon_vld1q_lane_v, "V16ScvC*V16ScIii", "n") |
||
423 | BUILTIN(__builtin_neon_vld1q_v, "V16ScvC*i", "n") |
||
424 | BUILTIN(__builtin_neon_vld1q_x2_v, "vv*vC*i", "n") |
||
425 | BUILTIN(__builtin_neon_vld1q_x3_v, "vv*vC*i", "n") |
||
426 | BUILTIN(__builtin_neon_vld1q_x4_v, "vv*vC*i", "n") |
||
427 | TARGET_BUILTIN(__builtin_neon_vld2_bf16, "vv*vC*i", "n", "bf16") |
||
428 | TARGET_BUILTIN(__builtin_neon_vld2_dup_bf16, "vv*vC*i", "n", "bf16") |
||
429 | BUILTIN(__builtin_neon_vld2_dup_v, "vv*vC*i", "n") |
||
430 | TARGET_BUILTIN(__builtin_neon_vld2_lane_bf16, "vv*vC*V8ScV8ScIii", "n", "bf16") |
||
431 | BUILTIN(__builtin_neon_vld2_lane_v, "vv*vC*V8ScV8ScIii", "n") |
||
432 | BUILTIN(__builtin_neon_vld2_v, "vv*vC*i", "n") |
||
433 | TARGET_BUILTIN(__builtin_neon_vld2q_bf16, "vv*vC*i", "n", "bf16") |
||
434 | TARGET_BUILTIN(__builtin_neon_vld2q_dup_bf16, "vv*vC*i", "n", "bf16") |
||
435 | BUILTIN(__builtin_neon_vld2q_dup_v, "vv*vC*i", "n") |
||
436 | TARGET_BUILTIN(__builtin_neon_vld2q_lane_bf16, "vv*vC*V16ScV16ScIii", "n", "bf16") |
||
437 | BUILTIN(__builtin_neon_vld2q_lane_v, "vv*vC*V16ScV16ScIii", "n") |
||
438 | BUILTIN(__builtin_neon_vld2q_v, "vv*vC*i", "n") |
||
439 | TARGET_BUILTIN(__builtin_neon_vld3_bf16, "vv*vC*i", "n", "bf16") |
||
440 | TARGET_BUILTIN(__builtin_neon_vld3_dup_bf16, "vv*vC*i", "n", "bf16") |
||
441 | BUILTIN(__builtin_neon_vld3_dup_v, "vv*vC*i", "n") |
||
442 | TARGET_BUILTIN(__builtin_neon_vld3_lane_bf16, "vv*vC*V8ScV8ScV8ScIii", "n", "bf16") |
||
443 | BUILTIN(__builtin_neon_vld3_lane_v, "vv*vC*V8ScV8ScV8ScIii", "n") |
||
444 | BUILTIN(__builtin_neon_vld3_v, "vv*vC*i", "n") |
||
445 | TARGET_BUILTIN(__builtin_neon_vld3q_bf16, "vv*vC*i", "n", "bf16") |
||
446 | TARGET_BUILTIN(__builtin_neon_vld3q_dup_bf16, "vv*vC*i", "n", "bf16") |
||
447 | BUILTIN(__builtin_neon_vld3q_dup_v, "vv*vC*i", "n") |
||
448 | TARGET_BUILTIN(__builtin_neon_vld3q_lane_bf16, "vv*vC*V16ScV16ScV16ScIii", "n", "bf16") |
||
449 | BUILTIN(__builtin_neon_vld3q_lane_v, "vv*vC*V16ScV16ScV16ScIii", "n") |
||
450 | BUILTIN(__builtin_neon_vld3q_v, "vv*vC*i", "n") |
||
451 | TARGET_BUILTIN(__builtin_neon_vld4_bf16, "vv*vC*i", "n", "bf16") |
||
452 | TARGET_BUILTIN(__builtin_neon_vld4_dup_bf16, "vv*vC*i", "n", "bf16") |
||
453 | BUILTIN(__builtin_neon_vld4_dup_v, "vv*vC*i", "n") |
||
454 | TARGET_BUILTIN(__builtin_neon_vld4_lane_bf16, "vv*vC*V8ScV8ScV8ScV8ScIii", "n", "bf16") |
||
455 | BUILTIN(__builtin_neon_vld4_lane_v, "vv*vC*V8ScV8ScV8ScV8ScIii", "n") |
||
456 | BUILTIN(__builtin_neon_vld4_v, "vv*vC*i", "n") |
||
457 | TARGET_BUILTIN(__builtin_neon_vld4q_bf16, "vv*vC*i", "n", "bf16") |
||
458 | TARGET_BUILTIN(__builtin_neon_vld4q_dup_bf16, "vv*vC*i", "n", "bf16") |
||
459 | BUILTIN(__builtin_neon_vld4q_dup_v, "vv*vC*i", "n") |
||
460 | TARGET_BUILTIN(__builtin_neon_vld4q_lane_bf16, "vv*vC*V16ScV16ScV16ScV16ScIii", "n", "bf16") |
||
461 | BUILTIN(__builtin_neon_vld4q_lane_v, "vv*vC*V16ScV16ScV16ScV16ScIii", "n") |
||
462 | BUILTIN(__builtin_neon_vld4q_v, "vv*vC*i", "n") |
||
463 | BUILTIN(__builtin_neon_vldrq_p128, "ULLLivC*", "n") |
||
464 | TARGET_BUILTIN(__builtin_neon_vmax_f16, "V8ScV8ScV8Sci", "n", "fullfp16") |
||
465 | BUILTIN(__builtin_neon_vmax_v, "V8ScV8ScV8Sci", "n") |
||
466 | TARGET_BUILTIN(__builtin_neon_vmaxnm_f16, "V8ScV8ScV8Sci", "n", "fullfp16") |
||
467 | BUILTIN(__builtin_neon_vmaxnm_v, "V8ScV8ScV8Sci", "n") |
||
468 | TARGET_BUILTIN(__builtin_neon_vmaxnmq_f16, "V16ScV16ScV16Sci", "n", "fullfp16") |
||
469 | BUILTIN(__builtin_neon_vmaxnmq_v, "V16ScV16ScV16Sci", "n") |
||
470 | TARGET_BUILTIN(__builtin_neon_vmaxnmv_f16, "hV8Sc", "n", "fullfp16") |
||
471 | BUILTIN(__builtin_neon_vmaxnmv_f32, "fV2f", "n") |
||
472 | TARGET_BUILTIN(__builtin_neon_vmaxnmvq_f16, "hV16Sc", "n", "fullfp16") |
||
473 | BUILTIN(__builtin_neon_vmaxnmvq_f32, "fV4f", "n") |
||
474 | BUILTIN(__builtin_neon_vmaxnmvq_f64, "dV2d", "n") |
||
475 | TARGET_BUILTIN(__builtin_neon_vmaxq_f16, "V16ScV16ScV16Sci", "n", "fullfp16") |
||
476 | BUILTIN(__builtin_neon_vmaxq_v, "V16ScV16ScV16Sci", "n") |
||
477 | TARGET_BUILTIN(__builtin_neon_vmaxv_f16, "hV8Sc", "n", "fullfp16") |
||
478 | BUILTIN(__builtin_neon_vmaxv_f32, "fV2f", "n") |
||
479 | BUILTIN(__builtin_neon_vmaxv_s16, "sV4s", "n") |
||
480 | BUILTIN(__builtin_neon_vmaxv_s32, "iV2i", "n") |
||
481 | BUILTIN(__builtin_neon_vmaxv_s8, "ScV8Sc", "n") |
||
482 | BUILTIN(__builtin_neon_vmaxv_u16, "UsV4Us", "n") |
||
483 | BUILTIN(__builtin_neon_vmaxv_u32, "UiV2Ui", "n") |
||
484 | BUILTIN(__builtin_neon_vmaxv_u8, "UcV8Uc", "n") |
||
485 | TARGET_BUILTIN(__builtin_neon_vmaxvq_f16, "hV16Sc", "n", "fullfp16") |
||
486 | BUILTIN(__builtin_neon_vmaxvq_f32, "fV4f", "n") |
||
487 | BUILTIN(__builtin_neon_vmaxvq_f64, "dV2d", "n") |
||
488 | BUILTIN(__builtin_neon_vmaxvq_s16, "sV8s", "n") |
||
489 | BUILTIN(__builtin_neon_vmaxvq_s32, "iV4i", "n") |
||
490 | BUILTIN(__builtin_neon_vmaxvq_s8, "ScV16Sc", "n") |
||
491 | BUILTIN(__builtin_neon_vmaxvq_u16, "UsV8Us", "n") |
||
492 | BUILTIN(__builtin_neon_vmaxvq_u32, "UiV4Ui", "n") |
||
493 | BUILTIN(__builtin_neon_vmaxvq_u8, "UcV16Uc", "n") |
||
494 | TARGET_BUILTIN(__builtin_neon_vmin_f16, "V8ScV8ScV8Sci", "n", "fullfp16") |
||
495 | BUILTIN(__builtin_neon_vmin_v, "V8ScV8ScV8Sci", "n") |
||
496 | TARGET_BUILTIN(__builtin_neon_vminnm_f16, "V8ScV8ScV8Sci", "n", "fullfp16") |
||
497 | BUILTIN(__builtin_neon_vminnm_v, "V8ScV8ScV8Sci", "n") |
||
498 | TARGET_BUILTIN(__builtin_neon_vminnmq_f16, "V16ScV16ScV16Sci", "n", "fullfp16") |
||
499 | BUILTIN(__builtin_neon_vminnmq_v, "V16ScV16ScV16Sci", "n") |
||
500 | TARGET_BUILTIN(__builtin_neon_vminnmv_f16, "hV8Sc", "n", "fullfp16") |
||
501 | BUILTIN(__builtin_neon_vminnmv_f32, "fV2f", "n") |
||
502 | TARGET_BUILTIN(__builtin_neon_vminnmvq_f16, "hV16Sc", "n", "fullfp16") |
||
503 | BUILTIN(__builtin_neon_vminnmvq_f32, "fV4f", "n") |
||
504 | BUILTIN(__builtin_neon_vminnmvq_f64, "dV2d", "n") |
||
505 | TARGET_BUILTIN(__builtin_neon_vminq_f16, "V16ScV16ScV16Sci", "n", "fullfp16") |
||
506 | BUILTIN(__builtin_neon_vminq_v, "V16ScV16ScV16Sci", "n") |
||
507 | TARGET_BUILTIN(__builtin_neon_vminv_f16, "hV8Sc", "n", "fullfp16") |
||
508 | BUILTIN(__builtin_neon_vminv_f32, "fV2f", "n") |
||
509 | BUILTIN(__builtin_neon_vminv_s16, "sV4s", "n") |
||
510 | BUILTIN(__builtin_neon_vminv_s32, "iV2i", "n") |
||
511 | BUILTIN(__builtin_neon_vminv_s8, "ScV8Sc", "n") |
||
512 | BUILTIN(__builtin_neon_vminv_u16, "UsV4Us", "n") |
||
513 | BUILTIN(__builtin_neon_vminv_u32, "UiV2Ui", "n") |
||
514 | BUILTIN(__builtin_neon_vminv_u8, "UcV8Uc", "n") |
||
515 | TARGET_BUILTIN(__builtin_neon_vminvq_f16, "hV16Sc", "n", "fullfp16") |
||
516 | BUILTIN(__builtin_neon_vminvq_f32, "fV4f", "n") |
||
517 | BUILTIN(__builtin_neon_vminvq_f64, "dV2d", "n") |
||
518 | BUILTIN(__builtin_neon_vminvq_s16, "sV8s", "n") |
||
519 | BUILTIN(__builtin_neon_vminvq_s32, "iV4i", "n") |
||
520 | BUILTIN(__builtin_neon_vminvq_s8, "ScV16Sc", "n") |
||
521 | BUILTIN(__builtin_neon_vminvq_u16, "UsV8Us", "n") |
||
522 | BUILTIN(__builtin_neon_vminvq_u32, "UiV4Ui", "n") |
||
523 | BUILTIN(__builtin_neon_vminvq_u8, "UcV16Uc", "n") |
||
524 | TARGET_BUILTIN(__builtin_neon_vmmlaq_s32, "V16ScV16ScV16ScV16Sci", "n", "i8mm") |
||
525 | TARGET_BUILTIN(__builtin_neon_vmmlaq_u32, "V16ScV16ScV16ScV16Sci", "n", "i8mm") |
||
526 | BUILTIN(__builtin_neon_vmovl_v, "V16ScV8Sci", "n") |
||
527 | BUILTIN(__builtin_neon_vmovn_v, "V8ScV16Sci", "n") |
||
528 | BUILTIN(__builtin_neon_vmul_lane_v, "V8ScV8ScV8ScIii", "n") |
||
529 | BUILTIN(__builtin_neon_vmul_laneq_v, "V8ScV8ScV16ScIii", "n") |
||
530 | BUILTIN(__builtin_neon_vmul_n_f64, "V1dV1dd", "n") |
||
531 | BUILTIN(__builtin_neon_vmul_v, "V8ScV8ScV8Sci", "n") |
||
532 | TARGET_BUILTIN(__builtin_neon_vmull_p64, "ULLLiUWiUWi", "n", "aes") |
||
533 | BUILTIN(__builtin_neon_vmull_v, "V16ScV8ScV8Sci", "n") |
||
534 | BUILTIN(__builtin_neon_vmulq_v, "V16ScV16ScV16Sci", "n") |
||
535 | TARGET_BUILTIN(__builtin_neon_vmulx_f16, "V8ScV8ScV8Sci", "n", "fullfp16") |
||
536 | BUILTIN(__builtin_neon_vmulx_v, "V8ScV8ScV8Sci", "n") |
||
537 | BUILTIN(__builtin_neon_vmulxd_f64, "ddd", "n") |
||
538 | TARGET_BUILTIN(__builtin_neon_vmulxh_lane_f16, "hhV4hIi", "n", "fullfp16") |
||
539 | TARGET_BUILTIN(__builtin_neon_vmulxh_laneq_f16, "hhV8hIi", "n", "fullfp16") |
||
540 | TARGET_BUILTIN(__builtin_neon_vmulxq_f16, "V16ScV16ScV16Sci", "n", "fullfp16") |
||
541 | BUILTIN(__builtin_neon_vmulxq_v, "V16ScV16ScV16Sci", "n") |
||
542 | BUILTIN(__builtin_neon_vmulxs_f32, "fff", "n") |
||
543 | BUILTIN(__builtin_neon_vnegd_s64, "WiWi", "n") |
||
544 | BUILTIN(__builtin_neon_vpadal_v, "V8ScV8ScV8Sci", "n") |
||
545 | BUILTIN(__builtin_neon_vpadalq_v, "V16ScV16ScV16Sci", "n") |
||
546 | TARGET_BUILTIN(__builtin_neon_vpadd_f16, "V8ScV8ScV8Sci", "n", "fullfp16") |
||
547 | BUILTIN(__builtin_neon_vpadd_v, "V8ScV8ScV8Sci", "n") |
||
548 | BUILTIN(__builtin_neon_vpaddd_f64, "dV2d", "n") |
||
549 | BUILTIN(__builtin_neon_vpaddd_s64, "WiV2Wi", "n") |
||
550 | BUILTIN(__builtin_neon_vpaddd_u64, "UWiV2UWi", "n") |
||
551 | BUILTIN(__builtin_neon_vpaddl_v, "V8ScV8Sci", "n") |
||
552 | BUILTIN(__builtin_neon_vpaddlq_v, "V16ScV16Sci", "n") |
||
553 | TARGET_BUILTIN(__builtin_neon_vpaddq_f16, "V16ScV16ScV16Sci", "n", "fullfp16") |
||
554 | BUILTIN(__builtin_neon_vpaddq_v, "V16ScV16ScV16Sci", "n") |
||
555 | BUILTIN(__builtin_neon_vpadds_f32, "fV2f", "n") |
||
556 | TARGET_BUILTIN(__builtin_neon_vpmax_f16, "V8ScV8ScV8Sci", "n", "fullfp16") |
||
557 | BUILTIN(__builtin_neon_vpmax_v, "V8ScV8ScV8Sci", "n") |
||
558 | TARGET_BUILTIN(__builtin_neon_vpmaxnm_f16, "V8ScV8ScV8Sci", "n", "fullfp16") |
||
559 | BUILTIN(__builtin_neon_vpmaxnm_v, "V8ScV8ScV8Sci", "n") |
||
560 | TARGET_BUILTIN(__builtin_neon_vpmaxnmq_f16, "V16ScV16ScV16Sci", "n", "fullfp16") |
||
561 | BUILTIN(__builtin_neon_vpmaxnmq_v, "V16ScV16ScV16Sci", "n") |
||
562 | BUILTIN(__builtin_neon_vpmaxnmqd_f64, "dV2d", "n") |
||
563 | BUILTIN(__builtin_neon_vpmaxnms_f32, "fV2f", "n") |
||
564 | TARGET_BUILTIN(__builtin_neon_vpmaxq_f16, "V16ScV16ScV16Sci", "n", "fullfp16") |
||
565 | BUILTIN(__builtin_neon_vpmaxq_v, "V16ScV16ScV16Sci", "n") |
||
566 | BUILTIN(__builtin_neon_vpmaxqd_f64, "dV2d", "n") |
||
567 | BUILTIN(__builtin_neon_vpmaxs_f32, "fV2f", "n") |
||
568 | TARGET_BUILTIN(__builtin_neon_vpmin_f16, "V8ScV8ScV8Sci", "n", "fullfp16") |
||
569 | BUILTIN(__builtin_neon_vpmin_v, "V8ScV8ScV8Sci", "n") |
||
570 | TARGET_BUILTIN(__builtin_neon_vpminnm_f16, "V8ScV8ScV8Sci", "n", "fullfp16") |
||
571 | BUILTIN(__builtin_neon_vpminnm_v, "V8ScV8ScV8Sci", "n") |
||
572 | TARGET_BUILTIN(__builtin_neon_vpminnmq_f16, "V16ScV16ScV16Sci", "n", "fullfp16") |
||
573 | BUILTIN(__builtin_neon_vpminnmq_v, "V16ScV16ScV16Sci", "n") |
||
574 | BUILTIN(__builtin_neon_vpminnmqd_f64, "dV2d", "n") |
||
575 | BUILTIN(__builtin_neon_vpminnms_f32, "fV2f", "n") |
||
576 | TARGET_BUILTIN(__builtin_neon_vpminq_f16, "V16ScV16ScV16Sci", "n", "fullfp16") |
||
577 | BUILTIN(__builtin_neon_vpminq_v, "V16ScV16ScV16Sci", "n") |
||
578 | BUILTIN(__builtin_neon_vpminqd_f64, "dV2d", "n") |
||
579 | BUILTIN(__builtin_neon_vpmins_f32, "fV2f", "n") |
||
580 | BUILTIN(__builtin_neon_vqabs_v, "V8ScV8Sci", "n") |
||
581 | BUILTIN(__builtin_neon_vqabsb_s8, "ScSc", "n") |
||
582 | BUILTIN(__builtin_neon_vqabsd_s64, "WiWi", "n") |
||
583 | BUILTIN(__builtin_neon_vqabsh_s16, "ss", "n") |
||
584 | BUILTIN(__builtin_neon_vqabsq_v, "V16ScV16Sci", "n") |
||
585 | BUILTIN(__builtin_neon_vqabss_s32, "ii", "n") |
||
586 | BUILTIN(__builtin_neon_vqadd_v, "V8ScV8ScV8Sci", "n") |
||
587 | BUILTIN(__builtin_neon_vqaddb_s8, "ScScSc", "n") |
||
588 | BUILTIN(__builtin_neon_vqaddb_u8, "UcUcUc", "n") |
||
589 | BUILTIN(__builtin_neon_vqaddd_s64, "WiWiWi", "n") |
||
590 | BUILTIN(__builtin_neon_vqaddd_u64, "UWiUWiUWi", "n") |
||
591 | BUILTIN(__builtin_neon_vqaddh_s16, "sss", "n") |
||
592 | BUILTIN(__builtin_neon_vqaddh_u16, "UsUsUs", "n") |
||
593 | BUILTIN(__builtin_neon_vqaddq_v, "V16ScV16ScV16Sci", "n") |
||
594 | BUILTIN(__builtin_neon_vqadds_s32, "iii", "n") |
||
595 | BUILTIN(__builtin_neon_vqadds_u32, "UiUiUi", "n") |
||
596 | BUILTIN(__builtin_neon_vqdmlal_v, "V16ScV16ScV8ScV8Sci", "n") |
||
597 | BUILTIN(__builtin_neon_vqdmlalh_lane_s16, "iisV4sIi", "n") |
||
598 | BUILTIN(__builtin_neon_vqdmlalh_laneq_s16, "iisV8sIi", "n") |
||
599 | BUILTIN(__builtin_neon_vqdmlalh_s16, "iiss", "n") |
||
600 | BUILTIN(__builtin_neon_vqdmlals_lane_s32, "WiWiiV2iIi", "n") |
||
601 | BUILTIN(__builtin_neon_vqdmlals_laneq_s32, "WiWiiV4iIi", "n") |
||
602 | BUILTIN(__builtin_neon_vqdmlals_s32, "WiWiii", "n") |
||
603 | BUILTIN(__builtin_neon_vqdmlsl_v, "V16ScV16ScV8ScV8Sci", "n") |
||
604 | BUILTIN(__builtin_neon_vqdmlslh_lane_s16, "iisV4sIi", "n") |
||
605 | BUILTIN(__builtin_neon_vqdmlslh_laneq_s16, "iisV8sIi", "n") |
||
606 | BUILTIN(__builtin_neon_vqdmlslh_s16, "iiss", "n") |
||
607 | BUILTIN(__builtin_neon_vqdmlsls_lane_s32, "WiWiiV2iIi", "n") |
||
608 | BUILTIN(__builtin_neon_vqdmlsls_laneq_s32, "WiWiiV4iIi", "n") |
||
609 | BUILTIN(__builtin_neon_vqdmlsls_s32, "WiWiii", "n") |
||
610 | BUILTIN(__builtin_neon_vqdmulh_lane_v, "V8ScV8ScV8ScIii", "n") |
||
611 | BUILTIN(__builtin_neon_vqdmulh_laneq_v, "V8ScV8ScV16ScIii", "n") |
||
612 | BUILTIN(__builtin_neon_vqdmulh_v, "V8ScV8ScV8Sci", "n") |
||
613 | BUILTIN(__builtin_neon_vqdmulhh_s16, "sss", "n") |
||
614 | BUILTIN(__builtin_neon_vqdmulhq_lane_v, "V16ScV16ScV8ScIii", "n") |
||
615 | BUILTIN(__builtin_neon_vqdmulhq_laneq_v, "V16ScV16ScV16ScIii", "n") |
||
616 | BUILTIN(__builtin_neon_vqdmulhq_v, "V16ScV16ScV16Sci", "n") |
||
617 | BUILTIN(__builtin_neon_vqdmulhs_s32, "iii", "n") |
||
618 | BUILTIN(__builtin_neon_vqdmull_v, "V16ScV8ScV8Sci", "n") |
||
619 | BUILTIN(__builtin_neon_vqdmullh_s16, "iss", "n") |
||
620 | BUILTIN(__builtin_neon_vqdmulls_s32, "Wiii", "n") |
||
621 | BUILTIN(__builtin_neon_vqmovn_v, "V8ScV16Sci", "n") |
||
622 | BUILTIN(__builtin_neon_vqmovnd_s64, "iWi", "n") |
||
623 | BUILTIN(__builtin_neon_vqmovnd_u64, "UiUWi", "n") |
||
624 | BUILTIN(__builtin_neon_vqmovnh_s16, "Scs", "n") |
||
625 | BUILTIN(__builtin_neon_vqmovnh_u16, "UcUs", "n") |
||
626 | BUILTIN(__builtin_neon_vqmovns_s32, "si", "n") |
||
627 | BUILTIN(__builtin_neon_vqmovns_u32, "UsUi", "n") |
||
628 | BUILTIN(__builtin_neon_vqmovun_v, "V8ScV16Sci", "n") |
||
629 | BUILTIN(__builtin_neon_vqmovund_s64, "UiWi", "n") |
||
630 | BUILTIN(__builtin_neon_vqmovunh_s16, "Ucs", "n") |
||
631 | BUILTIN(__builtin_neon_vqmovuns_s32, "Usi", "n") |
||
632 | BUILTIN(__builtin_neon_vqneg_v, "V8ScV8Sci", "n") |
||
633 | BUILTIN(__builtin_neon_vqnegb_s8, "ScSc", "n") |
||
634 | BUILTIN(__builtin_neon_vqnegd_s64, "WiWi", "n") |
||
635 | BUILTIN(__builtin_neon_vqnegh_s16, "ss", "n") |
||
636 | BUILTIN(__builtin_neon_vqnegq_v, "V16ScV16Sci", "n") |
||
637 | BUILTIN(__builtin_neon_vqnegs_s32, "ii", "n") |
||
638 | TARGET_BUILTIN(__builtin_neon_vqrdmlah_s16, "V8ScV8ScV8ScV8Sci", "n", "v8.1a") |
||
639 | TARGET_BUILTIN(__builtin_neon_vqrdmlah_s32, "V8ScV8ScV8ScV8Sci", "n", "v8.1a") |
||
640 | TARGET_BUILTIN(__builtin_neon_vqrdmlahh_s16, "ssss", "n", "v8.1a") |
||
641 | TARGET_BUILTIN(__builtin_neon_vqrdmlahq_s16, "V16ScV16ScV16ScV16Sci", "n", "v8.1a") |
||
642 | TARGET_BUILTIN(__builtin_neon_vqrdmlahq_s32, "V16ScV16ScV16ScV16Sci", "n", "v8.1a") |
||
643 | TARGET_BUILTIN(__builtin_neon_vqrdmlahs_s32, "iiii", "n", "v8.1a") |
||
644 | TARGET_BUILTIN(__builtin_neon_vqrdmlsh_s16, "V8ScV8ScV8ScV8Sci", "n", "v8.1a") |
||
645 | TARGET_BUILTIN(__builtin_neon_vqrdmlsh_s32, "V8ScV8ScV8ScV8Sci", "n", "v8.1a") |
||
646 | TARGET_BUILTIN(__builtin_neon_vqrdmlshh_s16, "ssss", "n", "v8.1a") |
||
647 | TARGET_BUILTIN(__builtin_neon_vqrdmlshq_s16, "V16ScV16ScV16ScV16Sci", "n", "v8.1a") |
||
648 | TARGET_BUILTIN(__builtin_neon_vqrdmlshq_s32, "V16ScV16ScV16ScV16Sci", "n", "v8.1a") |
||
649 | TARGET_BUILTIN(__builtin_neon_vqrdmlshs_s32, "iiii", "n", "v8.1a") |
||
650 | BUILTIN(__builtin_neon_vqrdmulh_lane_v, "V8ScV8ScV8ScIii", "n") |
||
651 | BUILTIN(__builtin_neon_vqrdmulh_laneq_v, "V8ScV8ScV16ScIii", "n") |
||
652 | BUILTIN(__builtin_neon_vqrdmulh_v, "V8ScV8ScV8Sci", "n") |
||
653 | BUILTIN(__builtin_neon_vqrdmulhh_s16, "sss", "n") |
||
654 | BUILTIN(__builtin_neon_vqrdmulhq_lane_v, "V16ScV16ScV8ScIii", "n") |
||
655 | BUILTIN(__builtin_neon_vqrdmulhq_laneq_v, "V16ScV16ScV16ScIii", "n") |
||
656 | BUILTIN(__builtin_neon_vqrdmulhq_v, "V16ScV16ScV16Sci", "n") |
||
657 | BUILTIN(__builtin_neon_vqrdmulhs_s32, "iii", "n") |
||
658 | BUILTIN(__builtin_neon_vqrshl_v, "V8ScV8ScV8Sci", "n") |
||
659 | BUILTIN(__builtin_neon_vqrshlb_s8, "ScScSc", "n") |
||
660 | BUILTIN(__builtin_neon_vqrshlb_u8, "UcUcSc", "n") |
||
661 | BUILTIN(__builtin_neon_vqrshld_s64, "WiWiWi", "n") |
||
662 | BUILTIN(__builtin_neon_vqrshld_u64, "UWiUWiWi", "n") |
||
663 | BUILTIN(__builtin_neon_vqrshlh_s16, "sss", "n") |
||
664 | BUILTIN(__builtin_neon_vqrshlh_u16, "UsUss", "n") |
||
665 | BUILTIN(__builtin_neon_vqrshlq_v, "V16ScV16ScV16Sci", "n") |
||
666 | BUILTIN(__builtin_neon_vqrshls_s32, "iii", "n") |
||
667 | BUILTIN(__builtin_neon_vqrshls_u32, "UiUii", "n") |
||
668 | BUILTIN(__builtin_neon_vqrshrn_n_v, "V8ScV16ScIii", "n") |
||
669 | BUILTIN(__builtin_neon_vqrshrnd_n_s64, "iWiIi", "n") |
||
670 | BUILTIN(__builtin_neon_vqrshrnd_n_u64, "UiUWiIi", "n") |
||
671 | BUILTIN(__builtin_neon_vqrshrnh_n_s16, "ScsIi", "n") |
||
672 | BUILTIN(__builtin_neon_vqrshrnh_n_u16, "UcUsIi", "n") |
||
673 | BUILTIN(__builtin_neon_vqrshrns_n_s32, "siIi", "n") |
||
674 | BUILTIN(__builtin_neon_vqrshrns_n_u32, "UsUiIi", "n") |
||
675 | BUILTIN(__builtin_neon_vqrshrun_n_v, "V8ScV16ScIii", "n") |
||
676 | BUILTIN(__builtin_neon_vqrshrund_n_s64, "iWiIi", "n") |
||
677 | BUILTIN(__builtin_neon_vqrshrunh_n_s16, "ScsIi", "n") |
||
678 | BUILTIN(__builtin_neon_vqrshruns_n_s32, "siIi", "n") |
||
679 | BUILTIN(__builtin_neon_vqshl_n_v, "V8ScV8ScIii", "n") |
||
680 | BUILTIN(__builtin_neon_vqshl_v, "V8ScV8ScV8Sci", "n") |
||
681 | BUILTIN(__builtin_neon_vqshlb_n_s8, "ScScIi", "n") |
||
682 | BUILTIN(__builtin_neon_vqshlb_n_u8, "UcUcIi", "n") |
||
683 | BUILTIN(__builtin_neon_vqshlb_s8, "ScScSc", "n") |
||
684 | BUILTIN(__builtin_neon_vqshlb_u8, "UcUcSc", "n") |
||
685 | BUILTIN(__builtin_neon_vqshld_n_s64, "WiWiIi", "n") |
||
686 | BUILTIN(__builtin_neon_vqshld_n_u64, "UWiUWiIi", "n") |
||
687 | BUILTIN(__builtin_neon_vqshld_s64, "WiWiWi", "n") |
||
688 | BUILTIN(__builtin_neon_vqshld_u64, "UWiUWiWi", "n") |
||
689 | BUILTIN(__builtin_neon_vqshlh_n_s16, "ssIi", "n") |
||
690 | BUILTIN(__builtin_neon_vqshlh_n_u16, "UsUsIi", "n") |
||
691 | BUILTIN(__builtin_neon_vqshlh_s16, "sss", "n") |
||
692 | BUILTIN(__builtin_neon_vqshlh_u16, "UsUss", "n") |
||
693 | BUILTIN(__builtin_neon_vqshlq_n_v, "V16ScV16ScIii", "n") |
||
694 | BUILTIN(__builtin_neon_vqshlq_v, "V16ScV16ScV16Sci", "n") |
||
695 | BUILTIN(__builtin_neon_vqshls_n_s32, "iiIi", "n") |
||
696 | BUILTIN(__builtin_neon_vqshls_n_u32, "UiUiIi", "n") |
||
697 | BUILTIN(__builtin_neon_vqshls_s32, "iii", "n") |
||
698 | BUILTIN(__builtin_neon_vqshls_u32, "UiUii", "n") |
||
699 | BUILTIN(__builtin_neon_vqshlu_n_v, "V8ScV8ScIii", "n") |
||
700 | BUILTIN(__builtin_neon_vqshlub_n_s8, "ScScIi", "n") |
||
701 | BUILTIN(__builtin_neon_vqshlud_n_s64, "WiWiIi", "n") |
||
702 | BUILTIN(__builtin_neon_vqshluh_n_s16, "ssIi", "n") |
||
703 | BUILTIN(__builtin_neon_vqshluq_n_v, "V16ScV16ScIii", "n") |
||
704 | BUILTIN(__builtin_neon_vqshlus_n_s32, "iiIi", "n") |
||
705 | BUILTIN(__builtin_neon_vqshrn_n_v, "V8ScV16ScIii", "n") |
||
706 | BUILTIN(__builtin_neon_vqshrnd_n_s64, "iWiIi", "n") |
||
707 | BUILTIN(__builtin_neon_vqshrnd_n_u64, "UiUWiIi", "n") |
||
708 | BUILTIN(__builtin_neon_vqshrnh_n_s16, "ScsIi", "n") |
||
709 | BUILTIN(__builtin_neon_vqshrnh_n_u16, "UcUsIi", "n") |
||
710 | BUILTIN(__builtin_neon_vqshrns_n_s32, "siIi", "n") |
||
711 | BUILTIN(__builtin_neon_vqshrns_n_u32, "UsUiIi", "n") |
||
712 | BUILTIN(__builtin_neon_vqshrun_n_v, "V8ScV16ScIii", "n") |
||
713 | BUILTIN(__builtin_neon_vqshrund_n_s64, "iWiIi", "n") |
||
714 | BUILTIN(__builtin_neon_vqshrunh_n_s16, "ScsIi", "n") |
||
715 | BUILTIN(__builtin_neon_vqshruns_n_s32, "siIi", "n") |
||
716 | BUILTIN(__builtin_neon_vqsub_v, "V8ScV8ScV8Sci", "n") |
||
717 | BUILTIN(__builtin_neon_vqsubb_s8, "ScScSc", "n") |
||
718 | BUILTIN(__builtin_neon_vqsubb_u8, "UcUcUc", "n") |
||
719 | BUILTIN(__builtin_neon_vqsubd_s64, "WiWiWi", "n") |
||
720 | BUILTIN(__builtin_neon_vqsubd_u64, "UWiUWiUWi", "n") |
||
721 | BUILTIN(__builtin_neon_vqsubh_s16, "sss", "n") |
||
722 | BUILTIN(__builtin_neon_vqsubh_u16, "UsUsUs", "n") |
||
723 | BUILTIN(__builtin_neon_vqsubq_v, "V16ScV16ScV16Sci", "n") |
||
724 | BUILTIN(__builtin_neon_vqsubs_s32, "iii", "n") |
||
725 | BUILTIN(__builtin_neon_vqsubs_u32, "UiUiUi", "n") |
||
726 | BUILTIN(__builtin_neon_vqtbl1_v, "V8ScV16ScV8Sci", "n") |
||
727 | BUILTIN(__builtin_neon_vqtbl1q_v, "V16ScV16ScV16Sci", "n") |
||
728 | BUILTIN(__builtin_neon_vqtbl2_v, "V8ScV16ScV16ScV8Sci", "n") |
||
729 | BUILTIN(__builtin_neon_vqtbl2q_v, "V16ScV16ScV16ScV16Sci", "n") |
||
730 | BUILTIN(__builtin_neon_vqtbl3_v, "V8ScV16ScV16ScV16ScV8Sci", "n") |
||
731 | BUILTIN(__builtin_neon_vqtbl3q_v, "V16ScV16ScV16ScV16ScV16Sci", "n") |
||
732 | BUILTIN(__builtin_neon_vqtbl4_v, "V8ScV16ScV16ScV16ScV16ScV8Sci", "n") |
||
733 | BUILTIN(__builtin_neon_vqtbl4q_v, "V16ScV16ScV16ScV16ScV16ScV16Sci", "n") |
||
734 | BUILTIN(__builtin_neon_vqtbx1_v, "V8ScV8ScV16ScV8Sci", "n") |
||
735 | BUILTIN(__builtin_neon_vqtbx1q_v, "V16ScV16ScV16ScV16Sci", "n") |
||
736 | BUILTIN(__builtin_neon_vqtbx2_v, "V8ScV8ScV16ScV16ScV8Sci", "n") |
||
737 | BUILTIN(__builtin_neon_vqtbx2q_v, "V16ScV16ScV16ScV16ScV16Sci", "n") |
||
738 | BUILTIN(__builtin_neon_vqtbx3_v, "V8ScV8ScV16ScV16ScV16ScV8Sci", "n") |
||
739 | BUILTIN(__builtin_neon_vqtbx3q_v, "V16ScV16ScV16ScV16ScV16ScV16Sci", "n") |
||
740 | BUILTIN(__builtin_neon_vqtbx4_v, "V8ScV8ScV16ScV16ScV16ScV16ScV8Sci", "n") |
||
741 | BUILTIN(__builtin_neon_vqtbx4q_v, "V16ScV16ScV16ScV16ScV16ScV16ScV16Sci", "n") |
||
742 | BUILTIN(__builtin_neon_vraddhn_v, "V8ScV16ScV16Sci", "n") |
||
743 | TARGET_BUILTIN(__builtin_neon_vrax1q_u64, "V16ScV16ScV16Sci", "n", "sha3") |
||
744 | BUILTIN(__builtin_neon_vrbit_v, "V8ScV8Sci", "n") |
||
745 | BUILTIN(__builtin_neon_vrbitq_v, "V16ScV16Sci", "n") |
||
746 | TARGET_BUILTIN(__builtin_neon_vrecpe_f16, "V8ScV8Sci", "n", "fullfp16") |
||
747 | BUILTIN(__builtin_neon_vrecpe_v, "V8ScV8Sci", "n") |
||
748 | BUILTIN(__builtin_neon_vrecped_f64, "dd", "n") |
||
749 | TARGET_BUILTIN(__builtin_neon_vrecpeq_f16, "V16ScV16Sci", "n", "fullfp16") |
||
750 | BUILTIN(__builtin_neon_vrecpeq_v, "V16ScV16Sci", "n") |
||
751 | BUILTIN(__builtin_neon_vrecpes_f32, "ff", "n") |
||
752 | TARGET_BUILTIN(__builtin_neon_vrecps_f16, "V8ScV8ScV8Sci", "n", "fullfp16") |
||
753 | BUILTIN(__builtin_neon_vrecps_v, "V8ScV8ScV8Sci", "n") |
||
754 | BUILTIN(__builtin_neon_vrecpsd_f64, "ddd", "n") |
||
755 | TARGET_BUILTIN(__builtin_neon_vrecpsq_f16, "V16ScV16ScV16Sci", "n", "fullfp16") |
||
756 | BUILTIN(__builtin_neon_vrecpsq_v, "V16ScV16ScV16Sci", "n") |
||
757 | BUILTIN(__builtin_neon_vrecpss_f32, "fff", "n") |
||
758 | BUILTIN(__builtin_neon_vrecpxd_f64, "dd", "n") |
||
759 | BUILTIN(__builtin_neon_vrecpxs_f32, "ff", "n") |
||
760 | BUILTIN(__builtin_neon_vrhadd_v, "V8ScV8ScV8Sci", "n") |
||
761 | BUILTIN(__builtin_neon_vrhaddq_v, "V16ScV16ScV16Sci", "n") |
||
762 | TARGET_BUILTIN(__builtin_neon_vrnd32x_f32, "V8ScV8Sci", "n", "v8.5a") |
||
763 | TARGET_BUILTIN(__builtin_neon_vrnd32xq_f32, "V16ScV16Sci", "n", "v8.5a") |
||
764 | TARGET_BUILTIN(__builtin_neon_vrnd32z_f32, "V8ScV8Sci", "n", "v8.5a") |
||
765 | TARGET_BUILTIN(__builtin_neon_vrnd32zq_f32, "V16ScV16Sci", "n", "v8.5a") |
||
766 | TARGET_BUILTIN(__builtin_neon_vrnd64x_f32, "V8ScV8Sci", "n", "v8.5a") |
||
767 | TARGET_BUILTIN(__builtin_neon_vrnd64xq_f32, "V16ScV16Sci", "n", "v8.5a") |
||
768 | TARGET_BUILTIN(__builtin_neon_vrnd64z_f32, "V8ScV8Sci", "n", "v8.5a") |
||
769 | TARGET_BUILTIN(__builtin_neon_vrnd64zq_f32, "V16ScV16Sci", "n", "v8.5a") |
||
770 | TARGET_BUILTIN(__builtin_neon_vrnd_f16, "V8ScV8Sci", "n", "fullfp16") |
||
771 | BUILTIN(__builtin_neon_vrnd_v, "V8ScV8Sci", "n") |
||
772 | TARGET_BUILTIN(__builtin_neon_vrnda_f16, "V8ScV8Sci", "n", "fullfp16") |
||
773 | BUILTIN(__builtin_neon_vrnda_v, "V8ScV8Sci", "n") |
||
774 | TARGET_BUILTIN(__builtin_neon_vrndaq_f16, "V16ScV16Sci", "n", "fullfp16") |
||
775 | BUILTIN(__builtin_neon_vrndaq_v, "V16ScV16Sci", "n") |
||
776 | TARGET_BUILTIN(__builtin_neon_vrndi_f16, "V8ScV8Sci", "n", "fullfp16") |
||
777 | BUILTIN(__builtin_neon_vrndi_v, "V8ScV8Sci", "n") |
||
778 | TARGET_BUILTIN(__builtin_neon_vrndiq_f16, "V16ScV16Sci", "n", "fullfp16") |
||
779 | BUILTIN(__builtin_neon_vrndiq_v, "V16ScV16Sci", "n") |
||
780 | TARGET_BUILTIN(__builtin_neon_vrndm_f16, "V8ScV8Sci", "n", "fullfp16") |
||
781 | BUILTIN(__builtin_neon_vrndm_v, "V8ScV8Sci", "n") |
||
782 | TARGET_BUILTIN(__builtin_neon_vrndmq_f16, "V16ScV16Sci", "n", "fullfp16") |
||
783 | BUILTIN(__builtin_neon_vrndmq_v, "V16ScV16Sci", "n") |
||
784 | TARGET_BUILTIN(__builtin_neon_vrndn_f16, "V8ScV8Sci", "n", "fullfp16") |
||
785 | BUILTIN(__builtin_neon_vrndn_v, "V8ScV8Sci", "n") |
||
786 | TARGET_BUILTIN(__builtin_neon_vrndnq_f16, "V16ScV16Sci", "n", "fullfp16") |
||
787 | BUILTIN(__builtin_neon_vrndnq_v, "V16ScV16Sci", "n") |
||
788 | BUILTIN(__builtin_neon_vrndns_f32, "ff", "n") |
||
789 | TARGET_BUILTIN(__builtin_neon_vrndp_f16, "V8ScV8Sci", "n", "fullfp16") |
||
790 | BUILTIN(__builtin_neon_vrndp_v, "V8ScV8Sci", "n") |
||
791 | TARGET_BUILTIN(__builtin_neon_vrndpq_f16, "V16ScV16Sci", "n", "fullfp16") |
||
792 | BUILTIN(__builtin_neon_vrndpq_v, "V16ScV16Sci", "n") |
||
793 | TARGET_BUILTIN(__builtin_neon_vrndq_f16, "V16ScV16Sci", "n", "fullfp16") |
||
794 | BUILTIN(__builtin_neon_vrndq_v, "V16ScV16Sci", "n") |
||
795 | TARGET_BUILTIN(__builtin_neon_vrndx_f16, "V8ScV8Sci", "n", "fullfp16") |
||
796 | BUILTIN(__builtin_neon_vrndx_v, "V8ScV8Sci", "n") |
||
797 | TARGET_BUILTIN(__builtin_neon_vrndxq_f16, "V16ScV16Sci", "n", "fullfp16") |
||
798 | BUILTIN(__builtin_neon_vrndxq_v, "V16ScV16Sci", "n") |
||
799 | BUILTIN(__builtin_neon_vrshl_v, "V8ScV8ScV8Sci", "n") |
||
800 | BUILTIN(__builtin_neon_vrshld_s64, "WiWiWi", "n") |
||
801 | BUILTIN(__builtin_neon_vrshld_u64, "UWiUWiWi", "n") |
||
802 | BUILTIN(__builtin_neon_vrshlq_v, "V16ScV16ScV16Sci", "n") |
||
803 | BUILTIN(__builtin_neon_vrshr_n_v, "V8ScV8ScIii", "n") |
||
804 | BUILTIN(__builtin_neon_vrshrd_n_s64, "WiWiIi", "n") |
||
805 | BUILTIN(__builtin_neon_vrshrd_n_u64, "UWiUWiIi", "n") |
||
806 | BUILTIN(__builtin_neon_vrshrn_n_v, "V8ScV16ScIii", "n") |
||
807 | BUILTIN(__builtin_neon_vrshrq_n_v, "V16ScV16ScIii", "n") |
||
808 | TARGET_BUILTIN(__builtin_neon_vrsqrte_f16, "V8ScV8Sci", "n", "fullfp16") |
||
809 | BUILTIN(__builtin_neon_vrsqrte_v, "V8ScV8Sci", "n") |
||
810 | BUILTIN(__builtin_neon_vrsqrted_f64, "dd", "n") |
||
811 | TARGET_BUILTIN(__builtin_neon_vrsqrteq_f16, "V16ScV16Sci", "n", "fullfp16") |
||
812 | BUILTIN(__builtin_neon_vrsqrteq_v, "V16ScV16Sci", "n") |
||
813 | BUILTIN(__builtin_neon_vrsqrtes_f32, "ff", "n") |
||
814 | TARGET_BUILTIN(__builtin_neon_vrsqrts_f16, "V8ScV8ScV8Sci", "n", "fullfp16") |
||
815 | BUILTIN(__builtin_neon_vrsqrts_v, "V8ScV8ScV8Sci", "n") |
||
816 | BUILTIN(__builtin_neon_vrsqrtsd_f64, "ddd", "n") |
||
817 | TARGET_BUILTIN(__builtin_neon_vrsqrtsq_f16, "V16ScV16ScV16Sci", "n", "fullfp16") |
||
818 | BUILTIN(__builtin_neon_vrsqrtsq_v, "V16ScV16ScV16Sci", "n") |
||
819 | BUILTIN(__builtin_neon_vrsqrtss_f32, "fff", "n") |
||
820 | BUILTIN(__builtin_neon_vrsra_n_v, "V8ScV8ScV8ScIii", "n") |
||
821 | BUILTIN(__builtin_neon_vrsrad_n_s64, "WiWiWiIi", "n") |
||
822 | BUILTIN(__builtin_neon_vrsrad_n_u64, "UWiUWiUWiIi", "n") |
||
823 | BUILTIN(__builtin_neon_vrsraq_n_v, "V16ScV16ScV16ScIii", "n") |
||
824 | BUILTIN(__builtin_neon_vrsubhn_v, "V8ScV16ScV16Sci", "n") |
||
825 | TARGET_BUILTIN(__builtin_neon_vset_lane_bf16, "V4yyV4yIi", "n", "bf16") |
||
826 | BUILTIN(__builtin_neon_vset_lane_f32, "V2ffV2fIi", "n") |
||
827 | BUILTIN(__builtin_neon_vset_lane_f64, "V1ddV1dIi", "n") |
||
828 | BUILTIN(__builtin_neon_vset_lane_i16, "V4ssV4sIi", "n") |
||
829 | BUILTIN(__builtin_neon_vset_lane_i32, "V2iiV2iIi", "n") |
||
830 | BUILTIN(__builtin_neon_vset_lane_i64, "V1WiWiV1WiIi", "n") |
||
831 | BUILTIN(__builtin_neon_vset_lane_i8, "V8ScScV8ScIi", "n") |
||
832 | TARGET_BUILTIN(__builtin_neon_vsetq_lane_bf16, "V8yyV8yIi", "n", "bf16") |
||
833 | BUILTIN(__builtin_neon_vsetq_lane_f32, "V4ffV4fIi", "n") |
||
834 | BUILTIN(__builtin_neon_vsetq_lane_f64, "V2ddV2dIi", "n") |
||
835 | BUILTIN(__builtin_neon_vsetq_lane_i16, "V8ssV8sIi", "n") |
||
836 | BUILTIN(__builtin_neon_vsetq_lane_i32, "V4iiV4iIi", "n") |
||
837 | BUILTIN(__builtin_neon_vsetq_lane_i64, "V2WiWiV2WiIi", "n") |
||
838 | BUILTIN(__builtin_neon_vsetq_lane_i8, "V16ScScV16ScIi", "n") |
||
839 | TARGET_BUILTIN(__builtin_neon_vsha1cq_u32, "V4iV4UiUiV4Ui", "n", "sha2") |
||
840 | TARGET_BUILTIN(__builtin_neon_vsha1h_u32, "UiUi", "n", "sha2") |
||
841 | TARGET_BUILTIN(__builtin_neon_vsha1mq_u32, "V4iV4UiUiV4Ui", "n", "sha2") |
||
842 | TARGET_BUILTIN(__builtin_neon_vsha1pq_u32, "V4iV4UiUiV4Ui", "n", "sha2") |
||
843 | TARGET_BUILTIN(__builtin_neon_vsha1su0q_u32, "V16ScV16ScV16ScV16Sci", "n", "sha2") |
||
844 | TARGET_BUILTIN(__builtin_neon_vsha1su1q_u32, "V16ScV16ScV16Sci", "n", "sha2") |
||
845 | TARGET_BUILTIN(__builtin_neon_vsha256h2q_u32, "V16ScV16ScV16ScV16Sci", "n", "sha2") |
||
846 | TARGET_BUILTIN(__builtin_neon_vsha256hq_u32, "V16ScV16ScV16ScV16Sci", "n", "sha2") |
||
847 | TARGET_BUILTIN(__builtin_neon_vsha256su0q_u32, "V16ScV16ScV16Sci", "n", "sha2") |
||
848 | TARGET_BUILTIN(__builtin_neon_vsha256su1q_u32, "V16ScV16ScV16ScV16Sci", "n", "sha2") |
||
849 | TARGET_BUILTIN(__builtin_neon_vsha512h2q_u64, "V16ScV16ScV16ScV16Sci", "n", "sha3") |
||
850 | TARGET_BUILTIN(__builtin_neon_vsha512hq_u64, "V16ScV16ScV16ScV16Sci", "n", "sha3") |
||
851 | TARGET_BUILTIN(__builtin_neon_vsha512su0q_u64, "V16ScV16ScV16Sci", "n", "sha3") |
||
852 | TARGET_BUILTIN(__builtin_neon_vsha512su1q_u64, "V16ScV16ScV16ScV16Sci", "n", "sha3") |
||
853 | BUILTIN(__builtin_neon_vshl_n_v, "V8ScV8ScIii", "n") |
||
854 | BUILTIN(__builtin_neon_vshl_v, "V8ScV8ScV8Sci", "n") |
||
855 | BUILTIN(__builtin_neon_vshld_n_s64, "WiWiIi", "n") |
||
856 | BUILTIN(__builtin_neon_vshld_n_u64, "UWiUWiIi", "n") |
||
857 | BUILTIN(__builtin_neon_vshld_s64, "WiWiWi", "n") |
||
858 | BUILTIN(__builtin_neon_vshld_u64, "UWiUWiWi", "n") |
||
859 | BUILTIN(__builtin_neon_vshll_n_v, "V16ScV8ScIii", "n") |
||
860 | BUILTIN(__builtin_neon_vshlq_n_v, "V16ScV16ScIii", "n") |
||
861 | BUILTIN(__builtin_neon_vshlq_v, "V16ScV16ScV16Sci", "n") |
||
862 | BUILTIN(__builtin_neon_vshr_n_v, "V8ScV8ScIii", "n") |
||
863 | BUILTIN(__builtin_neon_vshrd_n_s64, "WiWiIi", "n") |
||
864 | BUILTIN(__builtin_neon_vshrd_n_u64, "UWiUWiIi", "n") |
||
865 | BUILTIN(__builtin_neon_vshrn_n_v, "V8ScV16ScIii", "n") |
||
866 | BUILTIN(__builtin_neon_vshrq_n_v, "V16ScV16ScIii", "n") |
||
867 | BUILTIN(__builtin_neon_vsli_n_v, "V8ScV8ScV8ScIii", "n") |
||
868 | BUILTIN(__builtin_neon_vslid_n_s64, "WiWiWiIi", "n") |
||
869 | BUILTIN(__builtin_neon_vslid_n_u64, "UWiUWiUWiIi", "n") |
||
870 | BUILTIN(__builtin_neon_vsliq_n_v, "V16ScV16ScV16ScIii", "n") |
||
871 | TARGET_BUILTIN(__builtin_neon_vsm3partw1q_u32, "V16ScV16ScV16ScV16Sci", "n", "sm4") |
||
872 | TARGET_BUILTIN(__builtin_neon_vsm3partw2q_u32, "V16ScV16ScV16ScV16Sci", "n", "sm4") |
||
873 | TARGET_BUILTIN(__builtin_neon_vsm3ss1q_u32, "V16ScV16ScV16ScV16Sci", "n", "sm4") |
||
874 | TARGET_BUILTIN(__builtin_neon_vsm3tt1aq_u32, "V16ScV16ScV16ScV16ScIii", "n", "sm4") |
||
875 | TARGET_BUILTIN(__builtin_neon_vsm3tt1bq_u32, "V16ScV16ScV16ScV16ScIii", "n", "sm4") |
||
876 | TARGET_BUILTIN(__builtin_neon_vsm3tt2aq_u32, "V16ScV16ScV16ScV16ScIii", "n", "sm4") |
||
877 | TARGET_BUILTIN(__builtin_neon_vsm3tt2bq_u32, "V16ScV16ScV16ScV16ScIii", "n", "sm4") |
||
878 | TARGET_BUILTIN(__builtin_neon_vsm4ekeyq_u32, "V16ScV16ScV16Sci", "n", "sm4") |
||
879 | TARGET_BUILTIN(__builtin_neon_vsm4eq_u32, "V16ScV16ScV16Sci", "n", "sm4") |
||
880 | BUILTIN(__builtin_neon_vsqadd_v, "V8ScV8ScV8Sci", "n") |
||
881 | BUILTIN(__builtin_neon_vsqaddb_u8, "UcUcSc", "n") |
||
882 | BUILTIN(__builtin_neon_vsqaddd_u64, "UWiUWiWi", "n") |
||
883 | BUILTIN(__builtin_neon_vsqaddh_u16, "UsUss", "n") |
||
884 | BUILTIN(__builtin_neon_vsqaddq_v, "V16ScV16ScV16Sci", "n") |
||
885 | BUILTIN(__builtin_neon_vsqadds_u32, "UiUii", "n") |
||
886 | TARGET_BUILTIN(__builtin_neon_vsqrt_f16, "V8ScV8Sci", "n", "fullfp16") |
||
887 | BUILTIN(__builtin_neon_vsqrt_v, "V8ScV8Sci", "n") |
||
888 | TARGET_BUILTIN(__builtin_neon_vsqrtq_f16, "V16ScV16Sci", "n", "fullfp16") |
||
889 | BUILTIN(__builtin_neon_vsqrtq_v, "V16ScV16Sci", "n") |
||
890 | BUILTIN(__builtin_neon_vsra_n_v, "V8ScV8ScV8ScIii", "n") |
||
891 | BUILTIN(__builtin_neon_vsrad_n_s64, "WiWiWiIi", "n") |
||
892 | BUILTIN(__builtin_neon_vsrad_n_u64, "UWiUWiUWiIi", "n") |
||
893 | BUILTIN(__builtin_neon_vsraq_n_v, "V16ScV16ScV16ScIii", "n") |
||
894 | BUILTIN(__builtin_neon_vsri_n_v, "V8ScV8ScV8ScIii", "n") |
||
895 | BUILTIN(__builtin_neon_vsrid_n_s64, "WiWiWiIi", "n") |
||
896 | BUILTIN(__builtin_neon_vsrid_n_u64, "UWiUWiUWiIi", "n") |
||
897 | BUILTIN(__builtin_neon_vsriq_n_v, "V16ScV16ScV16ScIii", "n") |
||
898 | TARGET_BUILTIN(__builtin_neon_vst1_bf16, "vv*V8Sci", "n", "bf16") |
||
899 | TARGET_BUILTIN(__builtin_neon_vst1_bf16_x2, "vv*V8ScV8Sci", "n", "bf16") |
||
900 | TARGET_BUILTIN(__builtin_neon_vst1_bf16_x3, "vv*V8ScV8ScV8Sci", "n", "bf16") |
||
901 | TARGET_BUILTIN(__builtin_neon_vst1_bf16_x4, "vv*V8ScV8ScV8ScV8Sci", "n", "bf16") |
||
902 | TARGET_BUILTIN(__builtin_neon_vst1_lane_bf16, "vv*V8ScIii", "n", "bf16") |
||
903 | BUILTIN(__builtin_neon_vst1_lane_v, "vv*V8ScIii", "n") |
||
904 | BUILTIN(__builtin_neon_vst1_v, "vv*V8Sci", "n") |
||
905 | BUILTIN(__builtin_neon_vst1_x2_v, "vv*V8ScV8Sci", "n") |
||
906 | BUILTIN(__builtin_neon_vst1_x3_v, "vv*V8ScV8ScV8Sci", "n") |
||
907 | BUILTIN(__builtin_neon_vst1_x4_v, "vv*V8ScV8ScV8ScV8Sci", "n") |
||
908 | TARGET_BUILTIN(__builtin_neon_vst1q_bf16, "vv*V16Sci", "n", "bf16") |
||
909 | TARGET_BUILTIN(__builtin_neon_vst1q_bf16_x2, "vv*V16ScV16Sci", "n", "bf16") |
||
910 | TARGET_BUILTIN(__builtin_neon_vst1q_bf16_x3, "vv*V16ScV16ScV16Sci", "n", "bf16") |
||
911 | TARGET_BUILTIN(__builtin_neon_vst1q_bf16_x4, "vv*V16ScV16ScV16ScV16Sci", "n", "bf16") |
||
912 | TARGET_BUILTIN(__builtin_neon_vst1q_lane_bf16, "vv*V16ScIii", "n", "bf16") |
||
913 | BUILTIN(__builtin_neon_vst1q_lane_v, "vv*V16ScIii", "n") |
||
914 | BUILTIN(__builtin_neon_vst1q_v, "vv*V16Sci", "n") |
||
915 | BUILTIN(__builtin_neon_vst1q_x2_v, "vv*V16ScV16Sci", "n") |
||
916 | BUILTIN(__builtin_neon_vst1q_x3_v, "vv*V16ScV16ScV16Sci", "n") |
||
917 | BUILTIN(__builtin_neon_vst1q_x4_v, "vv*V16ScV16ScV16ScV16Sci", "n") |
||
918 | TARGET_BUILTIN(__builtin_neon_vst2_bf16, "vv*V8ScV8Sci", "n", "bf16") |
||
919 | TARGET_BUILTIN(__builtin_neon_vst2_lane_bf16, "vv*V8ScV8ScIii", "n", "bf16") |
||
920 | BUILTIN(__builtin_neon_vst2_lane_v, "vv*V8ScV8ScIii", "n") |
||
921 | BUILTIN(__builtin_neon_vst2_v, "vv*V8ScV8Sci", "n") |
||
922 | TARGET_BUILTIN(__builtin_neon_vst2q_bf16, "vv*V16ScV16Sci", "n", "bf16") |
||
923 | TARGET_BUILTIN(__builtin_neon_vst2q_lane_bf16, "vv*V16ScV16ScIii", "n", "bf16") |
||
924 | BUILTIN(__builtin_neon_vst2q_lane_v, "vv*V16ScV16ScIii", "n") |
||
925 | BUILTIN(__builtin_neon_vst2q_v, "vv*V16ScV16Sci", "n") |
||
926 | TARGET_BUILTIN(__builtin_neon_vst3_bf16, "vv*V8ScV8ScV8Sci", "n", "bf16") |
||
927 | TARGET_BUILTIN(__builtin_neon_vst3_lane_bf16, "vv*V8ScV8ScV8ScIii", "n", "bf16") |
||
928 | BUILTIN(__builtin_neon_vst3_lane_v, "vv*V8ScV8ScV8ScIii", "n") |
||
929 | BUILTIN(__builtin_neon_vst3_v, "vv*V8ScV8ScV8Sci", "n") |
||
930 | TARGET_BUILTIN(__builtin_neon_vst3q_bf16, "vv*V16ScV16ScV16Sci", "n", "bf16") |
||
931 | TARGET_BUILTIN(__builtin_neon_vst3q_lane_bf16, "vv*V16ScV16ScV16ScIii", "n", "bf16") |
||
932 | BUILTIN(__builtin_neon_vst3q_lane_v, "vv*V16ScV16ScV16ScIii", "n") |
||
933 | BUILTIN(__builtin_neon_vst3q_v, "vv*V16ScV16ScV16Sci", "n") |
||
934 | TARGET_BUILTIN(__builtin_neon_vst4_bf16, "vv*V8ScV8ScV8ScV8Sci", "n", "bf16") |
||
935 | TARGET_BUILTIN(__builtin_neon_vst4_lane_bf16, "vv*V8ScV8ScV8ScV8ScIii", "n", "bf16") |
||
936 | BUILTIN(__builtin_neon_vst4_lane_v, "vv*V8ScV8ScV8ScV8ScIii", "n") |
||
937 | BUILTIN(__builtin_neon_vst4_v, "vv*V8ScV8ScV8ScV8Sci", "n") |
||
938 | TARGET_BUILTIN(__builtin_neon_vst4q_bf16, "vv*V16ScV16ScV16ScV16Sci", "n", "bf16") |
||
939 | TARGET_BUILTIN(__builtin_neon_vst4q_lane_bf16, "vv*V16ScV16ScV16ScV16ScIii", "n", "bf16") |
||
940 | BUILTIN(__builtin_neon_vst4q_lane_v, "vv*V16ScV16ScV16ScV16ScIii", "n") |
||
941 | BUILTIN(__builtin_neon_vst4q_v, "vv*V16ScV16ScV16ScV16Sci", "n") |
||
942 | BUILTIN(__builtin_neon_vstrq_p128, "vv*ULLLi", "n") |
||
943 | BUILTIN(__builtin_neon_vsubd_s64, "WiWiWi", "n") |
||
944 | BUILTIN(__builtin_neon_vsubd_u64, "UWiUWiUWi", "n") |
||
945 | BUILTIN(__builtin_neon_vsubhn_v, "V8ScV16ScV16Sci", "n") |
||
946 | BUILTIN(__builtin_neon_vtbl1_v, "V8ScV8ScV8Sci", "n") |
||
947 | BUILTIN(__builtin_neon_vtbl2_v, "V8ScV8ScV8ScV8Sci", "n") |
||
948 | BUILTIN(__builtin_neon_vtbl3_v, "V8ScV8ScV8ScV8ScV8Sci", "n") |
||
949 | BUILTIN(__builtin_neon_vtbl4_v, "V8ScV8ScV8ScV8ScV8ScV8Sci", "n") |
||
950 | BUILTIN(__builtin_neon_vtbx1_v, "V8ScV8ScV8ScV8Sci", "n") |
||
951 | BUILTIN(__builtin_neon_vtbx2_v, "V8ScV8ScV8ScV8ScV8Sci", "n") |
||
952 | BUILTIN(__builtin_neon_vtbx3_v, "V8ScV8ScV8ScV8ScV8ScV8Sci", "n") |
||
953 | BUILTIN(__builtin_neon_vtbx4_v, "V8ScV8ScV8ScV8ScV8ScV8ScV8Sci", "n") |
||
954 | TARGET_BUILTIN(__builtin_neon_vtrn_f16, "vv*V8ScV8Sci", "n", "fullfp16") |
||
955 | BUILTIN(__builtin_neon_vtrn_v, "vv*V8ScV8Sci", "n") |
||
956 | TARGET_BUILTIN(__builtin_neon_vtrnq_f16, "vv*V16ScV16Sci", "n", "fullfp16") |
||
957 | BUILTIN(__builtin_neon_vtrnq_v, "vv*V16ScV16Sci", "n") |
||
958 | BUILTIN(__builtin_neon_vtst_v, "V8ScV8ScV8Sci", "n") |
||
959 | BUILTIN(__builtin_neon_vtstd_s64, "UWiWiWi", "n") |
||
960 | BUILTIN(__builtin_neon_vtstd_u64, "UWiUWiUWi", "n") |
||
961 | BUILTIN(__builtin_neon_vtstq_v, "V16ScV16ScV16Sci", "n") |
||
962 | BUILTIN(__builtin_neon_vuqadd_v, "V8ScV8ScV8Sci", "n") |
||
963 | BUILTIN(__builtin_neon_vuqaddb_s8, "ScScUc", "n") |
||
964 | BUILTIN(__builtin_neon_vuqaddd_s64, "WiWiUWi", "n") |
||
965 | BUILTIN(__builtin_neon_vuqaddh_s16, "ssUs", "n") |
||
966 | BUILTIN(__builtin_neon_vuqaddq_v, "V16ScV16ScV16Sci", "n") |
||
967 | BUILTIN(__builtin_neon_vuqadds_s32, "iiUi", "n") |
||
968 | TARGET_BUILTIN(__builtin_neon_vusdot_s32, "V8ScV8ScV8ScV8Sci", "n", "i8mm") |
||
969 | TARGET_BUILTIN(__builtin_neon_vusdotq_s32, "V16ScV16ScV16ScV16Sci", "n", "i8mm") |
||
970 | TARGET_BUILTIN(__builtin_neon_vusmmlaq_s32, "V16ScV16ScV16ScV16Sci", "n", "i8mm") |
||
971 | TARGET_BUILTIN(__builtin_neon_vuzp_f16, "vv*V8ScV8Sci", "n", "fullfp16") |
||
972 | BUILTIN(__builtin_neon_vuzp_v, "vv*V8ScV8Sci", "n") |
||
973 | TARGET_BUILTIN(__builtin_neon_vuzpq_f16, "vv*V16ScV16Sci", "n", "fullfp16") |
||
974 | BUILTIN(__builtin_neon_vuzpq_v, "vv*V16ScV16Sci", "n") |
||
975 | TARGET_BUILTIN(__builtin_neon_vxarq_u64, "V16ScV16ScV16ScIii", "n", "sha3") |
||
976 | TARGET_BUILTIN(__builtin_neon_vzip_f16, "vv*V8ScV8Sci", "n", "fullfp16") |
||
977 | BUILTIN(__builtin_neon_vzip_v, "vv*V8ScV8Sci", "n") |
||
978 | TARGET_BUILTIN(__builtin_neon_vzipq_f16, "vv*V16ScV16Sci", "n", "fullfp16") |
||
979 | BUILTIN(__builtin_neon_vzipq_v, "vv*V16ScV16Sci", "n") |
||
980 | #endif |
||
981 | |||
982 | #ifdef GET_NEON_OVERLOAD_CHECK |
||
983 | case NEON::BI__builtin_neon___a32_vcvt_bf16_f32: mask = 0x800ULL; break; |
||
984 | case NEON::BI__builtin_neon___a64_vcvtq_low_bf16_f32: mask = 0x80000000000ULL; break; |
||
985 | case NEON::BI__builtin_neon_splat_lane_bf16: mask = 0x800ULL; break; |
||
986 | case NEON::BI__builtin_neon_splat_lane_v: mask = 0xf077fULL; break; |
||
987 | case NEON::BI__builtin_neon_splat_laneq_bf16: mask = 0x80000000000ULL; break; |
||
988 | case NEON::BI__builtin_neon_splat_laneq_v: mask = 0xf077f00000000ULL; break; |
||
989 | case NEON::BI__builtin_neon_splatq_lane_bf16: mask = 0x800ULL; break; |
||
990 | case NEON::BI__builtin_neon_splatq_lane_v: mask = 0xf077fULL; break; |
||
991 | case NEON::BI__builtin_neon_splatq_laneq_bf16: mask = 0x80000000000ULL; break; |
||
992 | case NEON::BI__builtin_neon_splatq_laneq_v: mask = 0xf077f00000000ULL; break; |
||
993 | case NEON::BI__builtin_neon_vabd_f16: mask = 0x100ULL; break; |
||
994 | case NEON::BI__builtin_neon_vabd_v: mask = 0x70607ULL; break; |
||
995 | case NEON::BI__builtin_neon_vabdq_f16: mask = 0x10000000000ULL; break; |
||
996 | case NEON::BI__builtin_neon_vabdq_v: mask = 0x7060700000000ULL; break; |
||
997 | case NEON::BI__builtin_neon_vabs_f16: mask = 0x100ULL; break; |
||
998 | case NEON::BI__builtin_neon_vabs_v: mask = 0x60fULL; break; |
||
999 | case NEON::BI__builtin_neon_vabsq_f16: mask = 0x10000000000ULL; break; |
||
1000 | case NEON::BI__builtin_neon_vabsq_v: mask = 0x60f00000000ULL; break; |
||
1001 | case NEON::BI__builtin_neon_vadd_v: mask = 0x70ULL; break; |
||
1002 | case NEON::BI__builtin_neon_vaddhn_v: mask = 0x70007ULL; break; |
||
1003 | case NEON::BI__builtin_neon_vaddq_v: mask = 0x7000000000ULL; break; |
||
1004 | case NEON::BI__builtin_neon_vaesdq_u8: mask = 0x1000000000000ULL; break; |
||
1005 | case NEON::BI__builtin_neon_vaeseq_u8: mask = 0x1000000000000ULL; break; |
||
1006 | case NEON::BI__builtin_neon_vaesimcq_u8: mask = 0x1000000000000ULL; break; |
||
1007 | case NEON::BI__builtin_neon_vaesmcq_u8: mask = 0x1000000000000ULL; break; |
||
1008 | case NEON::BI__builtin_neon_vbcaxq_s16: mask = 0x200000000ULL; break; |
||
1009 | case NEON::BI__builtin_neon_vbcaxq_s32: mask = 0x400000000ULL; break; |
||
1010 | case NEON::BI__builtin_neon_vbcaxq_s64: mask = 0x800000000ULL; break; |
||
1011 | case NEON::BI__builtin_neon_vbcaxq_s8: mask = 0x100000000ULL; break; |
||
1012 | case NEON::BI__builtin_neon_vbcaxq_u16: mask = 0x2000000000000ULL; break; |
||
1013 | case NEON::BI__builtin_neon_vbcaxq_u32: mask = 0x4000000000000ULL; break; |
||
1014 | case NEON::BI__builtin_neon_vbcaxq_u64: mask = 0x8000000000000ULL; break; |
||
1015 | case NEON::BI__builtin_neon_vbcaxq_u8: mask = 0x1000000000000ULL; break; |
||
1016 | case NEON::BI__builtin_neon_vbfdot_f32: mask = 0x200ULL; break; |
||
1017 | case NEON::BI__builtin_neon_vbfdotq_f32: mask = 0x20000000000ULL; break; |
||
1018 | case NEON::BI__builtin_neon_vbfmlalbq_f32: mask = 0x20000000000ULL; break; |
||
1019 | case NEON::BI__builtin_neon_vbfmlaltq_f32: mask = 0x20000000000ULL; break; |
||
1020 | case NEON::BI__builtin_neon_vbfmmlaq_f32: mask = 0x20000000000ULL; break; |
||
1021 | case NEON::BI__builtin_neon_vbsl_f16: mask = 0x100ULL; break; |
||
1022 | case NEON::BI__builtin_neon_vbsl_v: mask = 0xf067fULL; break; |
||
1023 | case NEON::BI__builtin_neon_vbslq_f16: mask = 0x10000000000ULL; break; |
||
1024 | case NEON::BI__builtin_neon_vbslq_v: mask = 0xf067f00000000ULL; break; |
||
1025 | case NEON::BI__builtin_neon_vcadd_rot270_f16: mask = 0x100ULL; break; |
||
1026 | case NEON::BI__builtin_neon_vcadd_rot270_f32: mask = 0x200ULL; break; |
||
1027 | case NEON::BI__builtin_neon_vcadd_rot90_f16: mask = 0x100ULL; break; |
||
1028 | case NEON::BI__builtin_neon_vcadd_rot90_f32: mask = 0x200ULL; break; |
||
1029 | case NEON::BI__builtin_neon_vcaddq_rot270_f16: mask = 0x10000000000ULL; break; |
||
1030 | case NEON::BI__builtin_neon_vcaddq_rot270_f32: mask = 0x20000000000ULL; break; |
||
1031 | case NEON::BI__builtin_neon_vcaddq_rot270_f64: mask = 0x40000000000ULL; break; |
||
1032 | case NEON::BI__builtin_neon_vcaddq_rot90_f16: mask = 0x10000000000ULL; break; |
||
1033 | case NEON::BI__builtin_neon_vcaddq_rot90_f32: mask = 0x20000000000ULL; break; |
||
1034 | case NEON::BI__builtin_neon_vcaddq_rot90_f64: mask = 0x40000000000ULL; break; |
||
1035 | case NEON::BI__builtin_neon_vcage_f16: mask = 0x20000ULL; break; |
||
1036 | case NEON::BI__builtin_neon_vcage_v: mask = 0xc0000ULL; break; |
||
1037 | case NEON::BI__builtin_neon_vcageq_f16: mask = 0x2000000000000ULL; break; |
||
1038 | case NEON::BI__builtin_neon_vcageq_v: mask = 0xc000000000000ULL; break; |
||
1039 | case NEON::BI__builtin_neon_vcagt_f16: mask = 0x20000ULL; break; |
||
1040 | case NEON::BI__builtin_neon_vcagt_v: mask = 0xc0000ULL; break; |
||
1041 | case NEON::BI__builtin_neon_vcagtq_f16: mask = 0x2000000000000ULL; break; |
||
1042 | case NEON::BI__builtin_neon_vcagtq_v: mask = 0xc000000000000ULL; break; |
||
1043 | case NEON::BI__builtin_neon_vcale_f16: mask = 0x20000ULL; break; |
||
1044 | case NEON::BI__builtin_neon_vcale_v: mask = 0xc0000ULL; break; |
||
1045 | case NEON::BI__builtin_neon_vcaleq_f16: mask = 0x2000000000000ULL; break; |
||
1046 | case NEON::BI__builtin_neon_vcaleq_v: mask = 0xc000000000000ULL; break; |
||
1047 | case NEON::BI__builtin_neon_vcalt_f16: mask = 0x20000ULL; break; |
||
1048 | case NEON::BI__builtin_neon_vcalt_v: mask = 0xc0000ULL; break; |
||
1049 | case NEON::BI__builtin_neon_vcaltq_f16: mask = 0x2000000000000ULL; break; |
||
1050 | case NEON::BI__builtin_neon_vcaltq_v: mask = 0xc000000000000ULL; break; |
||
1051 | case NEON::BI__builtin_neon_vceqz_f16: mask = 0x20000ULL; break; |
||
1052 | case NEON::BI__builtin_neon_vceqz_v: mask = 0xf0000ULL; break; |
||
1053 | case NEON::BI__builtin_neon_vceqzq_f16: mask = 0x2000000000000ULL; break; |
||
1054 | case NEON::BI__builtin_neon_vceqzq_v: mask = 0xf000000000000ULL; break; |
||
1055 | case NEON::BI__builtin_neon_vcgez_f16: mask = 0x20000ULL; break; |
||
1056 | case NEON::BI__builtin_neon_vcgez_v: mask = 0xf0000ULL; break; |
||
1057 | case NEON::BI__builtin_neon_vcgezq_f16: mask = 0x2000000000000ULL; break; |
||
1058 | case NEON::BI__builtin_neon_vcgezq_v: mask = 0xf000000000000ULL; break; |
||
1059 | case NEON::BI__builtin_neon_vcgtz_f16: mask = 0x20000ULL; break; |
||
1060 | case NEON::BI__builtin_neon_vcgtz_v: mask = 0xf0000ULL; break; |
||
1061 | case NEON::BI__builtin_neon_vcgtzq_f16: mask = 0x2000000000000ULL; break; |
||
1062 | case NEON::BI__builtin_neon_vcgtzq_v: mask = 0xf000000000000ULL; break; |
||
1063 | case NEON::BI__builtin_neon_vclez_f16: mask = 0x20000ULL; break; |
||
1064 | case NEON::BI__builtin_neon_vclez_v: mask = 0xf0000ULL; break; |
||
1065 | case NEON::BI__builtin_neon_vclezq_f16: mask = 0x2000000000000ULL; break; |
||
1066 | case NEON::BI__builtin_neon_vclezq_v: mask = 0xf000000000000ULL; break; |
||
1067 | case NEON::BI__builtin_neon_vcls_v: mask = 0x7ULL; break; |
||
1068 | case NEON::BI__builtin_neon_vclsq_v: mask = 0x700000000ULL; break; |
||
1069 | case NEON::BI__builtin_neon_vcltz_f16: mask = 0x20000ULL; break; |
||
1070 | case NEON::BI__builtin_neon_vcltz_v: mask = 0xf0000ULL; break; |
||
1071 | case NEON::BI__builtin_neon_vcltzq_f16: mask = 0x2000000000000ULL; break; |
||
1072 | case NEON::BI__builtin_neon_vcltzq_v: mask = 0xf000000000000ULL; break; |
||
1073 | case NEON::BI__builtin_neon_vclz_v: mask = 0x70007ULL; break; |
||
1074 | case NEON::BI__builtin_neon_vclzq_v: mask = 0x7000700000000ULL; break; |
||
1075 | case NEON::BI__builtin_neon_vcmla_f16: mask = 0x100ULL; break; |
||
1076 | case NEON::BI__builtin_neon_vcmla_f32: mask = 0x200ULL; break; |
||
1077 | case NEON::BI__builtin_neon_vcmla_f64: mask = 0x400ULL; break; |
||
1078 | case NEON::BI__builtin_neon_vcmla_rot180_f16: mask = 0x100ULL; break; |
||
1079 | case NEON::BI__builtin_neon_vcmla_rot180_f32: mask = 0x200ULL; break; |
||
1080 | case NEON::BI__builtin_neon_vcmla_rot180_f64: mask = 0x400ULL; break; |
||
1081 | case NEON::BI__builtin_neon_vcmla_rot270_f16: mask = 0x100ULL; break; |
||
1082 | case NEON::BI__builtin_neon_vcmla_rot270_f32: mask = 0x200ULL; break; |
||
1083 | case NEON::BI__builtin_neon_vcmla_rot270_f64: mask = 0x400ULL; break; |
||
1084 | case NEON::BI__builtin_neon_vcmla_rot90_f16: mask = 0x100ULL; break; |
||
1085 | case NEON::BI__builtin_neon_vcmla_rot90_f32: mask = 0x200ULL; break; |
||
1086 | case NEON::BI__builtin_neon_vcmla_rot90_f64: mask = 0x400ULL; break; |
||
1087 | case NEON::BI__builtin_neon_vcmlaq_f16: mask = 0x10000000000ULL; break; |
||
1088 | case NEON::BI__builtin_neon_vcmlaq_f32: mask = 0x20000000000ULL; break; |
||
1089 | case NEON::BI__builtin_neon_vcmlaq_f64: mask = 0x40000000000ULL; break; |
||
1090 | case NEON::BI__builtin_neon_vcmlaq_rot180_f16: mask = 0x10000000000ULL; break; |
||
1091 | case NEON::BI__builtin_neon_vcmlaq_rot180_f32: mask = 0x20000000000ULL; break; |
||
1092 | case NEON::BI__builtin_neon_vcmlaq_rot180_f64: mask = 0x40000000000ULL; break; |
||
1093 | case NEON::BI__builtin_neon_vcmlaq_rot270_f16: mask = 0x10000000000ULL; break; |
||
1094 | case NEON::BI__builtin_neon_vcmlaq_rot270_f32: mask = 0x20000000000ULL; break; |
||
1095 | case NEON::BI__builtin_neon_vcmlaq_rot270_f64: mask = 0x40000000000ULL; break; |
||
1096 | case NEON::BI__builtin_neon_vcmlaq_rot90_f16: mask = 0x10000000000ULL; break; |
||
1097 | case NEON::BI__builtin_neon_vcmlaq_rot90_f32: mask = 0x20000000000ULL; break; |
||
1098 | case NEON::BI__builtin_neon_vcmlaq_rot90_f64: mask = 0x40000000000ULL; break; |
||
1099 | case NEON::BI__builtin_neon_vcnt_v: mask = 0x10011ULL; break; |
||
1100 | case NEON::BI__builtin_neon_vcntq_v: mask = 0x1001100000000ULL; break; |
||
1101 | case NEON::BI__builtin_neon_vcvt_f16_f32: mask = 0x20000000000ULL; break; |
||
1102 | case NEON::BI__builtin_neon_vcvt_f16_s16: mask = 0x2ULL; break; |
||
1103 | case NEON::BI__builtin_neon_vcvt_f16_u16: mask = 0x20000ULL; break; |
||
1104 | case NEON::BI__builtin_neon_vcvt_f32_f16: mask = 0x100ULL; break; |
||
1105 | case NEON::BI__builtin_neon_vcvt_f32_f64: mask = 0x200ULL; break; |
||
1106 | case NEON::BI__builtin_neon_vcvt_f32_v: mask = 0x40004ULL; break; |
||
1107 | case NEON::BI__builtin_neon_vcvt_f64_f32: mask = 0x40000000000ULL; break; |
||
1108 | case NEON::BI__builtin_neon_vcvt_f64_v: mask = 0x80008ULL; break; |
||
1109 | case NEON::BI__builtin_neon_vcvt_n_f16_s16: mask = 0x2ULL; break; |
||
1110 | case NEON::BI__builtin_neon_vcvt_n_f16_u16: mask = 0x20000ULL; break; |
||
1111 | case NEON::BI__builtin_neon_vcvt_n_f32_v: mask = 0x40004ULL; break; |
||
1112 | case NEON::BI__builtin_neon_vcvt_n_f64_v: mask = 0x80008ULL; break; |
||
1113 | case NEON::BI__builtin_neon_vcvt_n_s16_f16: mask = 0x2ULL; break; |
||
1114 | case NEON::BI__builtin_neon_vcvt_n_s32_v: mask = 0x4ULL; break; |
||
1115 | case NEON::BI__builtin_neon_vcvt_n_s64_v: mask = 0x8ULL; break; |
||
1116 | case NEON::BI__builtin_neon_vcvt_n_u16_f16: mask = 0x20000ULL; break; |
||
1117 | case NEON::BI__builtin_neon_vcvt_n_u32_v: mask = 0x40000ULL; break; |
||
1118 | case NEON::BI__builtin_neon_vcvt_n_u64_v: mask = 0x80000ULL; break; |
||
1119 | case NEON::BI__builtin_neon_vcvt_s16_f16: mask = 0x2ULL; break; |
||
1120 | case NEON::BI__builtin_neon_vcvt_s32_v: mask = 0x4ULL; break; |
||
1121 | case NEON::BI__builtin_neon_vcvt_s64_v: mask = 0x8ULL; break; |
||
1122 | case NEON::BI__builtin_neon_vcvt_u16_f16: mask = 0x20000ULL; break; |
||
1123 | case NEON::BI__builtin_neon_vcvt_u32_v: mask = 0x40000ULL; break; |
||
1124 | case NEON::BI__builtin_neon_vcvt_u64_v: mask = 0x80000ULL; break; |
||
1125 | case NEON::BI__builtin_neon_vcvta_s16_f16: mask = 0x2ULL; break; |
||
1126 | case NEON::BI__builtin_neon_vcvta_s32_v: mask = 0x4ULL; break; |
||
1127 | case NEON::BI__builtin_neon_vcvta_s64_v: mask = 0x8ULL; break; |
||
1128 | case NEON::BI__builtin_neon_vcvta_u16_f16: mask = 0x20000ULL; break; |
||
1129 | case NEON::BI__builtin_neon_vcvta_u32_v: mask = 0x40000ULL; break; |
||
1130 | case NEON::BI__builtin_neon_vcvta_u64_v: mask = 0x80000ULL; break; |
||
1131 | case NEON::BI__builtin_neon_vcvtaq_s16_f16: mask = 0x200000000ULL; break; |
||
1132 | case NEON::BI__builtin_neon_vcvtaq_s32_v: mask = 0x400000000ULL; break; |
||
1133 | case NEON::BI__builtin_neon_vcvtaq_s64_v: mask = 0x800000000ULL; break; |
||
1134 | case NEON::BI__builtin_neon_vcvtaq_u16_f16: mask = 0x2000000000000ULL; break; |
||
1135 | case NEON::BI__builtin_neon_vcvtaq_u32_v: mask = 0x4000000000000ULL; break; |
||
1136 | case NEON::BI__builtin_neon_vcvtaq_u64_v: mask = 0x8000000000000ULL; break; |
||
1137 | case NEON::BI__builtin_neon_vcvtm_s16_f16: mask = 0x2ULL; break; |
||
1138 | case NEON::BI__builtin_neon_vcvtm_s32_v: mask = 0x4ULL; break; |
||
1139 | case NEON::BI__builtin_neon_vcvtm_s64_v: mask = 0x8ULL; break; |
||
1140 | case NEON::BI__builtin_neon_vcvtm_u16_f16: mask = 0x20000ULL; break; |
||
1141 | case NEON::BI__builtin_neon_vcvtm_u32_v: mask = 0x40000ULL; break; |
||
1142 | case NEON::BI__builtin_neon_vcvtm_u64_v: mask = 0x80000ULL; break; |
||
1143 | case NEON::BI__builtin_neon_vcvtmq_s16_f16: mask = 0x200000000ULL; break; |
||
1144 | case NEON::BI__builtin_neon_vcvtmq_s32_v: mask = 0x400000000ULL; break; |
||
1145 | case NEON::BI__builtin_neon_vcvtmq_s64_v: mask = 0x800000000ULL; break; |
||
1146 | case NEON::BI__builtin_neon_vcvtmq_u16_f16: mask = 0x2000000000000ULL; break; |
||
1147 | case NEON::BI__builtin_neon_vcvtmq_u32_v: mask = 0x4000000000000ULL; break; |
||
1148 | case NEON::BI__builtin_neon_vcvtmq_u64_v: mask = 0x8000000000000ULL; break; |
||
1149 | case NEON::BI__builtin_neon_vcvtn_s16_f16: mask = 0x2ULL; break; |
||
1150 | case NEON::BI__builtin_neon_vcvtn_s32_v: mask = 0x4ULL; break; |
||
1151 | case NEON::BI__builtin_neon_vcvtn_s64_v: mask = 0x8ULL; break; |
||
1152 | case NEON::BI__builtin_neon_vcvtn_u16_f16: mask = 0x20000ULL; break; |
||
1153 | case NEON::BI__builtin_neon_vcvtn_u32_v: mask = 0x40000ULL; break; |
||
1154 | case NEON::BI__builtin_neon_vcvtn_u64_v: mask = 0x80000ULL; break; |
||
1155 | case NEON::BI__builtin_neon_vcvtnq_s16_f16: mask = 0x200000000ULL; break; |
||
1156 | case NEON::BI__builtin_neon_vcvtnq_s32_v: mask = 0x400000000ULL; break; |
||
1157 | case NEON::BI__builtin_neon_vcvtnq_s64_v: mask = 0x800000000ULL; break; |
||
1158 | case NEON::BI__builtin_neon_vcvtnq_u16_f16: mask = 0x2000000000000ULL; break; |
||
1159 | case NEON::BI__builtin_neon_vcvtnq_u32_v: mask = 0x4000000000000ULL; break; |
||
1160 | case NEON::BI__builtin_neon_vcvtnq_u64_v: mask = 0x8000000000000ULL; break; |
||
1161 | case NEON::BI__builtin_neon_vcvtp_s16_f16: mask = 0x2ULL; break; |
||
1162 | case NEON::BI__builtin_neon_vcvtp_s32_v: mask = 0x4ULL; break; |
||
1163 | case NEON::BI__builtin_neon_vcvtp_s64_v: mask = 0x8ULL; break; |
||
1164 | case NEON::BI__builtin_neon_vcvtp_u16_f16: mask = 0x20000ULL; break; |
||
1165 | case NEON::BI__builtin_neon_vcvtp_u32_v: mask = 0x40000ULL; break; |
||
1166 | case NEON::BI__builtin_neon_vcvtp_u64_v: mask = 0x80000ULL; break; |
||
1167 | case NEON::BI__builtin_neon_vcvtpq_s16_f16: mask = 0x200000000ULL; break; |
||
1168 | case NEON::BI__builtin_neon_vcvtpq_s32_v: mask = 0x400000000ULL; break; |
||
1169 | case NEON::BI__builtin_neon_vcvtpq_s64_v: mask = 0x800000000ULL; break; |
||
1170 | case NEON::BI__builtin_neon_vcvtpq_u16_f16: mask = 0x2000000000000ULL; break; |
||
1171 | case NEON::BI__builtin_neon_vcvtpq_u32_v: mask = 0x4000000000000ULL; break; |
||
1172 | case NEON::BI__builtin_neon_vcvtpq_u64_v: mask = 0x8000000000000ULL; break; |
||
1173 | case NEON::BI__builtin_neon_vcvtq_f16_s16: mask = 0x200000000ULL; break; |
||
1174 | case NEON::BI__builtin_neon_vcvtq_f16_u16: mask = 0x2000000000000ULL; break; |
||
1175 | case NEON::BI__builtin_neon_vcvtq_f32_v: mask = 0x4000400000000ULL; break; |
||
1176 | case NEON::BI__builtin_neon_vcvtq_f64_v: mask = 0x8000800000000ULL; break; |
||
1177 | case NEON::BI__builtin_neon_vcvtq_high_bf16_f32: mask = 0x80000000000ULL; break; |
||
1178 | case NEON::BI__builtin_neon_vcvtq_n_f16_s16: mask = 0x200000000ULL; break; |
||
1179 | case NEON::BI__builtin_neon_vcvtq_n_f16_u16: mask = 0x2000000000000ULL; break; |
||
1180 | case NEON::BI__builtin_neon_vcvtq_n_f32_v: mask = 0x4000400000000ULL; break; |
||
1181 | case NEON::BI__builtin_neon_vcvtq_n_f64_v: mask = 0x8000800000000ULL; break; |
||
1182 | case NEON::BI__builtin_neon_vcvtq_n_s16_f16: mask = 0x200000000ULL; break; |
||
1183 | case NEON::BI__builtin_neon_vcvtq_n_s32_v: mask = 0x400000000ULL; break; |
||
1184 | case NEON::BI__builtin_neon_vcvtq_n_s64_v: mask = 0x800000000ULL; break; |
||
1185 | case NEON::BI__builtin_neon_vcvtq_n_u16_f16: mask = 0x2000000000000ULL; break; |
||
1186 | case NEON::BI__builtin_neon_vcvtq_n_u32_v: mask = 0x4000000000000ULL; break; |
||
1187 | case NEON::BI__builtin_neon_vcvtq_n_u64_v: mask = 0x8000000000000ULL; break; |
||
1188 | case NEON::BI__builtin_neon_vcvtq_s16_f16: mask = 0x200000000ULL; break; |
||
1189 | case NEON::BI__builtin_neon_vcvtq_s32_v: mask = 0x400000000ULL; break; |
||
1190 | case NEON::BI__builtin_neon_vcvtq_s64_v: mask = 0x800000000ULL; break; |
||
1191 | case NEON::BI__builtin_neon_vcvtq_u16_f16: mask = 0x2000000000000ULL; break; |
||
1192 | case NEON::BI__builtin_neon_vcvtq_u32_v: mask = 0x4000000000000ULL; break; |
||
1193 | case NEON::BI__builtin_neon_vcvtq_u64_v: mask = 0x8000000000000ULL; break; |
||
1194 | case NEON::BI__builtin_neon_vcvtx_f32_v: mask = 0x40000000000ULL; break; |
||
1195 | case NEON::BI__builtin_neon_vdot_s32: mask = 0x4ULL; break; |
||
1196 | case NEON::BI__builtin_neon_vdot_u32: mask = 0x40000ULL; break; |
||
1197 | case NEON::BI__builtin_neon_vdotq_s32: mask = 0x400000000ULL; break; |
||
1198 | case NEON::BI__builtin_neon_vdotq_u32: mask = 0x4000000000000ULL; break; |
||
1199 | case NEON::BI__builtin_neon_veor3q_s16: mask = 0x200000000ULL; break; |
||
1200 | case NEON::BI__builtin_neon_veor3q_s32: mask = 0x400000000ULL; break; |
||
1201 | case NEON::BI__builtin_neon_veor3q_s64: mask = 0x800000000ULL; break; |
||
1202 | case NEON::BI__builtin_neon_veor3q_s8: mask = 0x100000000ULL; break; |
||
1203 | case NEON::BI__builtin_neon_veor3q_u16: mask = 0x2000000000000ULL; break; |
||
1204 | case NEON::BI__builtin_neon_veor3q_u32: mask = 0x4000000000000ULL; break; |
||
1205 | case NEON::BI__builtin_neon_veor3q_u64: mask = 0x8000000000000ULL; break; |
||
1206 | case NEON::BI__builtin_neon_veor3q_u8: mask = 0x1000000000000ULL; break; |
||
1207 | case NEON::BI__builtin_neon_vext_f16: mask = 0x100ULL; break; |
||
1208 | case NEON::BI__builtin_neon_vext_v: mask = 0xf067fULL; break; |
||
1209 | case NEON::BI__builtin_neon_vextq_f16: mask = 0x10000000000ULL; break; |
||
1210 | case NEON::BI__builtin_neon_vextq_v: mask = 0xf067f00000000ULL; break; |
||
1211 | case NEON::BI__builtin_neon_vfma_f16: mask = 0x100ULL; break; |
||
1212 | case NEON::BI__builtin_neon_vfma_lane_f16: mask = 0x100ULL; break; |
||
1213 | case NEON::BI__builtin_neon_vfma_lane_v: mask = 0x600ULL; break; |
||
1214 | case NEON::BI__builtin_neon_vfma_laneq_f16: mask = 0x100ULL; break; |
||
1215 | case NEON::BI__builtin_neon_vfma_laneq_v: mask = 0x600ULL; break; |
||
1216 | case NEON::BI__builtin_neon_vfma_v: mask = 0x600ULL; break; |
||
1217 | case NEON::BI__builtin_neon_vfmaq_f16: mask = 0x10000000000ULL; break; |
||
1218 | case NEON::BI__builtin_neon_vfmaq_lane_f16: mask = 0x10000000000ULL; break; |
||
1219 | case NEON::BI__builtin_neon_vfmaq_lane_v: mask = 0x60000000000ULL; break; |
||
1220 | case NEON::BI__builtin_neon_vfmaq_laneq_f16: mask = 0x10000000000ULL; break; |
||
1221 | case NEON::BI__builtin_neon_vfmaq_laneq_v: mask = 0x60000000000ULL; break; |
||
1222 | case NEON::BI__builtin_neon_vfmaq_v: mask = 0x60000000000ULL; break; |
||
1223 | case NEON::BI__builtin_neon_vfmlal_high_f16: mask = 0x200ULL; break; |
||
1224 | case NEON::BI__builtin_neon_vfmlal_low_f16: mask = 0x200ULL; break; |
||
1225 | case NEON::BI__builtin_neon_vfmlalq_high_f16: mask = 0x20000000000ULL; break; |
||
1226 | case NEON::BI__builtin_neon_vfmlalq_low_f16: mask = 0x20000000000ULL; break; |
||
1227 | case NEON::BI__builtin_neon_vfmlsl_high_f16: mask = 0x200ULL; break; |
||
1228 | case NEON::BI__builtin_neon_vfmlsl_low_f16: mask = 0x200ULL; break; |
||
1229 | case NEON::BI__builtin_neon_vfmlslq_high_f16: mask = 0x20000000000ULL; break; |
||
1230 | case NEON::BI__builtin_neon_vfmlslq_low_f16: mask = 0x20000000000ULL; break; |
||
1231 | case NEON::BI__builtin_neon_vhadd_v: mask = 0x70007ULL; break; |
||
1232 | case NEON::BI__builtin_neon_vhaddq_v: mask = 0x7000700000000ULL; break; |
||
1233 | case NEON::BI__builtin_neon_vhsub_v: mask = 0x70007ULL; break; |
||
1234 | case NEON::BI__builtin_neon_vhsubq_v: mask = 0x7000700000000ULL; break; |
||
1235 | case NEON::BI__builtin_neon_vld1_bf16: mask = 0x800ULL; PtrArgNum = 0; HasConstPtr = true; break; |
||
1236 | case NEON::BI__builtin_neon_vld1_bf16_x2: mask = 0x800ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1237 | case NEON::BI__builtin_neon_vld1_bf16_x3: mask = 0x800ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1238 | case NEON::BI__builtin_neon_vld1_bf16_x4: mask = 0x800ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1239 | case NEON::BI__builtin_neon_vld1_dup_bf16: mask = 0x800ULL; break; |
||
1240 | case NEON::BI__builtin_neon_vld1_dup_v: mask = 0xf077fULL; break; |
||
1241 | case NEON::BI__builtin_neon_vld1_lane_bf16: mask = 0x800ULL; break; |
||
1242 | case NEON::BI__builtin_neon_vld1_lane_v: mask = 0xf077fULL; break; |
||
1243 | case NEON::BI__builtin_neon_vld1_v: mask = 0xf077fULL; PtrArgNum = 0; HasConstPtr = true; break; |
||
1244 | case NEON::BI__builtin_neon_vld1_x2_v: mask = 0xf077fULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1245 | case NEON::BI__builtin_neon_vld1_x3_v: mask = 0xf077fULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1246 | case NEON::BI__builtin_neon_vld1_x4_v: mask = 0xf077fULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1247 | case NEON::BI__builtin_neon_vld1q_bf16: mask = 0x80000000000ULL; PtrArgNum = 0; HasConstPtr = true; break; |
||
1248 | case NEON::BI__builtin_neon_vld1q_bf16_x2: mask = 0x80000000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1249 | case NEON::BI__builtin_neon_vld1q_bf16_x3: mask = 0x80000000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1250 | case NEON::BI__builtin_neon_vld1q_bf16_x4: mask = 0x80000000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1251 | case NEON::BI__builtin_neon_vld1q_dup_bf16: mask = 0x80000000000ULL; break; |
||
1252 | case NEON::BI__builtin_neon_vld1q_dup_v: mask = 0xf077f00000000ULL; break; |
||
1253 | case NEON::BI__builtin_neon_vld1q_lane_bf16: mask = 0x80000000000ULL; break; |
||
1254 | case NEON::BI__builtin_neon_vld1q_lane_v: mask = 0xf077f00000000ULL; break; |
||
1255 | case NEON::BI__builtin_neon_vld1q_v: mask = 0xf077f00000000ULL; PtrArgNum = 0; HasConstPtr = true; break; |
||
1256 | case NEON::BI__builtin_neon_vld1q_x2_v: mask = 0xf077f00000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1257 | case NEON::BI__builtin_neon_vld1q_x3_v: mask = 0xf077f00000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1258 | case NEON::BI__builtin_neon_vld1q_x4_v: mask = 0xf077f00000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1259 | case NEON::BI__builtin_neon_vld2_bf16: mask = 0x800ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1260 | case NEON::BI__builtin_neon_vld2_dup_bf16: mask = 0x800ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1261 | case NEON::BI__builtin_neon_vld2_dup_v: mask = 0xf077fULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1262 | case NEON::BI__builtin_neon_vld2_lane_bf16: mask = 0x800ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1263 | case NEON::BI__builtin_neon_vld2_lane_v: mask = 0xf077fULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1264 | case NEON::BI__builtin_neon_vld2_v: mask = 0xf077fULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1265 | case NEON::BI__builtin_neon_vld2q_bf16: mask = 0x80000000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1266 | case NEON::BI__builtin_neon_vld2q_dup_bf16: mask = 0x80000000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1267 | case NEON::BI__builtin_neon_vld2q_dup_v: mask = 0xf077f00000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1268 | case NEON::BI__builtin_neon_vld2q_lane_bf16: mask = 0x80000000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1269 | case NEON::BI__builtin_neon_vld2q_lane_v: mask = 0xf077f00000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1270 | case NEON::BI__builtin_neon_vld2q_v: mask = 0xf077f00000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1271 | case NEON::BI__builtin_neon_vld3_bf16: mask = 0x800ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1272 | case NEON::BI__builtin_neon_vld3_dup_bf16: mask = 0x800ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1273 | case NEON::BI__builtin_neon_vld3_dup_v: mask = 0xf077fULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1274 | case NEON::BI__builtin_neon_vld3_lane_bf16: mask = 0x800ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1275 | case NEON::BI__builtin_neon_vld3_lane_v: mask = 0xf077fULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1276 | case NEON::BI__builtin_neon_vld3_v: mask = 0xf077fULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1277 | case NEON::BI__builtin_neon_vld3q_bf16: mask = 0x80000000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1278 | case NEON::BI__builtin_neon_vld3q_dup_bf16: mask = 0x80000000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1279 | case NEON::BI__builtin_neon_vld3q_dup_v: mask = 0xf077f00000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1280 | case NEON::BI__builtin_neon_vld3q_lane_bf16: mask = 0x80000000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1281 | case NEON::BI__builtin_neon_vld3q_lane_v: mask = 0xf077f00000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1282 | case NEON::BI__builtin_neon_vld3q_v: mask = 0xf077f00000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1283 | case NEON::BI__builtin_neon_vld4_bf16: mask = 0x800ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1284 | case NEON::BI__builtin_neon_vld4_dup_bf16: mask = 0x800ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1285 | case NEON::BI__builtin_neon_vld4_dup_v: mask = 0xf077fULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1286 | case NEON::BI__builtin_neon_vld4_lane_bf16: mask = 0x800ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1287 | case NEON::BI__builtin_neon_vld4_lane_v: mask = 0xf077fULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1288 | case NEON::BI__builtin_neon_vld4_v: mask = 0xf077fULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1289 | case NEON::BI__builtin_neon_vld4q_bf16: mask = 0x80000000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1290 | case NEON::BI__builtin_neon_vld4q_dup_bf16: mask = 0x80000000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1291 | case NEON::BI__builtin_neon_vld4q_dup_v: mask = 0xf077f00000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1292 | case NEON::BI__builtin_neon_vld4q_lane_bf16: mask = 0x80000000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1293 | case NEON::BI__builtin_neon_vld4q_lane_v: mask = 0xf077f00000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1294 | case NEON::BI__builtin_neon_vld4q_v: mask = 0xf077f00000000ULL; PtrArgNum = 1; HasConstPtr = true; break; |
||
1295 | case NEON::BI__builtin_neon_vmax_f16: mask = 0x100ULL; break; |
||
1296 | case NEON::BI__builtin_neon_vmax_v: mask = 0x70607ULL; break; |
||
1297 | case NEON::BI__builtin_neon_vmaxnm_f16: mask = 0x100ULL; break; |
||
1298 | case NEON::BI__builtin_neon_vmaxnm_v: mask = 0x600ULL; break; |
||
1299 | case NEON::BI__builtin_neon_vmaxnmq_f16: mask = 0x10000000000ULL; break; |
||
1300 | case NEON::BI__builtin_neon_vmaxnmq_v: mask = 0x60000000000ULL; break; |
||
1301 | case NEON::BI__builtin_neon_vmaxq_f16: mask = 0x10000000000ULL; break; |
||
1302 | case NEON::BI__builtin_neon_vmaxq_v: mask = 0x7060700000000ULL; break; |
||
1303 | case NEON::BI__builtin_neon_vmin_f16: mask = 0x100ULL; break; |
||
1304 | case NEON::BI__builtin_neon_vmin_v: mask = 0x70607ULL; break; |
||
1305 | case NEON::BI__builtin_neon_vminnm_f16: mask = 0x100ULL; break; |
||
1306 | case NEON::BI__builtin_neon_vminnm_v: mask = 0x600ULL; break; |
||
1307 | case NEON::BI__builtin_neon_vminnmq_f16: mask = 0x10000000000ULL; break; |
||
1308 | case NEON::BI__builtin_neon_vminnmq_v: mask = 0x60000000000ULL; break; |
||
1309 | case NEON::BI__builtin_neon_vminq_f16: mask = 0x10000000000ULL; break; |
||
1310 | case NEON::BI__builtin_neon_vminq_v: mask = 0x7060700000000ULL; break; |
||
1311 | case NEON::BI__builtin_neon_vmmlaq_s32: mask = 0x400000000ULL; break; |
||
1312 | case NEON::BI__builtin_neon_vmmlaq_u32: mask = 0x4000000000000ULL; break; |
||
1313 | case NEON::BI__builtin_neon_vmovl_v: mask = 0xe000e00000000ULL; break; |
||
1314 | case NEON::BI__builtin_neon_vmovn_v: mask = 0x70007ULL; break; |
||
1315 | case NEON::BI__builtin_neon_vmul_lane_v: mask = 0x400ULL; break; |
||
1316 | case NEON::BI__builtin_neon_vmul_laneq_v: mask = 0x400ULL; break; |
||
1317 | case NEON::BI__builtin_neon_vmul_v: mask = 0x10ULL; break; |
||
1318 | case NEON::BI__builtin_neon_vmull_v: mask = 0xe002e00000000ULL; break; |
||
1319 | case NEON::BI__builtin_neon_vmulq_v: mask = 0x1000000000ULL; break; |
||
1320 | case NEON::BI__builtin_neon_vmulx_f16: mask = 0x100ULL; break; |
||
1321 | case NEON::BI__builtin_neon_vmulx_v: mask = 0x600ULL; break; |
||
1322 | case NEON::BI__builtin_neon_vmulxq_f16: mask = 0x10000000000ULL; break; |
||
1323 | case NEON::BI__builtin_neon_vmulxq_v: mask = 0x60000000000ULL; break; |
||
1324 | case NEON::BI__builtin_neon_vpadal_v: mask = 0xe000eULL; break; |
||
1325 | case NEON::BI__builtin_neon_vpadalq_v: mask = 0xe000e00000000ULL; break; |
||
1326 | case NEON::BI__builtin_neon_vpadd_f16: mask = 0x100ULL; break; |
||
1327 | case NEON::BI__builtin_neon_vpadd_v: mask = 0x70207ULL; break; |
||
1328 | case NEON::BI__builtin_neon_vpaddl_v: mask = 0xe000eULL; break; |
||
1329 | case NEON::BI__builtin_neon_vpaddlq_v: mask = 0xe000e00000000ULL; break; |
||
1330 | case NEON::BI__builtin_neon_vpaddq_f16: mask = 0x10000000000ULL; break; |
||
1331 | case NEON::BI__builtin_neon_vpaddq_v: mask = 0xf060f00000000ULL; break; |
||
1332 | case NEON::BI__builtin_neon_vpmax_f16: mask = 0x100ULL; break; |
||
1333 | case NEON::BI__builtin_neon_vpmax_v: mask = 0x70207ULL; break; |
||
1334 | case NEON::BI__builtin_neon_vpmaxnm_f16: mask = 0x100ULL; break; |
||
1335 | case NEON::BI__builtin_neon_vpmaxnm_v: mask = 0x200ULL; break; |
||
1336 | case NEON::BI__builtin_neon_vpmaxnmq_f16: mask = 0x10000000000ULL; break; |
||
1337 | case NEON::BI__builtin_neon_vpmaxnmq_v: mask = 0x60000000000ULL; break; |
||
1338 | case NEON::BI__builtin_neon_vpmaxq_f16: mask = 0x10000000000ULL; break; |
||
1339 | case NEON::BI__builtin_neon_vpmaxq_v: mask = 0x7060700000000ULL; break; |
||
1340 | case NEON::BI__builtin_neon_vpmin_f16: mask = 0x100ULL; break; |
||
1341 | case NEON::BI__builtin_neon_vpmin_v: mask = 0x70207ULL; break; |
||
1342 | case NEON::BI__builtin_neon_vpminnm_f16: mask = 0x100ULL; break; |
||
1343 | case NEON::BI__builtin_neon_vpminnm_v: mask = 0x200ULL; break; |
||
1344 | case NEON::BI__builtin_neon_vpminnmq_f16: mask = 0x10000000000ULL; break; |
||
1345 | case NEON::BI__builtin_neon_vpminnmq_v: mask = 0x60000000000ULL; break; |
||
1346 | case NEON::BI__builtin_neon_vpminq_f16: mask = 0x10000000000ULL; break; |
||
1347 | case NEON::BI__builtin_neon_vpminq_v: mask = 0x7060700000000ULL; break; |
||
1348 | case NEON::BI__builtin_neon_vqabs_v: mask = 0xfULL; break; |
||
1349 | case NEON::BI__builtin_neon_vqabsq_v: mask = 0xf00000000ULL; break; |
||
1350 | case NEON::BI__builtin_neon_vqadd_v: mask = 0xf000fULL; break; |
||
1351 | case NEON::BI__builtin_neon_vqaddq_v: mask = 0xf000f00000000ULL; break; |
||
1352 | case NEON::BI__builtin_neon_vqdmlal_v: mask = 0xc00000000ULL; break; |
||
1353 | case NEON::BI__builtin_neon_vqdmlsl_v: mask = 0xc00000000ULL; break; |
||
1354 | case NEON::BI__builtin_neon_vqdmulh_lane_v: mask = 0x6ULL; break; |
||
1355 | case NEON::BI__builtin_neon_vqdmulh_laneq_v: mask = 0x6ULL; break; |
||
1356 | case NEON::BI__builtin_neon_vqdmulh_v: mask = 0x6ULL; break; |
||
1357 | case NEON::BI__builtin_neon_vqdmulhq_lane_v: mask = 0x6ULL; break; |
||
1358 | case NEON::BI__builtin_neon_vqdmulhq_laneq_v: mask = 0x600000000ULL; break; |
||
1359 | case NEON::BI__builtin_neon_vqdmulhq_v: mask = 0x600000000ULL; break; |
||
1360 | case NEON::BI__builtin_neon_vqdmull_v: mask = 0xc00000000ULL; break; |
||
1361 | case NEON::BI__builtin_neon_vqmovn_v: mask = 0x70007ULL; break; |
||
1362 | case NEON::BI__builtin_neon_vqmovun_v: mask = 0x70000ULL; break; |
||
1363 | case NEON::BI__builtin_neon_vqneg_v: mask = 0xfULL; break; |
||
1364 | case NEON::BI__builtin_neon_vqnegq_v: mask = 0xf00000000ULL; break; |
||
1365 | case NEON::BI__builtin_neon_vqrdmlah_s16: mask = 0x2ULL; break; |
||
1366 | case NEON::BI__builtin_neon_vqrdmlah_s32: mask = 0x4ULL; break; |
||
1367 | case NEON::BI__builtin_neon_vqrdmlahq_s16: mask = 0x200000000ULL; break; |
||
1368 | case NEON::BI__builtin_neon_vqrdmlahq_s32: mask = 0x400000000ULL; break; |
||
1369 | case NEON::BI__builtin_neon_vqrdmlsh_s16: mask = 0x2ULL; break; |
||
1370 | case NEON::BI__builtin_neon_vqrdmlsh_s32: mask = 0x4ULL; break; |
||
1371 | case NEON::BI__builtin_neon_vqrdmlshq_s16: mask = 0x200000000ULL; break; |
||
1372 | case NEON::BI__builtin_neon_vqrdmlshq_s32: mask = 0x400000000ULL; break; |
||
1373 | case NEON::BI__builtin_neon_vqrdmulh_lane_v: mask = 0x6ULL; break; |
||
1374 | case NEON::BI__builtin_neon_vqrdmulh_laneq_v: mask = 0x6ULL; break; |
||
1375 | case NEON::BI__builtin_neon_vqrdmulh_v: mask = 0x6ULL; break; |
||
1376 | case NEON::BI__builtin_neon_vqrdmulhq_lane_v: mask = 0x6ULL; break; |
||
1377 | case NEON::BI__builtin_neon_vqrdmulhq_laneq_v: mask = 0x600000000ULL; break; |
||
1378 | case NEON::BI__builtin_neon_vqrdmulhq_v: mask = 0x600000000ULL; break; |
||
1379 | case NEON::BI__builtin_neon_vqrshl_v: mask = 0xf000fULL; break; |
||
1380 | case NEON::BI__builtin_neon_vqrshlq_v: mask = 0xf000f00000000ULL; break; |
||
1381 | case NEON::BI__builtin_neon_vqrshrn_n_v: mask = 0x70007ULL; break; |
||
1382 | case NEON::BI__builtin_neon_vqrshrun_n_v: mask = 0x70000ULL; break; |
||
1383 | case NEON::BI__builtin_neon_vqshl_n_v: mask = 0xf000fULL; break; |
||
1384 | case NEON::BI__builtin_neon_vqshl_v: mask = 0xf000fULL; break; |
||
1385 | case NEON::BI__builtin_neon_vqshlq_n_v: mask = 0xf000f00000000ULL; break; |
||
1386 | case NEON::BI__builtin_neon_vqshlq_v: mask = 0xf000f00000000ULL; break; |
||
1387 | case NEON::BI__builtin_neon_vqshlu_n_v: mask = 0xf0000ULL; break; |
||
1388 | case NEON::BI__builtin_neon_vqshluq_n_v: mask = 0xf000000000000ULL; break; |
||
1389 | case NEON::BI__builtin_neon_vqshrn_n_v: mask = 0x70007ULL; break; |
||
1390 | case NEON::BI__builtin_neon_vqshrun_n_v: mask = 0x70000ULL; break; |
||
1391 | case NEON::BI__builtin_neon_vqsub_v: mask = 0xf000fULL; break; |
||
1392 | case NEON::BI__builtin_neon_vqsubq_v: mask = 0xf000f00000000ULL; break; |
||
1393 | case NEON::BI__builtin_neon_vqtbl1_v: mask = 0x10011ULL; break; |
||
1394 | case NEON::BI__builtin_neon_vqtbl1q_v: mask = 0x1001100000000ULL; break; |
||
1395 | case NEON::BI__builtin_neon_vqtbl2_v: mask = 0x10011ULL; break; |
||
1396 | case NEON::BI__builtin_neon_vqtbl2q_v: mask = 0x1001100000000ULL; break; |
||
1397 | case NEON::BI__builtin_neon_vqtbl3_v: mask = 0x10011ULL; break; |
||
1398 | case NEON::BI__builtin_neon_vqtbl3q_v: mask = 0x1001100000000ULL; break; |
||
1399 | case NEON::BI__builtin_neon_vqtbl4_v: mask = 0x10011ULL; break; |
||
1400 | case NEON::BI__builtin_neon_vqtbl4q_v: mask = 0x1001100000000ULL; break; |
||
1401 | case NEON::BI__builtin_neon_vqtbx1_v: mask = 0x10011ULL; break; |
||
1402 | case NEON::BI__builtin_neon_vqtbx1q_v: mask = 0x1001100000000ULL; break; |
||
1403 | case NEON::BI__builtin_neon_vqtbx2_v: mask = 0x10011ULL; break; |
||
1404 | case NEON::BI__builtin_neon_vqtbx2q_v: mask = 0x1001100000000ULL; break; |
||
1405 | case NEON::BI__builtin_neon_vqtbx3_v: mask = 0x10011ULL; break; |
||
1406 | case NEON::BI__builtin_neon_vqtbx3q_v: mask = 0x1001100000000ULL; break; |
||
1407 | case NEON::BI__builtin_neon_vqtbx4_v: mask = 0x10011ULL; break; |
||
1408 | case NEON::BI__builtin_neon_vqtbx4q_v: mask = 0x1001100000000ULL; break; |
||
1409 | case NEON::BI__builtin_neon_vraddhn_v: mask = 0x70007ULL; break; |
||
1410 | case NEON::BI__builtin_neon_vrax1q_u64: mask = 0x8000000000000ULL; break; |
||
1411 | case NEON::BI__builtin_neon_vrbit_v: mask = 0x10011ULL; break; |
||
1412 | case NEON::BI__builtin_neon_vrbitq_v: mask = 0x1001100000000ULL; break; |
||
1413 | case NEON::BI__builtin_neon_vrecpe_f16: mask = 0x100ULL; break; |
||
1414 | case NEON::BI__builtin_neon_vrecpe_v: mask = 0x40600ULL; break; |
||
1415 | case NEON::BI__builtin_neon_vrecpeq_f16: mask = 0x10000000000ULL; break; |
||
1416 | case NEON::BI__builtin_neon_vrecpeq_v: mask = 0x4060000000000ULL; break; |
||
1417 | case NEON::BI__builtin_neon_vrecps_f16: mask = 0x100ULL; break; |
||
1418 | case NEON::BI__builtin_neon_vrecps_v: mask = 0x600ULL; break; |
||
1419 | case NEON::BI__builtin_neon_vrecpsq_f16: mask = 0x10000000000ULL; break; |
||
1420 | case NEON::BI__builtin_neon_vrecpsq_v: mask = 0x60000000000ULL; break; |
||
1421 | case NEON::BI__builtin_neon_vrhadd_v: mask = 0x70007ULL; break; |
||
1422 | case NEON::BI__builtin_neon_vrhaddq_v: mask = 0x7000700000000ULL; break; |
||
1423 | case NEON::BI__builtin_neon_vrnd32x_f32: mask = 0x200ULL; break; |
||
1424 | case NEON::BI__builtin_neon_vrnd32xq_f32: mask = 0x20000000000ULL; break; |
||
1425 | case NEON::BI__builtin_neon_vrnd32z_f32: mask = 0x200ULL; break; |
||
1426 | case NEON::BI__builtin_neon_vrnd32zq_f32: mask = 0x20000000000ULL; break; |
||
1427 | case NEON::BI__builtin_neon_vrnd64x_f32: mask = 0x200ULL; break; |
||
1428 | case NEON::BI__builtin_neon_vrnd64xq_f32: mask = 0x20000000000ULL; break; |
||
1429 | case NEON::BI__builtin_neon_vrnd64z_f32: mask = 0x200ULL; break; |
||
1430 | case NEON::BI__builtin_neon_vrnd64zq_f32: mask = 0x20000000000ULL; break; |
||
1431 | case NEON::BI__builtin_neon_vrnd_f16: mask = 0x100ULL; break; |
||
1432 | case NEON::BI__builtin_neon_vrnd_v: mask = 0x600ULL; break; |
||
1433 | case NEON::BI__builtin_neon_vrnda_f16: mask = 0x100ULL; break; |
||
1434 | case NEON::BI__builtin_neon_vrnda_v: mask = 0x600ULL; break; |
||
1435 | case NEON::BI__builtin_neon_vrndaq_f16: mask = 0x10000000000ULL; break; |
||
1436 | case NEON::BI__builtin_neon_vrndaq_v: mask = 0x60000000000ULL; break; |
||
1437 | case NEON::BI__builtin_neon_vrndi_f16: mask = 0x100ULL; break; |
||
1438 | case NEON::BI__builtin_neon_vrndi_v: mask = 0x600ULL; break; |
||
1439 | case NEON::BI__builtin_neon_vrndiq_f16: mask = 0x10000000000ULL; break; |
||
1440 | case NEON::BI__builtin_neon_vrndiq_v: mask = 0x60000000000ULL; break; |
||
1441 | case NEON::BI__builtin_neon_vrndm_f16: mask = 0x100ULL; break; |
||
1442 | case NEON::BI__builtin_neon_vrndm_v: mask = 0x600ULL; break; |
||
1443 | case NEON::BI__builtin_neon_vrndmq_f16: mask = 0x10000000000ULL; break; |
||
1444 | case NEON::BI__builtin_neon_vrndmq_v: mask = 0x60000000000ULL; break; |
||
1445 | case NEON::BI__builtin_neon_vrndn_f16: mask = 0x100ULL; break; |
||
1446 | case NEON::BI__builtin_neon_vrndn_v: mask = 0x600ULL; break; |
||
1447 | case NEON::BI__builtin_neon_vrndnq_f16: mask = 0x10000000000ULL; break; |
||
1448 | case NEON::BI__builtin_neon_vrndnq_v: mask = 0x60000000000ULL; break; |
||
1449 | case NEON::BI__builtin_neon_vrndp_f16: mask = 0x100ULL; break; |
||
1450 | case NEON::BI__builtin_neon_vrndp_v: mask = 0x600ULL; break; |
||
1451 | case NEON::BI__builtin_neon_vrndpq_f16: mask = 0x10000000000ULL; break; |
||
1452 | case NEON::BI__builtin_neon_vrndpq_v: mask = 0x60000000000ULL; break; |
||
1453 | case NEON::BI__builtin_neon_vrndq_f16: mask = 0x10000000000ULL; break; |
||
1454 | case NEON::BI__builtin_neon_vrndq_v: mask = 0x60000000000ULL; break; |
||
1455 | case NEON::BI__builtin_neon_vrndx_f16: mask = 0x100ULL; break; |
||
1456 | case NEON::BI__builtin_neon_vrndx_v: mask = 0x600ULL; break; |
||
1457 | case NEON::BI__builtin_neon_vrndxq_f16: mask = 0x10000000000ULL; break; |
||
1458 | case NEON::BI__builtin_neon_vrndxq_v: mask = 0x60000000000ULL; break; |
||
1459 | case NEON::BI__builtin_neon_vrshl_v: mask = 0xf000fULL; break; |
||
1460 | case NEON::BI__builtin_neon_vrshlq_v: mask = 0xf000f00000000ULL; break; |
||
1461 | case NEON::BI__builtin_neon_vrshr_n_v: mask = 0xf000fULL; break; |
||
1462 | case NEON::BI__builtin_neon_vrshrn_n_v: mask = 0x70007ULL; break; |
||
1463 | case NEON::BI__builtin_neon_vrshrq_n_v: mask = 0xf000f00000000ULL; break; |
||
1464 | case NEON::BI__builtin_neon_vrsqrte_f16: mask = 0x100ULL; break; |
||
1465 | case NEON::BI__builtin_neon_vrsqrte_v: mask = 0x40600ULL; break; |
||
1466 | case NEON::BI__builtin_neon_vrsqrteq_f16: mask = 0x10000000000ULL; break; |
||
1467 | case NEON::BI__builtin_neon_vrsqrteq_v: mask = 0x4060000000000ULL; break; |
||
1468 | case NEON::BI__builtin_neon_vrsqrts_f16: mask = 0x100ULL; break; |
||
1469 | case NEON::BI__builtin_neon_vrsqrts_v: mask = 0x600ULL; break; |
||
1470 | case NEON::BI__builtin_neon_vrsqrtsq_f16: mask = 0x10000000000ULL; break; |
||
1471 | case NEON::BI__builtin_neon_vrsqrtsq_v: mask = 0x60000000000ULL; break; |
||
1472 | case NEON::BI__builtin_neon_vrsra_n_v: mask = 0xf000fULL; break; |
||
1473 | case NEON::BI__builtin_neon_vrsraq_n_v: mask = 0xf000f00000000ULL; break; |
||
1474 | case NEON::BI__builtin_neon_vrsubhn_v: mask = 0x70007ULL; break; |
||
1475 | case NEON::BI__builtin_neon_vsha1su0q_u32: mask = 0x4000000000000ULL; break; |
||
1476 | case NEON::BI__builtin_neon_vsha1su1q_u32: mask = 0x4000000000000ULL; break; |
||
1477 | case NEON::BI__builtin_neon_vsha256h2q_u32: mask = 0x4000000000000ULL; break; |
||
1478 | case NEON::BI__builtin_neon_vsha256hq_u32: mask = 0x4000000000000ULL; break; |
||
1479 | case NEON::BI__builtin_neon_vsha256su0q_u32: mask = 0x4000000000000ULL; break; |
||
1480 | case NEON::BI__builtin_neon_vsha256su1q_u32: mask = 0x4000000000000ULL; break; |
||
1481 | case NEON::BI__builtin_neon_vsha512h2q_u64: mask = 0x8000000000000ULL; break; |
||
1482 | case NEON::BI__builtin_neon_vsha512hq_u64: mask = 0x8000000000000ULL; break; |
||
1483 | case NEON::BI__builtin_neon_vsha512su0q_u64: mask = 0x8000000000000ULL; break; |
||
1484 | case NEON::BI__builtin_neon_vsha512su1q_u64: mask = 0x8000000000000ULL; break; |
||
1485 | case NEON::BI__builtin_neon_vshl_n_v: mask = 0xf000fULL; break; |
||
1486 | case NEON::BI__builtin_neon_vshl_v: mask = 0xf000fULL; break; |
||
1487 | case NEON::BI__builtin_neon_vshll_n_v: mask = 0xe000e00000000ULL; break; |
||
1488 | case NEON::BI__builtin_neon_vshlq_n_v: mask = 0xf000f00000000ULL; break; |
||
1489 | case NEON::BI__builtin_neon_vshlq_v: mask = 0xf000f00000000ULL; break; |
||
1490 | case NEON::BI__builtin_neon_vshr_n_v: mask = 0xf000fULL; break; |
||
1491 | case NEON::BI__builtin_neon_vshrn_n_v: mask = 0x70007ULL; break; |
||
1492 | case NEON::BI__builtin_neon_vshrq_n_v: mask = 0xf000f00000000ULL; break; |
||
1493 | case NEON::BI__builtin_neon_vsli_n_v: mask = 0xf007fULL; break; |
||
1494 | case NEON::BI__builtin_neon_vsliq_n_v: mask = 0xf007f00000000ULL; break; |
||
1495 | case NEON::BI__builtin_neon_vsm3partw1q_u32: mask = 0x4000000000000ULL; break; |
||
1496 | case NEON::BI__builtin_neon_vsm3partw2q_u32: mask = 0x4000000000000ULL; break; |
||
1497 | case NEON::BI__builtin_neon_vsm3ss1q_u32: mask = 0x4000000000000ULL; break; |
||
1498 | case NEON::BI__builtin_neon_vsm3tt1aq_u32: mask = 0x4000000000000ULL; break; |
||
1499 | case NEON::BI__builtin_neon_vsm3tt1bq_u32: mask = 0x4000000000000ULL; break; |
||
1500 | case NEON::BI__builtin_neon_vsm3tt2aq_u32: mask = 0x4000000000000ULL; break; |
||
1501 | case NEON::BI__builtin_neon_vsm3tt2bq_u32: mask = 0x4000000000000ULL; break; |
||
1502 | case NEON::BI__builtin_neon_vsm4ekeyq_u32: mask = 0x4000000000000ULL; break; |
||
1503 | case NEON::BI__builtin_neon_vsm4eq_u32: mask = 0x4000000000000ULL; break; |
||
1504 | case NEON::BI__builtin_neon_vsqadd_v: mask = 0xf0000ULL; break; |
||
1505 | case NEON::BI__builtin_neon_vsqaddq_v: mask = 0xf000000000000ULL; break; |
||
1506 | case NEON::BI__builtin_neon_vsqrt_f16: mask = 0x100ULL; break; |
||
1507 | case NEON::BI__builtin_neon_vsqrt_v: mask = 0x600ULL; break; |
||
1508 | case NEON::BI__builtin_neon_vsqrtq_f16: mask = 0x10000000000ULL; break; |
||
1509 | case NEON::BI__builtin_neon_vsqrtq_v: mask = 0x60000000000ULL; break; |
||
1510 | case NEON::BI__builtin_neon_vsra_n_v: mask = 0xf000fULL; break; |
||
1511 | case NEON::BI__builtin_neon_vsraq_n_v: mask = 0xf000f00000000ULL; break; |
||
1512 | case NEON::BI__builtin_neon_vsri_n_v: mask = 0xf007fULL; break; |
||
1513 | case NEON::BI__builtin_neon_vsriq_n_v: mask = 0xf007f00000000ULL; break; |
||
1514 | case NEON::BI__builtin_neon_vst1_bf16: mask = 0x800ULL; PtrArgNum = 0; break; |
||
1515 | case NEON::BI__builtin_neon_vst1_bf16_x2: mask = 0x800ULL; PtrArgNum = 0; break; |
||
1516 | case NEON::BI__builtin_neon_vst1_bf16_x3: mask = 0x800ULL; PtrArgNum = 0; break; |
||
1517 | case NEON::BI__builtin_neon_vst1_bf16_x4: mask = 0x800ULL; PtrArgNum = 0; break; |
||
1518 | case NEON::BI__builtin_neon_vst1_lane_bf16: mask = 0x800ULL; break; |
||
1519 | case NEON::BI__builtin_neon_vst1_lane_v: mask = 0xf077fULL; break; |
||
1520 | case NEON::BI__builtin_neon_vst1_v: mask = 0xf077fULL; PtrArgNum = 0; break; |
||
1521 | case NEON::BI__builtin_neon_vst1_x2_v: mask = 0xf077fULL; PtrArgNum = 0; break; |
||
1522 | case NEON::BI__builtin_neon_vst1_x3_v: mask = 0xf077fULL; PtrArgNum = 0; break; |
||
1523 | case NEON::BI__builtin_neon_vst1_x4_v: mask = 0xf077fULL; PtrArgNum = 0; break; |
||
1524 | case NEON::BI__builtin_neon_vst1q_bf16: mask = 0x80000000000ULL; PtrArgNum = 0; break; |
||
1525 | case NEON::BI__builtin_neon_vst1q_bf16_x2: mask = 0x80000000000ULL; PtrArgNum = 0; break; |
||
1526 | case NEON::BI__builtin_neon_vst1q_bf16_x3: mask = 0x80000000000ULL; PtrArgNum = 0; break; |
||
1527 | case NEON::BI__builtin_neon_vst1q_bf16_x4: mask = 0x80000000000ULL; PtrArgNum = 0; break; |
||
1528 | case NEON::BI__builtin_neon_vst1q_lane_bf16: mask = 0x80000000000ULL; break; |
||
1529 | case NEON::BI__builtin_neon_vst1q_lane_v: mask = 0xf077f00000000ULL; break; |
||
1530 | case NEON::BI__builtin_neon_vst1q_v: mask = 0xf077f00000000ULL; PtrArgNum = 0; break; |
||
1531 | case NEON::BI__builtin_neon_vst1q_x2_v: mask = 0xf077f00000000ULL; PtrArgNum = 0; break; |
||
1532 | case NEON::BI__builtin_neon_vst1q_x3_v: mask = 0xf077f00000000ULL; PtrArgNum = 0; break; |
||
1533 | case NEON::BI__builtin_neon_vst1q_x4_v: mask = 0xf077f00000000ULL; PtrArgNum = 0; break; |
||
1534 | case NEON::BI__builtin_neon_vst2_bf16: mask = 0x800ULL; PtrArgNum = 0; break; |
||
1535 | case NEON::BI__builtin_neon_vst2_lane_bf16: mask = 0x800ULL; PtrArgNum = 0; break; |
||
1536 | case NEON::BI__builtin_neon_vst2_lane_v: mask = 0xf077fULL; PtrArgNum = 0; break; |
||
1537 | case NEON::BI__builtin_neon_vst2_v: mask = 0xf077fULL; PtrArgNum = 0; break; |
||
1538 | case NEON::BI__builtin_neon_vst2q_bf16: mask = 0x80000000000ULL; PtrArgNum = 0; break; |
||
1539 | case NEON::BI__builtin_neon_vst2q_lane_bf16: mask = 0x80000000000ULL; PtrArgNum = 0; break; |
||
1540 | case NEON::BI__builtin_neon_vst2q_lane_v: mask = 0xf077f00000000ULL; PtrArgNum = 0; break; |
||
1541 | case NEON::BI__builtin_neon_vst2q_v: mask = 0xf077f00000000ULL; PtrArgNum = 0; break; |
||
1542 | case NEON::BI__builtin_neon_vst3_bf16: mask = 0x800ULL; PtrArgNum = 0; break; |
||
1543 | case NEON::BI__builtin_neon_vst3_lane_bf16: mask = 0x800ULL; PtrArgNum = 0; break; |
||
1544 | case NEON::BI__builtin_neon_vst3_lane_v: mask = 0xf077fULL; PtrArgNum = 0; break; |
||
1545 | case NEON::BI__builtin_neon_vst3_v: mask = 0xf077fULL; PtrArgNum = 0; break; |
||
1546 | case NEON::BI__builtin_neon_vst3q_bf16: mask = 0x80000000000ULL; PtrArgNum = 0; break; |
||
1547 | case NEON::BI__builtin_neon_vst3q_lane_bf16: mask = 0x80000000000ULL; PtrArgNum = 0; break; |
||
1548 | case NEON::BI__builtin_neon_vst3q_lane_v: mask = 0xf077f00000000ULL; PtrArgNum = 0; break; |
||
1549 | case NEON::BI__builtin_neon_vst3q_v: mask = 0xf077f00000000ULL; PtrArgNum = 0; break; |
||
1550 | case NEON::BI__builtin_neon_vst4_bf16: mask = 0x800ULL; PtrArgNum = 0; break; |
||
1551 | case NEON::BI__builtin_neon_vst4_lane_bf16: mask = 0x800ULL; PtrArgNum = 0; break; |
||
1552 | case NEON::BI__builtin_neon_vst4_lane_v: mask = 0xf077fULL; PtrArgNum = 0; break; |
||
1553 | case NEON::BI__builtin_neon_vst4_v: mask = 0xf077fULL; PtrArgNum = 0; break; |
||
1554 | case NEON::BI__builtin_neon_vst4q_bf16: mask = 0x80000000000ULL; PtrArgNum = 0; break; |
||
1555 | case NEON::BI__builtin_neon_vst4q_lane_bf16: mask = 0x80000000000ULL; PtrArgNum = 0; break; |
||
1556 | case NEON::BI__builtin_neon_vst4q_lane_v: mask = 0xf077f00000000ULL; PtrArgNum = 0; break; |
||
1557 | case NEON::BI__builtin_neon_vst4q_v: mask = 0xf077f00000000ULL; PtrArgNum = 0; break; |
||
1558 | case NEON::BI__builtin_neon_vsubhn_v: mask = 0x70007ULL; break; |
||
1559 | case NEON::BI__builtin_neon_vtbl1_v: mask = 0x10011ULL; break; |
||
1560 | case NEON::BI__builtin_neon_vtbl2_v: mask = 0x10011ULL; break; |
||
1561 | case NEON::BI__builtin_neon_vtbl3_v: mask = 0x10011ULL; break; |
||
1562 | case NEON::BI__builtin_neon_vtbl4_v: mask = 0x10011ULL; break; |
||
1563 | case NEON::BI__builtin_neon_vtbx1_v: mask = 0x10011ULL; break; |
||
1564 | case NEON::BI__builtin_neon_vtbx2_v: mask = 0x10011ULL; break; |
||
1565 | case NEON::BI__builtin_neon_vtbx3_v: mask = 0x10011ULL; break; |
||
1566 | case NEON::BI__builtin_neon_vtbx4_v: mask = 0x10011ULL; break; |
||
1567 | case NEON::BI__builtin_neon_vtrn_f16: mask = 0x100ULL; break; |
||
1568 | case NEON::BI__builtin_neon_vtrn_v: mask = 0x70237ULL; break; |
||
1569 | case NEON::BI__builtin_neon_vtrnq_f16: mask = 0x10000000000ULL; break; |
||
1570 | case NEON::BI__builtin_neon_vtrnq_v: mask = 0x7023700000000ULL; break; |
||
1571 | case NEON::BI__builtin_neon_vtst_v: mask = 0xf0000ULL; break; |
||
1572 | case NEON::BI__builtin_neon_vtstq_v: mask = 0xf000000000000ULL; break; |
||
1573 | case NEON::BI__builtin_neon_vuqadd_v: mask = 0xfULL; break; |
||
1574 | case NEON::BI__builtin_neon_vuqaddq_v: mask = 0xf00000000ULL; break; |
||
1575 | case NEON::BI__builtin_neon_vusdot_s32: mask = 0x4ULL; break; |
||
1576 | case NEON::BI__builtin_neon_vusdotq_s32: mask = 0x400000000ULL; break; |
||
1577 | case NEON::BI__builtin_neon_vusmmlaq_s32: mask = 0x400000000ULL; break; |
||
1578 | case NEON::BI__builtin_neon_vuzp_f16: mask = 0x100ULL; break; |
||
1579 | case NEON::BI__builtin_neon_vuzp_v: mask = 0x70237ULL; break; |
||
1580 | case NEON::BI__builtin_neon_vuzpq_f16: mask = 0x10000000000ULL; break; |
||
1581 | case NEON::BI__builtin_neon_vuzpq_v: mask = 0x7023700000000ULL; break; |
||
1582 | case NEON::BI__builtin_neon_vxarq_u64: mask = 0x8000000000000ULL; break; |
||
1583 | case NEON::BI__builtin_neon_vzip_f16: mask = 0x100ULL; break; |
||
1584 | case NEON::BI__builtin_neon_vzip_v: mask = 0x70237ULL; break; |
||
1585 | case NEON::BI__builtin_neon_vzipq_f16: mask = 0x10000000000ULL; break; |
||
1586 | case NEON::BI__builtin_neon_vzipq_v: mask = 0x7023700000000ULL; break; |
||
1587 | #endif |
||
1588 | |||
1589 | #ifdef GET_NEON_IMMEDIATE_CHECK |
||
1590 | case NEON::BI__builtin_neon_vqdmulhq_lane_v: i = 2; u = RFT(TV, false, false); break; |
||
1591 | case NEON::BI__builtin_neon_vqdmulh_lane_v: i = 2; u = RFT(TV, false, false); break; |
||
1592 | case NEON::BI__builtin_neon_vqrdmulhq_lane_v: i = 2; u = RFT(TV, false, false); break; |
||
1593 | case NEON::BI__builtin_neon_vqrdmulh_lane_v: i = 2; u = RFT(TV, false, false); break; |
||
1594 | case NEON::BI__builtin_neon_vcvtq_n_f64_v: i = 1; l = 1; u = 63; break; |
||
1595 | case NEON::BI__builtin_neon_vcvt_n_f64_v: i = 1; l = 1; u = 63; break; |
||
1596 | case NEON::BI__builtin_neon_vcvtq_n_s64_v: i = 1; l = 1; u = 63; break; |
||
1597 | case NEON::BI__builtin_neon_vcvt_n_s64_v: i = 1; l = 1; u = 63; break; |
||
1598 | case NEON::BI__builtin_neon_vcvtq_n_u64_v: i = 1; l = 1; u = 63; break; |
||
1599 | case NEON::BI__builtin_neon_vcvt_n_u64_v: i = 1; l = 1; u = 63; break; |
||
1600 | case NEON::BI__builtin_neon_vget_lane_i64: i = 1; u = 0; break; |
||
1601 | case NEON::BI__builtin_neon_vgetq_lane_i64: i = 1; u = 1; break; |
||
1602 | case NEON::BI__builtin_neon_vgetq_lane_f64: i = 1; u = 1; break; |
||
1603 | case NEON::BI__builtin_neon_vget_lane_f64: i = 1; u = 0; break; |
||
1604 | case NEON::BI__builtin_neon_vld1_lane_v: i = 2; u = RFT(TV, false, false); break; |
||
1605 | case NEON::BI__builtin_neon_vld1q_lane_v: i = 2; u = RFT(TV, false, false); break; |
||
1606 | case NEON::BI__builtin_neon_vld2_lane_v: i = 4; u = RFT(TV, false, false); break; |
||
1607 | case NEON::BI__builtin_neon_vld2q_lane_v: i = 4; u = RFT(TV, false, false); break; |
||
1608 | case NEON::BI__builtin_neon_vld3_lane_v: i = 5; u = RFT(TV, false, false); break; |
||
1609 | case NEON::BI__builtin_neon_vld3q_lane_v: i = 5; u = RFT(TV, false, false); break; |
||
1610 | case NEON::BI__builtin_neon_vld4_lane_v: i = 6; u = RFT(TV, false, false); break; |
||
1611 | case NEON::BI__builtin_neon_vld4q_lane_v: i = 6; u = RFT(TV, false, false); break; |
||
1612 | case NEON::BI__builtin_neon_vcvts_n_s32_f32: i = 1; l = 1; u = 31; break; |
||
1613 | case NEON::BI__builtin_neon_vcvtd_n_s64_f64: i = 1; l = 1; u = 63; break; |
||
1614 | case NEON::BI__builtin_neon_vcvts_n_u32_f32: i = 1; l = 1; u = 31; break; |
||
1615 | case NEON::BI__builtin_neon_vcvtd_n_u64_f64: i = 1; l = 1; u = 63; break; |
||
1616 | case NEON::BI__builtin_neon_vfmad_lane_f64: i = 3; u = 0; break; |
||
1617 | case NEON::BI__builtin_neon_vfmas_lane_f32: i = 3; u = 1; break; |
||
1618 | case NEON::BI__builtin_neon_vfmah_lane_f16: i = 3; u = 3; break; |
||
1619 | case NEON::BI__builtin_neon_vfmad_laneq_f64: i = 3; u = 1; break; |
||
1620 | case NEON::BI__builtin_neon_vfmas_laneq_f32: i = 3; u = 3; break; |
||
1621 | case NEON::BI__builtin_neon_vfmah_laneq_f16: i = 3; u = 7; break; |
||
1622 | case NEON::BI__builtin_neon_vmulxh_lane_f16: i = 2; u = 3; break; |
||
1623 | case NEON::BI__builtin_neon_vmulxh_laneq_f16: i = 2; u = 7; break; |
||
1624 | case NEON::BI__builtin_neon_vcvts_n_f32_u32: i = 1; l = 1; u = 31; break; |
||
1625 | case NEON::BI__builtin_neon_vcvts_n_f32_s32: i = 1; l = 1; u = 31; break; |
||
1626 | case NEON::BI__builtin_neon_vcvtd_n_f64_u64: i = 1; l = 1; u = 63; break; |
||
1627 | case NEON::BI__builtin_neon_vcvtd_n_f64_s64: i = 1; l = 1; u = 63; break; |
||
1628 | case NEON::BI__builtin_neon_vshld_n_u64: i = 1; u = 63; break; |
||
1629 | case NEON::BI__builtin_neon_vshld_n_s64: i = 1; u = 63; break; |
||
1630 | case NEON::BI__builtin_neon_vslid_n_u64: i = 2; u = 63; break; |
||
1631 | case NEON::BI__builtin_neon_vslid_n_s64: i = 2; u = 63; break; |
||
1632 | case NEON::BI__builtin_neon_vqdmlals_lane_s32: i = 3; u = 1; break; |
||
1633 | case NEON::BI__builtin_neon_vqdmlalh_lane_s16: i = 3; u = 3; break; |
||
1634 | case NEON::BI__builtin_neon_vqdmlals_laneq_s32: i = 3; u = 3; break; |
||
1635 | case NEON::BI__builtin_neon_vqdmlalh_laneq_s16: i = 3; u = 7; break; |
||
1636 | case NEON::BI__builtin_neon_vqdmlsls_lane_s32: i = 3; u = 1; break; |
||
1637 | case NEON::BI__builtin_neon_vqdmlslh_lane_s16: i = 3; u = 3; break; |
||
1638 | case NEON::BI__builtin_neon_vqdmlsls_laneq_s32: i = 3; u = 3; break; |
||
1639 | case NEON::BI__builtin_neon_vqdmlslh_laneq_s16: i = 3; u = 7; break; |
||
1640 | case NEON::BI__builtin_neon_vqrshrns_n_u32: i = 1; l = 1; u = 15; break; |
||
1641 | case NEON::BI__builtin_neon_vqrshrnd_n_u64: i = 1; l = 1; u = 31; break; |
||
1642 | case NEON::BI__builtin_neon_vqrshrnh_n_u16: i = 1; l = 1; u = 7; break; |
||
1643 | case NEON::BI__builtin_neon_vqrshrns_n_s32: i = 1; l = 1; u = 15; break; |
||
1644 | case NEON::BI__builtin_neon_vqrshrnd_n_s64: i = 1; l = 1; u = 31; break; |
||
1645 | case NEON::BI__builtin_neon_vqrshrnh_n_s16: i = 1; l = 1; u = 7; break; |
||
1646 | case NEON::BI__builtin_neon_vqrshruns_n_s32: i = 1; l = 1; u = 15; break; |
||
1647 | case NEON::BI__builtin_neon_vqrshrund_n_s64: i = 1; l = 1; u = 31; break; |
||
1648 | case NEON::BI__builtin_neon_vqrshrunh_n_s16: i = 1; l = 1; u = 7; break; |
||
1649 | case NEON::BI__builtin_neon_vqshlub_n_s8: i = 1; u = 7; break; |
||
1650 | case NEON::BI__builtin_neon_vqshlus_n_s32: i = 1; u = 31; break; |
||
1651 | case NEON::BI__builtin_neon_vqshlud_n_s64: i = 1; u = 63; break; |
||
1652 | case NEON::BI__builtin_neon_vqshluh_n_s16: i = 1; u = 15; break; |
||
1653 | case NEON::BI__builtin_neon_vqshlb_n_u8: i = 1; u = 7; break; |
||
1654 | case NEON::BI__builtin_neon_vqshls_n_u32: i = 1; u = 31; break; |
||
1655 | case NEON::BI__builtin_neon_vqshld_n_u64: i = 1; u = 63; break; |
||
1656 | case NEON::BI__builtin_neon_vqshlh_n_u16: i = 1; u = 15; break; |
||
1657 | case NEON::BI__builtin_neon_vqshlb_n_s8: i = 1; u = 7; break; |
||
1658 | case NEON::BI__builtin_neon_vqshls_n_s32: i = 1; u = 31; break; |
||
1659 | case NEON::BI__builtin_neon_vqshld_n_s64: i = 1; u = 63; break; |
||
1660 | case NEON::BI__builtin_neon_vqshlh_n_s16: i = 1; u = 15; break; |
||
1661 | case NEON::BI__builtin_neon_vqshrns_n_u32: i = 1; l = 1; u = 15; break; |
||
1662 | case NEON::BI__builtin_neon_vqshrnd_n_u64: i = 1; l = 1; u = 31; break; |
||
1663 | case NEON::BI__builtin_neon_vqshrnh_n_u16: i = 1; l = 1; u = 7; break; |
||
1664 | case NEON::BI__builtin_neon_vqshrns_n_s32: i = 1; l = 1; u = 15; break; |
||
1665 | case NEON::BI__builtin_neon_vqshrnd_n_s64: i = 1; l = 1; u = 31; break; |
||
1666 | case NEON::BI__builtin_neon_vqshrnh_n_s16: i = 1; l = 1; u = 7; break; |
||
1667 | case NEON::BI__builtin_neon_vqshruns_n_s32: i = 1; l = 1; u = 15; break; |
||
1668 | case NEON::BI__builtin_neon_vqshrund_n_s64: i = 1; l = 1; u = 31; break; |
||
1669 | case NEON::BI__builtin_neon_vqshrunh_n_s16: i = 1; l = 1; u = 7; break; |
||
1670 | case NEON::BI__builtin_neon_vsrid_n_u64: i = 2; l = 1; u = 63; break; |
||
1671 | case NEON::BI__builtin_neon_vsrid_n_s64: i = 2; l = 1; u = 63; break; |
||
1672 | case NEON::BI__builtin_neon_vrshrd_n_u64: i = 1; l = 1; u = 63; break; |
||
1673 | case NEON::BI__builtin_neon_vrshrd_n_s64: i = 1; l = 1; u = 63; break; |
||
1674 | case NEON::BI__builtin_neon_vrsrad_n_u64: i = 2; l = 1; u = 63; break; |
||
1675 | case NEON::BI__builtin_neon_vrsrad_n_s64: i = 2; l = 1; u = 63; break; |
||
1676 | case NEON::BI__builtin_neon_vshrd_n_u64: i = 1; l = 1; u = 63; break; |
||
1677 | case NEON::BI__builtin_neon_vshrd_n_s64: i = 1; l = 1; u = 63; break; |
||
1678 | case NEON::BI__builtin_neon_vsrad_n_u64: i = 2; l = 1; u = 63; break; |
||
1679 | case NEON::BI__builtin_neon_vsrad_n_s64: i = 2; l = 1; u = 63; break; |
||
1680 | case NEON::BI__builtin_neon_vdupb_lane_i8: i = 1; u = 7; break; |
||
1681 | case NEON::BI__builtin_neon_vduph_lane_i16: i = 1; u = 3; break; |
||
1682 | case NEON::BI__builtin_neon_vdups_lane_i32: i = 1; u = 1; break; |
||
1683 | case NEON::BI__builtin_neon_vdupd_lane_i64: i = 1; u = 0; break; |
||
1684 | case NEON::BI__builtin_neon_vdupd_lane_f64: i = 1; u = 0; break; |
||
1685 | case NEON::BI__builtin_neon_vdups_lane_f32: i = 1; u = 1; break; |
||
1686 | case NEON::BI__builtin_neon_vduph_lane_f16: i = 1; u = 3; break; |
||
1687 | case NEON::BI__builtin_neon_vdupb_laneq_i8: i = 1; u = 15; break; |
||
1688 | case NEON::BI__builtin_neon_vduph_laneq_i16: i = 1; u = 7; break; |
||
1689 | case NEON::BI__builtin_neon_vdups_laneq_i32: i = 1; u = 3; break; |
||
1690 | case NEON::BI__builtin_neon_vdupd_laneq_i64: i = 1; u = 1; break; |
||
1691 | case NEON::BI__builtin_neon_vdupd_laneq_f64: i = 1; u = 1; break; |
||
1692 | case NEON::BI__builtin_neon_vdups_laneq_f32: i = 1; u = 3; break; |
||
1693 | case NEON::BI__builtin_neon_vduph_laneq_f16: i = 1; u = 7; break; |
||
1694 | case NEON::BI__builtin_neon_vduph_laneq_bf16: i = 1; u = 7; break; |
||
1695 | case NEON::BI__builtin_neon_vduph_lane_bf16: i = 1; u = 3; break; |
||
1696 | case NEON::BI__builtin_neon_vmul_lane_v: i = 2; u = RFT(TV, false, false); break; |
||
1697 | case NEON::BI__builtin_neon_vmul_laneq_v: i = 2; u = RFT(TV, false, true); break; |
||
1698 | case NEON::BI__builtin_neon_vset_lane_i64: i = 2; u = 0; break; |
||
1699 | case NEON::BI__builtin_neon_vsetq_lane_i64: i = 2; u = 1; break; |
||
1700 | case NEON::BI__builtin_neon_vsetq_lane_f64: i = 2; u = 1; break; |
||
1701 | case NEON::BI__builtin_neon_vset_lane_f64: i = 2; u = 0; break; |
||
1702 | case NEON::BI__builtin_neon_vsli_n_v: i = 2; u = RFT(TV, true); break; |
||
1703 | case NEON::BI__builtin_neon_vsliq_n_v: i = 2; u = RFT(TV, true); break; |
||
1704 | case NEON::BI__builtin_neon_vsm3tt1aq_u32: i = 3; u = RFT(TV, false, false); break; |
||
1705 | case NEON::BI__builtin_neon_vsm3tt1bq_u32: i = 3; u = RFT(TV, false, false); break; |
||
1706 | case NEON::BI__builtin_neon_vsm3tt2aq_u32: i = 3; u = RFT(TV, false, false); break; |
||
1707 | case NEON::BI__builtin_neon_vsm3tt2bq_u32: i = 3; u = RFT(TV, false, false); break; |
||
1708 | case NEON::BI__builtin_neon_splat_lane_v: i = 1; u = RFT(TV, false, false); break; |
||
1709 | case NEON::BI__builtin_neon_splatq_lane_v: i = 1; u = RFT(TV, false, false); break; |
||
1710 | case NEON::BI__builtin_neon_splat_laneq_v: i = 1; u = RFT(TV, false, true); break; |
||
1711 | case NEON::BI__builtin_neon_splatq_laneq_v: i = 1; u = RFT(TV, false, true); break; |
||
1712 | case NEON::BI__builtin_neon_splatq_laneq_bf16: i = 1; u = RFT(TV, false, true); break; |
||
1713 | case NEON::BI__builtin_neon_splat_laneq_bf16: i = 1; u = RFT(TV, false, true); break; |
||
1714 | case NEON::BI__builtin_neon_splatq_lane_bf16: i = 1; u = RFT(TV, false, false); break; |
||
1715 | case NEON::BI__builtin_neon_splat_lane_bf16: i = 1; u = RFT(TV, false, false); break; |
||
1716 | case NEON::BI__builtin_neon_vsri_n_v: i = 2; l = 1; u = RFT(TV, true); break; |
||
1717 | case NEON::BI__builtin_neon_vsriq_n_v: i = 2; l = 1; u = RFT(TV, true); break; |
||
1718 | case NEON::BI__builtin_neon_vst1_lane_v: i = 2; u = RFT(TV, false, false); break; |
||
1719 | case NEON::BI__builtin_neon_vst1q_lane_v: i = 2; u = RFT(TV, false, false); break; |
||
1720 | case NEON::BI__builtin_neon_vst2_lane_v: i = 3; u = RFT(TV, false, false); break; |
||
1721 | case NEON::BI__builtin_neon_vst2q_lane_v: i = 3; u = RFT(TV, false, false); break; |
||
1722 | case NEON::BI__builtin_neon_vst3_lane_v: i = 4; u = RFT(TV, false, false); break; |
||
1723 | case NEON::BI__builtin_neon_vst3q_lane_v: i = 4; u = RFT(TV, false, false); break; |
||
1724 | case NEON::BI__builtin_neon_vst4_lane_v: i = 5; u = RFT(TV, false, false); break; |
||
1725 | case NEON::BI__builtin_neon_vst4q_lane_v: i = 5; u = RFT(TV, false, false); break; |
||
1726 | case NEON::BI__builtin_neon_vcvtq_n_f16_u16: i = 1; l = 1; u = 15; break; |
||
1727 | case NEON::BI__builtin_neon_vcvtq_n_f16_s16: i = 1; l = 1; u = 15; break; |
||
1728 | case NEON::BI__builtin_neon_vcvt_n_f16_u16: i = 1; l = 1; u = 15; break; |
||
1729 | case NEON::BI__builtin_neon_vcvt_n_f16_s16: i = 1; l = 1; u = 15; break; |
||
1730 | case NEON::BI__builtin_neon_vcvtq_n_f32_v: i = 1; l = 1; u = 31; break; |
||
1731 | case NEON::BI__builtin_neon_vcvt_n_f32_v: i = 1; l = 1; u = 31; break; |
||
1732 | case NEON::BI__builtin_neon_vcvtq_n_s16_f16: i = 1; l = 1; u = 15; break; |
||
1733 | case NEON::BI__builtin_neon_vcvt_n_s16_f16: i = 1; l = 1; u = 15; break; |
||
1734 | case NEON::BI__builtin_neon_vcvtq_n_s32_v: i = 1; l = 1; u = 31; break; |
||
1735 | case NEON::BI__builtin_neon_vcvt_n_s32_v: i = 1; l = 1; u = 31; break; |
||
1736 | case NEON::BI__builtin_neon_vcvtq_n_u16_f16: i = 1; l = 1; u = 15; break; |
||
1737 | case NEON::BI__builtin_neon_vcvt_n_u16_f16: i = 1; l = 1; u = 15; break; |
||
1738 | case NEON::BI__builtin_neon_vcvtq_n_u32_v: i = 1; l = 1; u = 31; break; |
||
1739 | case NEON::BI__builtin_neon_vcvt_n_u32_v: i = 1; l = 1; u = 31; break; |
||
1740 | case NEON::BI__builtin_neon_vext_v: i = 2; u = RFT(TV, false, false); break; |
||
1741 | case NEON::BI__builtin_neon_vextq_v: i = 2; u = RFT(TV, false, false); break; |
||
1742 | case NEON::BI__builtin_neon_vextq_f16: i = 2; u = RFT(TV, false, false); break; |
||
1743 | case NEON::BI__builtin_neon_vext_f16: i = 2; u = RFT(TV, false, false); break; |
||
1744 | case NEON::BI__builtin_neon_vfmaq_lane_v: i = 3; u = RFT(TV, false, false); break; |
||
1745 | case NEON::BI__builtin_neon_vfma_lane_v: i = 3; u = RFT(TV, false, false); break; |
||
1746 | case NEON::BI__builtin_neon_vfmaq_lane_f16: i = 3; u = RFT(TV, false, false); break; |
||
1747 | case NEON::BI__builtin_neon_vfma_lane_f16: i = 3; u = RFT(TV, false, false); break; |
||
1748 | case NEON::BI__builtin_neon_vfmaq_laneq_v: i = 3; u = RFT(TV, false, true); break; |
||
1749 | case NEON::BI__builtin_neon_vfma_laneq_v: i = 3; u = RFT(TV, false, true); break; |
||
1750 | case NEON::BI__builtin_neon_vfmaq_laneq_f16: i = 3; u = RFT(TV, false, true); break; |
||
1751 | case NEON::BI__builtin_neon_vfma_laneq_f16: i = 3; u = RFT(TV, false, true); break; |
||
1752 | case NEON::BI__builtin_neon_vget_lane_i8: i = 1; u = 7; break; |
||
1753 | case NEON::BI__builtin_neon_vget_lane_i16: i = 1; u = 3; break; |
||
1754 | case NEON::BI__builtin_neon_vgetq_lane_i8: i = 1; u = 15; break; |
||
1755 | case NEON::BI__builtin_neon_vgetq_lane_i16: i = 1; u = 7; break; |
||
1756 | case NEON::BI__builtin_neon_vgetq_lane_i32: i = 1; u = 3; break; |
||
1757 | case NEON::BI__builtin_neon_vgetq_lane_f32: i = 1; u = 3; break; |
||
1758 | case NEON::BI__builtin_neon_vget_lane_i32: i = 1; u = 1; break; |
||
1759 | case NEON::BI__builtin_neon_vget_lane_f32: i = 1; u = 1; break; |
||
1760 | case NEON::BI__builtin_neon_vgetq_lane_bf16: i = 1; u = 7; break; |
||
1761 | case NEON::BI__builtin_neon_vget_lane_bf16: i = 1; u = 3; break; |
||
1762 | case NEON::BI__builtin_neon_vld1q_lane_bf16: i = 2; u = RFT(TV, false, false); break; |
||
1763 | case NEON::BI__builtin_neon_vld1_lane_bf16: i = 2; u = RFT(TV, false, false); break; |
||
1764 | case NEON::BI__builtin_neon_vld2q_lane_bf16: i = 4; u = RFT(TV, false, false); break; |
||
1765 | case NEON::BI__builtin_neon_vld2_lane_bf16: i = 4; u = RFT(TV, false, false); break; |
||
1766 | case NEON::BI__builtin_neon_vld3q_lane_bf16: i = 5; u = RFT(TV, false, false); break; |
||
1767 | case NEON::BI__builtin_neon_vld3_lane_bf16: i = 5; u = RFT(TV, false, false); break; |
||
1768 | case NEON::BI__builtin_neon_vld4q_lane_bf16: i = 6; u = RFT(TV, false, false); break; |
||
1769 | case NEON::BI__builtin_neon_vld4_lane_bf16: i = 6; u = RFT(TV, false, false); break; |
||
1770 | case NEON::BI__builtin_neon_vqdmulhq_laneq_v: i = 2; u = RFT(TV, false, true); break; |
||
1771 | case NEON::BI__builtin_neon_vqdmulh_laneq_v: i = 2; u = RFT(TV, false, true); break; |
||
1772 | case NEON::BI__builtin_neon_vqrdmulhq_laneq_v: i = 2; u = RFT(TV, false, true); break; |
||
1773 | case NEON::BI__builtin_neon_vqrdmulh_laneq_v: i = 2; u = RFT(TV, false, true); break; |
||
1774 | case NEON::BI__builtin_neon_vqrshrn_n_v: i = 1; l = 1; u = RFT(TV, true); break; |
||
1775 | case NEON::BI__builtin_neon_vqrshrun_n_v: i = 1; l = 1; u = RFT(TV, true); break; |
||
1776 | case NEON::BI__builtin_neon_vqshluq_n_v: i = 1; u = RFT(TV, true); break; |
||
1777 | case NEON::BI__builtin_neon_vqshlu_n_v: i = 1; u = RFT(TV, true); break; |
||
1778 | case NEON::BI__builtin_neon_vqshlq_n_v: i = 1; u = RFT(TV, true); break; |
||
1779 | case NEON::BI__builtin_neon_vqshl_n_v: i = 1; u = RFT(TV, true); break; |
||
1780 | case NEON::BI__builtin_neon_vqshrn_n_v: i = 1; l = 1; u = RFT(TV, true); break; |
||
1781 | case NEON::BI__builtin_neon_vqshrun_n_v: i = 1; l = 1; u = RFT(TV, true); break; |
||
1782 | case NEON::BI__builtin_neon_vrshrn_n_v: i = 1; l = 1; u = RFT(TV, true); break; |
||
1783 | case NEON::BI__builtin_neon_vrshrq_n_v: i = 1; l = 1; u = RFT(TV, true); break; |
||
1784 | case NEON::BI__builtin_neon_vrshr_n_v: i = 1; l = 1; u = RFT(TV, true); break; |
||
1785 | case NEON::BI__builtin_neon_vrsraq_n_v: i = 2; l = 1; u = RFT(TV, true); break; |
||
1786 | case NEON::BI__builtin_neon_vrsra_n_v: i = 2; l = 1; u = RFT(TV, true); break; |
||
1787 | case NEON::BI__builtin_neon_vset_lane_i8: i = 2; u = 7; break; |
||
1788 | case NEON::BI__builtin_neon_vset_lane_i16: i = 2; u = 3; break; |
||
1789 | case NEON::BI__builtin_neon_vsetq_lane_i8: i = 2; u = 15; break; |
||
1790 | case NEON::BI__builtin_neon_vsetq_lane_i16: i = 2; u = 7; break; |
||
1791 | case NEON::BI__builtin_neon_vsetq_lane_i32: i = 2; u = 3; break; |
||
1792 | case NEON::BI__builtin_neon_vsetq_lane_f32: i = 2; u = 3; break; |
||
1793 | case NEON::BI__builtin_neon_vset_lane_i32: i = 2; u = 1; break; |
||
1794 | case NEON::BI__builtin_neon_vset_lane_f32: i = 2; u = 1; break; |
||
1795 | case NEON::BI__builtin_neon_vsetq_lane_bf16: i = 2; u = 7; break; |
||
1796 | case NEON::BI__builtin_neon_vset_lane_bf16: i = 2; u = 3; break; |
||
1797 | case NEON::BI__builtin_neon_vshll_n_v: i = 1; u = RFT(TV, true); break; |
||
1798 | case NEON::BI__builtin_neon_vshlq_n_v: i = 1; u = RFT(TV, true); break; |
||
1799 | case NEON::BI__builtin_neon_vshl_n_v: i = 1; u = RFT(TV, true); break; |
||
1800 | case NEON::BI__builtin_neon_vshrn_n_v: i = 1; l = 1; u = RFT(TV, true); break; |
||
1801 | case NEON::BI__builtin_neon_vshrq_n_v: i = 1; l = 1; u = RFT(TV, true); break; |
||
1802 | case NEON::BI__builtin_neon_vshr_n_v: i = 1; l = 1; u = RFT(TV, true); break; |
||
1803 | case NEON::BI__builtin_neon_vsraq_n_v: i = 2; l = 1; u = RFT(TV, true); break; |
||
1804 | case NEON::BI__builtin_neon_vsra_n_v: i = 2; l = 1; u = RFT(TV, true); break; |
||
1805 | case NEON::BI__builtin_neon_vst1q_lane_bf16: i = 2; u = RFT(TV, false, false); break; |
||
1806 | case NEON::BI__builtin_neon_vst1_lane_bf16: i = 2; u = RFT(TV, false, false); break; |
||
1807 | case NEON::BI__builtin_neon_vst2q_lane_bf16: i = 3; u = RFT(TV, false, false); break; |
||
1808 | case NEON::BI__builtin_neon_vst2_lane_bf16: i = 3; u = RFT(TV, false, false); break; |
||
1809 | case NEON::BI__builtin_neon_vst3q_lane_bf16: i = 4; u = RFT(TV, false, false); break; |
||
1810 | case NEON::BI__builtin_neon_vst3_lane_bf16: i = 4; u = RFT(TV, false, false); break; |
||
1811 | case NEON::BI__builtin_neon_vst4q_lane_bf16: i = 5; u = RFT(TV, false, false); break; |
||
1812 | case NEON::BI__builtin_neon_vst4_lane_bf16: i = 5; u = RFT(TV, false, false); break; |
||
1813 | case NEON::BI__builtin_neon_vxarq_u64: i = 2; l = 0; u = 63; break; |
||
1814 | #endif |
||
1815 |