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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 14 | pmbaty | 1 | //===--- BuiltinsPPC.def - PowerPC Builtin function database ----*- C++ -*-===// |
| 2 | // |
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| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
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| 4 | // See https://llvm.org/LICENSE.txt for license information. |
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| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
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| 6 | // |
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| 7 | //===----------------------------------------------------------------------===// |
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| 8 | // |
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| 9 | // This file defines the PowerPC-specific builtin function database. Users of |
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| 10 | // this file must define the BUILTIN macro or the CUSTOM_BUILTIN macro to |
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| 11 | // make use of this information. The latter is used for builtins requiring |
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| 12 | // custom code generation and checking. |
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| 13 | // |
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| 14 | //===----------------------------------------------------------------------===// |
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| 15 | |||
| 16 | // FIXME: this needs to be the full list supported by GCC. Right now, I'm just |
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| 17 | // adding stuff on demand. |
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| 18 | |||
| 19 | // The format of this database matches clang/Basic/Builtins.def except for the |
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| 20 | // MMA builtins that are using their own format documented below. |
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| 21 | |||
| 22 | #if defined(BUILTIN) && !defined(CUSTOM_BUILTIN) |
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| 23 | # define CUSTOM_BUILTIN(ID, INTR, TYPES, ACCUMULATE) \ |
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| 24 | BUILTIN(__builtin_##ID, "i.", "t") |
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| 25 | #elif defined(CUSTOM_BUILTIN) && !defined(BUILTIN) |
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| 26 | # define BUILTIN(ID, TYPES, ATTRS) |
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| 27 | #endif |
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| 28 | |||
| 29 | #define UNALIASED_CUSTOM_BUILTIN(ID, TYPES, ACCUMULATE) \ |
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| 30 | CUSTOM_BUILTIN(ID, ID, TYPES, ACCUMULATE) |
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| 31 | |||
| 32 | // XL Compatibility built-ins |
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| 33 | BUILTIN(__builtin_ppc_popcntb, "ULiULi", "") |
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| 34 | BUILTIN(__builtin_ppc_poppar4, "iUi", "") |
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| 35 | BUILTIN(__builtin_ppc_poppar8, "iULLi", "") |
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| 36 | BUILTIN(__builtin_ppc_eieio, "v", "") |
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| 37 | BUILTIN(__builtin_ppc_iospace_eieio, "v", "") |
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| 38 | BUILTIN(__builtin_ppc_isync, "v", "") |
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| 39 | BUILTIN(__builtin_ppc_lwsync, "v", "") |
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| 40 | BUILTIN(__builtin_ppc_iospace_lwsync, "v", "") |
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| 41 | BUILTIN(__builtin_ppc_sync, "v", "") |
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| 42 | BUILTIN(__builtin_ppc_iospace_sync, "v", "") |
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| 43 | BUILTIN(__builtin_ppc_dcbfl, "vvC*", "") |
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| 44 | BUILTIN(__builtin_ppc_dcbflp, "vvC*", "") |
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| 45 | BUILTIN(__builtin_ppc_dcbst, "vvC*", "") |
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| 46 | BUILTIN(__builtin_ppc_dcbt, "vv*", "") |
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| 47 | BUILTIN(__builtin_ppc_dcbtst, "vv*", "") |
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| 48 | BUILTIN(__builtin_ppc_dcbz, "vv*", "") |
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| 49 | BUILTIN(__builtin_ppc_icbt, "vv*", "") |
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| 50 | BUILTIN(__builtin_ppc_fric, "dd", "") |
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| 51 | BUILTIN(__builtin_ppc_frim, "dd", "") |
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| 52 | BUILTIN(__builtin_ppc_frims, "ff", "") |
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| 53 | BUILTIN(__builtin_ppc_frin, "dd", "") |
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| 54 | BUILTIN(__builtin_ppc_frins, "ff", "") |
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| 55 | BUILTIN(__builtin_ppc_frip, "dd", "") |
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| 56 | BUILTIN(__builtin_ppc_frips, "ff", "") |
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| 57 | BUILTIN(__builtin_ppc_friz, "dd", "") |
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| 58 | BUILTIN(__builtin_ppc_frizs, "ff", "") |
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| 59 | BUILTIN(__builtin_ppc_fsel, "dddd", "") |
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| 60 | BUILTIN(__builtin_ppc_fsels, "ffff", "") |
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| 61 | BUILTIN(__builtin_ppc_frsqrte, "dd", "") |
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| 62 | BUILTIN(__builtin_ppc_frsqrtes, "ff", "") |
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| 63 | BUILTIN(__builtin_ppc_fsqrt, "dd", "") |
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| 64 | BUILTIN(__builtin_ppc_fsqrts, "ff", "") |
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| 65 | BUILTIN(__builtin_ppc_compare_and_swap, "iiD*i*i", "") |
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| 66 | BUILTIN(__builtin_ppc_compare_and_swaplp, "iLiD*Li*Li", "") |
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| 67 | BUILTIN(__builtin_ppc_fetch_and_add, "iiD*i", "") |
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| 68 | BUILTIN(__builtin_ppc_fetch_and_addlp, "LiLiD*Li", "") |
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| 69 | BUILTIN(__builtin_ppc_fetch_and_and, "UiUiD*Ui", "") |
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| 70 | BUILTIN(__builtin_ppc_fetch_and_andlp, "ULiULiD*ULi", "") |
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| 71 | BUILTIN(__builtin_ppc_fetch_and_or, "UiUiD*Ui", "") |
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| 72 | BUILTIN(__builtin_ppc_fetch_and_orlp, "ULiULiD*ULi", "") |
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| 73 | BUILTIN(__builtin_ppc_fetch_and_swap, "UiUiD*Ui", "") |
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| 74 | BUILTIN(__builtin_ppc_fetch_and_swaplp, "ULiULiD*ULi", "") |
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| 75 | BUILTIN(__builtin_ppc_ldarx, "LiLiD*", "") |
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| 76 | BUILTIN(__builtin_ppc_lwarx, "iiD*", "") |
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| 77 | BUILTIN(__builtin_ppc_lharx, "ssD*", "") |
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| 78 | BUILTIN(__builtin_ppc_lbarx, "ccD*", "") |
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| 79 | BUILTIN(__builtin_ppc_stdcx, "iLiD*Li", "") |
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| 80 | BUILTIN(__builtin_ppc_stwcx, "iiD*i", "") |
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| 81 | BUILTIN(__builtin_ppc_sthcx, "isD*s", "") |
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| 82 | BUILTIN(__builtin_ppc_stbcx, "icD*i", "") |
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| 83 | BUILTIN(__builtin_ppc_tdw, "vLLiLLiIUi", "") |
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| 84 | BUILTIN(__builtin_ppc_tw, "viiIUi", "") |
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| 85 | BUILTIN(__builtin_ppc_trap, "vi", "") |
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| 86 | BUILTIN(__builtin_ppc_trapd, "vLi", "") |
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| 87 | BUILTIN(__builtin_ppc_fcfid, "dd", "") |
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| 88 | BUILTIN(__builtin_ppc_fcfud, "dd", "") |
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| 89 | BUILTIN(__builtin_ppc_fctid, "dd", "") |
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| 90 | BUILTIN(__builtin_ppc_fctidz, "dd", "") |
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| 91 | BUILTIN(__builtin_ppc_fctiw, "dd", "") |
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| 92 | BUILTIN(__builtin_ppc_fctiwz, "dd", "") |
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| 93 | BUILTIN(__builtin_ppc_fctudz, "dd", "") |
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| 94 | BUILTIN(__builtin_ppc_fctuwz, "dd", "") |
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| 95 | BUILTIN(__builtin_ppc_swdiv_nochk, "ddd", "") |
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| 96 | BUILTIN(__builtin_ppc_swdivs_nochk, "fff", "") |
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| 97 | BUILTIN(__builtin_ppc_alignx, "vIivC*", "nc") |
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| 98 | BUILTIN(__builtin_ppc_rdlam, "UWiUWiUWiUWIi", "nc") |
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| 99 | BUILTIN(__builtin_ppc_compare_exp_uo, "idd", "") |
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| 100 | BUILTIN(__builtin_ppc_compare_exp_lt, "idd", "") |
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| 101 | BUILTIN(__builtin_ppc_compare_exp_gt, "idd", "") |
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| 102 | BUILTIN(__builtin_ppc_compare_exp_eq, "idd", "") |
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| 103 | BUILTIN(__builtin_ppc_test_data_class, "idIi", "t") |
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| 104 | BUILTIN(__builtin_ppc_swdiv, "ddd", "") |
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| 105 | BUILTIN(__builtin_ppc_swdivs, "fff", "") |
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| 106 | // Compare |
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| 107 | BUILTIN(__builtin_ppc_cmpeqb, "LLiLLiLLi", "") |
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| 108 | BUILTIN(__builtin_ppc_cmprb, "iCIiii", "") |
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| 109 | BUILTIN(__builtin_ppc_setb, "LLiLLiLLi", "") |
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| 110 | BUILTIN(__builtin_ppc_cmpb, "LLiLLiLLi", "") |
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| 111 | // Multiply |
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| 112 | BUILTIN(__builtin_ppc_mulhd, "LLiLiLi", "") |
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| 113 | BUILTIN(__builtin_ppc_mulhdu, "ULLiULiULi", "") |
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| 114 | BUILTIN(__builtin_ppc_mulhw, "iii", "") |
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| 115 | BUILTIN(__builtin_ppc_mulhwu, "UiUiUi", "") |
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| 116 | BUILTIN(__builtin_ppc_maddhd, "LLiLLiLLiLLi", "") |
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| 117 | BUILTIN(__builtin_ppc_maddhdu, "ULLiULLiULLiULLi", "") |
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| 118 | BUILTIN(__builtin_ppc_maddld, "LLiLLiLLiLLi", "") |
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| 119 | // Rotate |
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| 120 | BUILTIN(__builtin_ppc_rlwnm, "UiUiUiIUi", "") |
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| 121 | BUILTIN(__builtin_ppc_rlwimi, "UiUiUiIUiIUi", "") |
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| 122 | BUILTIN(__builtin_ppc_rldimi, "ULLiULLiULLiIUiIULLi", "") |
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| 123 | // load |
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| 124 | BUILTIN(__builtin_ppc_load2r, "UsUs*", "") |
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| 125 | BUILTIN(__builtin_ppc_load4r, "UiUi*", "") |
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| 126 | BUILTIN(__builtin_ppc_load8r, "ULLiULLi*", "") |
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| 127 | // store |
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| 128 | BUILTIN(__builtin_ppc_store2r, "vUiUs*", "") |
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| 129 | BUILTIN(__builtin_ppc_store4r, "vUiUi*", "") |
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| 130 | BUILTIN(__builtin_ppc_store8r, "vULLiULLi*", "") |
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| 131 | BUILTIN(__builtin_ppc_extract_exp, "Uid", "") |
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| 132 | BUILTIN(__builtin_ppc_extract_sig, "ULLid", "") |
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| 133 | BUILTIN(__builtin_ppc_mtfsb0, "vUIi", "") |
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| 134 | BUILTIN(__builtin_ppc_mtfsb1, "vUIi", "") |
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| 135 | BUILTIN(__builtin_ppc_mtfsf, "vUIiUi", "") |
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| 136 | BUILTIN(__builtin_ppc_mtfsfi, "vUIiUIi", "") |
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| 137 | BUILTIN(__builtin_ppc_insert_exp, "ddULLi", "") |
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| 138 | BUILTIN(__builtin_ppc_fmsub, "dddd", "") |
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| 139 | BUILTIN(__builtin_ppc_fmsubs, "ffff", "") |
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| 140 | BUILTIN(__builtin_ppc_fnmadd, "dddd", "") |
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| 141 | BUILTIN(__builtin_ppc_fnmadds, "ffff", "") |
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| 142 | BUILTIN(__builtin_ppc_fnmsub, "dddd", "") |
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| 143 | BUILTIN(__builtin_ppc_fnmsubs, "ffff", "") |
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| 144 | BUILTIN(__builtin_ppc_fre, "dd", "") |
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| 145 | BUILTIN(__builtin_ppc_fres, "ff", "") |
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| 146 | BUILTIN(__builtin_ppc_dcbtstt, "vv*", "") |
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| 147 | BUILTIN(__builtin_ppc_dcbtt, "vv*", "") |
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| 148 | BUILTIN(__builtin_ppc_mftbu, "Ui","") |
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| 149 | BUILTIN(__builtin_ppc_mfmsr, "Ui", "") |
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| 150 | BUILTIN(__builtin_ppc_mfspr, "ULiIi", "") |
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| 151 | BUILTIN(__builtin_ppc_mtmsr, "vUi", "") |
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| 152 | BUILTIN(__builtin_ppc_mtspr, "vIiULi", "") |
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| 153 | BUILTIN(__builtin_ppc_stfiw, "viC*d", "") |
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| 154 | BUILTIN(__builtin_ppc_addex, "LLiLLiLLiCIi", "") |
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| 155 | // select |
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| 156 | BUILTIN(__builtin_ppc_maxfe, "LdLdLdLd.", "t") |
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| 157 | BUILTIN(__builtin_ppc_maxfl, "dddd.", "t") |
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| 158 | BUILTIN(__builtin_ppc_maxfs, "ffff.", "t") |
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| 159 | BUILTIN(__builtin_ppc_minfe, "LdLdLdLd.", "t") |
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| 160 | BUILTIN(__builtin_ppc_minfl, "dddd.", "t") |
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| 161 | BUILTIN(__builtin_ppc_minfs, "ffff.", "t") |
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| 162 | // Floating Negative Absolute Value |
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| 163 | BUILTIN(__builtin_ppc_fnabs, "dd", "") |
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| 164 | BUILTIN(__builtin_ppc_fnabss, "ff", "") |
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| 165 | |||
| 166 | BUILTIN(__builtin_ppc_get_timebase, "ULLi", "n") |
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| 167 | |||
| 168 | // This is just a placeholder, the types and attributes are wrong. |
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| 169 | BUILTIN(__builtin_altivec_vaddcuw, "V4UiV4UiV4Ui", "") |
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| 170 | |||
| 171 | BUILTIN(__builtin_altivec_vaddsbs, "V16ScV16ScV16Sc", "") |
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| 172 | BUILTIN(__builtin_altivec_vaddubs, "V16UcV16UcV16Uc", "") |
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| 173 | BUILTIN(__builtin_altivec_vaddshs, "V8SsV8SsV8Ss", "") |
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| 174 | BUILTIN(__builtin_altivec_vadduhs, "V8UsV8UsV8Us", "") |
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| 175 | BUILTIN(__builtin_altivec_vaddsws, "V4SiV4SiV4Si", "") |
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| 176 | BUILTIN(__builtin_altivec_vadduws, "V4UiV4UiV4Ui", "") |
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| 177 | BUILTIN(__builtin_altivec_vaddeuqm, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi","") |
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| 178 | BUILTIN(__builtin_altivec_vaddcuq, "V1ULLLiV1ULLLiV1ULLLi","") |
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| 179 | BUILTIN(__builtin_altivec_vaddecuq, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi","") |
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| 180 | BUILTIN(__builtin_altivec_vadduqm, "V1ULLLiV16UcV16Uc","") |
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| 181 | BUILTIN(__builtin_altivec_vaddeuqm_c, "V16UcV16UcV16UcV16Uc","") |
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| 182 | BUILTIN(__builtin_altivec_vaddcuq_c, "V16UcV16UcV16Uc","") |
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| 183 | BUILTIN(__builtin_altivec_vaddecuq_c, "V16UcV16UcV16UcV16Uc","") |
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| 184 | |||
| 185 | BUILTIN(__builtin_altivec_vsubsbs, "V16ScV16ScV16Sc", "") |
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| 186 | BUILTIN(__builtin_altivec_vsububs, "V16UcV16UcV16Uc", "") |
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| 187 | BUILTIN(__builtin_altivec_vsubshs, "V8SsV8SsV8Ss", "") |
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| 188 | BUILTIN(__builtin_altivec_vsubuhs, "V8UsV8UsV8Us", "") |
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| 189 | BUILTIN(__builtin_altivec_vsubsws, "V4SiV4SiV4Si", "") |
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| 190 | BUILTIN(__builtin_altivec_vsubuws, "V4UiV4UiV4Ui", "") |
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| 191 | BUILTIN(__builtin_altivec_vsubeuqm, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi","") |
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| 192 | BUILTIN(__builtin_altivec_vsubcuq, "V1ULLLiV1ULLLiV1ULLLi","") |
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| 193 | BUILTIN(__builtin_altivec_vsubecuq, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi","") |
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| 194 | BUILTIN(__builtin_altivec_vsubuqm, "V1ULLLiV16UcV16Uc","") |
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| 195 | BUILTIN(__builtin_altivec_vsubeuqm_c, "V16UcV16UcV16UcV16Uc","") |
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| 196 | BUILTIN(__builtin_altivec_vsubcuq_c, "V16UcV16UcV16Uc","") |
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| 197 | BUILTIN(__builtin_altivec_vsubecuq_c, "V16UcV16UcV16UcV16Uc","") |
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| 198 | |||
| 199 | BUILTIN(__builtin_altivec_vavgsb, "V16ScV16ScV16Sc", "") |
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| 200 | BUILTIN(__builtin_altivec_vavgub, "V16UcV16UcV16Uc", "") |
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| 201 | BUILTIN(__builtin_altivec_vavgsh, "V8SsV8SsV8Ss", "") |
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| 202 | BUILTIN(__builtin_altivec_vavguh, "V8UsV8UsV8Us", "") |
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| 203 | BUILTIN(__builtin_altivec_vavgsw, "V4SiV4SiV4Si", "") |
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| 204 | BUILTIN(__builtin_altivec_vavguw, "V4UiV4UiV4Ui", "") |
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| 205 | |||
| 206 | BUILTIN(__builtin_altivec_vrfip, "V4fV4f", "") |
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| 207 | |||
| 208 | BUILTIN(__builtin_altivec_vcfsx, "V4fV4SiIi", "") |
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| 209 | BUILTIN(__builtin_altivec_vcfux, "V4fV4UiIi", "") |
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| 210 | BUILTIN(__builtin_altivec_vctsxs, "V4SiV4fIi", "") |
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| 211 | BUILTIN(__builtin_altivec_vctuxs, "V4UiV4fIi", "") |
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| 212 | |||
| 213 | BUILTIN(__builtin_altivec_dss, "vUIi", "") |
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| 214 | BUILTIN(__builtin_altivec_dssall, "v", "") |
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| 215 | BUILTIN(__builtin_altivec_dst, "vvC*iUIi", "") |
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| 216 | BUILTIN(__builtin_altivec_dstt, "vvC*iUIi", "") |
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| 217 | BUILTIN(__builtin_altivec_dstst, "vvC*iUIi", "") |
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| 218 | BUILTIN(__builtin_altivec_dststt, "vvC*iUIi", "") |
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| 219 | |||
| 220 | BUILTIN(__builtin_altivec_vexptefp, "V4fV4f", "") |
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| 221 | |||
| 222 | BUILTIN(__builtin_altivec_vrfim, "V4fV4f", "") |
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| 223 | |||
| 224 | BUILTIN(__builtin_altivec_lvx, "V4iLivC*", "") |
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| 225 | BUILTIN(__builtin_altivec_lvxl, "V4iLivC*", "") |
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| 226 | BUILTIN(__builtin_altivec_lvebx, "V16cLivC*", "") |
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| 227 | BUILTIN(__builtin_altivec_lvehx, "V8sLivC*", "") |
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| 228 | BUILTIN(__builtin_altivec_lvewx, "V4iLivC*", "") |
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| 229 | |||
| 230 | BUILTIN(__builtin_altivec_vlogefp, "V4fV4f", "") |
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| 231 | |||
| 232 | BUILTIN(__builtin_altivec_lvsl, "V16cUcvC*", "") |
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| 233 | BUILTIN(__builtin_altivec_lvsr, "V16cUcvC*", "") |
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| 234 | |||
| 235 | BUILTIN(__builtin_altivec_vmaddfp, "V4fV4fV4fV4f", "") |
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| 236 | BUILTIN(__builtin_altivec_vmhaddshs, "V8sV8sV8sV8s", "") |
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| 237 | BUILTIN(__builtin_altivec_vmhraddshs, "V8sV8sV8sV8s", "") |
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| 238 | |||
| 239 | BUILTIN(__builtin_altivec_vmsumubm, "V4UiV16UcV16UcV4Ui", "") |
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| 240 | BUILTIN(__builtin_altivec_vmsummbm, "V4SiV16ScV16UcV4Si", "") |
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| 241 | BUILTIN(__builtin_altivec_vmsumuhm, "V4UiV8UsV8UsV4Ui", "") |
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| 242 | BUILTIN(__builtin_altivec_vmsumshm, "V4SiV8SsV8SsV4Si", "") |
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| 243 | BUILTIN(__builtin_altivec_vmsumuhs, "V4UiV8UsV8UsV4Ui", "") |
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| 244 | BUILTIN(__builtin_altivec_vmsumshs, "V4SiV8SsV8SsV4Si", "") |
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| 245 | |||
| 246 | BUILTIN(__builtin_altivec_vmuleub, "V8UsV16UcV16Uc", "") |
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| 247 | BUILTIN(__builtin_altivec_vmulesb, "V8SsV16ScV16Sc", "") |
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| 248 | BUILTIN(__builtin_altivec_vmuleuh, "V4UiV8UsV8Us", "") |
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| 249 | BUILTIN(__builtin_altivec_vmulesh, "V4SiV8SsV8Ss", "") |
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| 250 | BUILTIN(__builtin_altivec_vmuleuw, "V2ULLiV4UiV4Ui", "") |
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| 251 | BUILTIN(__builtin_altivec_vmulesw, "V2SLLiV4SiV4Si", "") |
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| 252 | BUILTIN(__builtin_altivec_vmuloub, "V8UsV16UcV16Uc", "") |
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| 253 | BUILTIN(__builtin_altivec_vmulosb, "V8SsV16ScV16Sc", "") |
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| 254 | BUILTIN(__builtin_altivec_vmulouh, "V4UiV8UsV8Us", "") |
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| 255 | BUILTIN(__builtin_altivec_vmulosh, "V4SiV8SsV8Ss", "") |
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| 256 | BUILTIN(__builtin_altivec_vmulouw, "V2ULLiV4UiV4Ui", "") |
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| 257 | BUILTIN(__builtin_altivec_vmulosw, "V2SLLiV4SiV4Si", "") |
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| 258 | BUILTIN(__builtin_altivec_vmuleud, "V1ULLLiV2ULLiV2ULLi", "") |
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| 259 | BUILTIN(__builtin_altivec_vmulesd, "V1SLLLiV2SLLiV2SLLi", "") |
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| 260 | BUILTIN(__builtin_altivec_vmuloud, "V1ULLLiV2ULLiV2ULLi", "") |
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| 261 | BUILTIN(__builtin_altivec_vmulosd, "V1SLLLiV2SLLiV2SLLi", "") |
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| 262 | BUILTIN(__builtin_altivec_vmsumcud, "V1ULLLiV2ULLiV2ULLiV1ULLLi", "") |
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| 263 | |||
| 264 | BUILTIN(__builtin_altivec_vnmsubfp, "V4fV4fV4fV4f", "") |
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| 265 | |||
| 266 | BUILTIN(__builtin_altivec_vpkpx, "V8sV4UiV4Ui", "") |
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| 267 | BUILTIN(__builtin_altivec_vpkuhus, "V16UcV8UsV8Us", "") |
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| 268 | BUILTIN(__builtin_altivec_vpkshss, "V16ScV8SsV8Ss", "") |
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| 269 | BUILTIN(__builtin_altivec_vpkuwus, "V8UsV4UiV4Ui", "") |
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| 270 | BUILTIN(__builtin_altivec_vpkswss, "V8SsV4SiV4Si", "") |
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| 271 | BUILTIN(__builtin_altivec_vpkshus, "V16UcV8SsV8Ss", "") |
||
| 272 | BUILTIN(__builtin_altivec_vpkswus, "V8UsV4SiV4Si", "") |
||
| 273 | BUILTIN(__builtin_altivec_vpksdss, "V4SiV2SLLiV2SLLi", "") |
||
| 274 | BUILTIN(__builtin_altivec_vpksdus, "V4UiV2SLLiV2SLLi", "") |
||
| 275 | BUILTIN(__builtin_altivec_vpkudus, "V4UiV2ULLiV2ULLi", "") |
||
| 276 | BUILTIN(__builtin_altivec_vpkudum, "V4UiV2ULLiV2ULLi", "") |
||
| 277 | |||
| 278 | BUILTIN(__builtin_altivec_vperm_4si, "V4iV4iV4iV16Uc", "") |
||
| 279 | |||
| 280 | BUILTIN(__builtin_altivec_stvx, "vV4iLiv*", "") |
||
| 281 | BUILTIN(__builtin_altivec_stvxl, "vV4iLiv*", "") |
||
| 282 | BUILTIN(__builtin_altivec_stvebx, "vV16cLiv*", "") |
||
| 283 | BUILTIN(__builtin_altivec_stvehx, "vV8sLiv*", "") |
||
| 284 | BUILTIN(__builtin_altivec_stvewx, "vV4iLiv*", "") |
||
| 285 | |||
| 286 | BUILTIN(__builtin_altivec_vcmpbfp, "V4iV4fV4f", "") |
||
| 287 | |||
| 288 | BUILTIN(__builtin_altivec_vcmpgefp, "V4iV4fV4f", "") |
||
| 289 | |||
| 290 | BUILTIN(__builtin_altivec_vcmpequb, "V16cV16cV16c", "") |
||
| 291 | BUILTIN(__builtin_altivec_vcmpequh, "V8sV8sV8s", "") |
||
| 292 | BUILTIN(__builtin_altivec_vcmpequw, "V4iV4iV4i", "") |
||
| 293 | BUILTIN(__builtin_altivec_vcmpequd, "V2LLiV2LLiV2LLi", "") |
||
| 294 | BUILTIN(__builtin_altivec_vcmpeqfp, "V4iV4fV4f", "") |
||
| 295 | |||
| 296 | BUILTIN(__builtin_altivec_vcmpneb, "V16cV16cV16c", "") |
||
| 297 | BUILTIN(__builtin_altivec_vcmpneh, "V8sV8sV8s", "") |
||
| 298 | BUILTIN(__builtin_altivec_vcmpnew, "V4iV4iV4i", "") |
||
| 299 | |||
| 300 | BUILTIN(__builtin_altivec_vcmpnezb, "V16cV16cV16c", "") |
||
| 301 | BUILTIN(__builtin_altivec_vcmpnezh, "V8sV8sV8s", "") |
||
| 302 | BUILTIN(__builtin_altivec_vcmpnezw, "V4iV4iV4i", "") |
||
| 303 | |||
| 304 | BUILTIN(__builtin_altivec_vcmpgtsb, "V16cV16ScV16Sc", "") |
||
| 305 | BUILTIN(__builtin_altivec_vcmpgtub, "V16cV16UcV16Uc", "") |
||
| 306 | BUILTIN(__builtin_altivec_vcmpgtsh, "V8sV8SsV8Ss", "") |
||
| 307 | BUILTIN(__builtin_altivec_vcmpgtuh, "V8sV8UsV8Us", "") |
||
| 308 | BUILTIN(__builtin_altivec_vcmpgtsw, "V4iV4SiV4Si", "") |
||
| 309 | BUILTIN(__builtin_altivec_vcmpgtuw, "V4iV4UiV4Ui", "") |
||
| 310 | BUILTIN(__builtin_altivec_vcmpgtsd, "V2LLiV2LLiV2LLi", "") |
||
| 311 | BUILTIN(__builtin_altivec_vcmpgtud, "V2LLiV2ULLiV2ULLi", "") |
||
| 312 | BUILTIN(__builtin_altivec_vcmpgtfp, "V4iV4fV4f", "") |
||
| 313 | |||
| 314 | // P10 Vector compare builtins. |
||
| 315 | BUILTIN(__builtin_altivec_vcmpequq, "V1LLLiV1ULLLiV1ULLLi", "") |
||
| 316 | BUILTIN(__builtin_altivec_vcmpgtsq, "V1LLLiV1SLLLiV1SLLLi", "") |
||
| 317 | BUILTIN(__builtin_altivec_vcmpgtuq, "V1LLLiV1ULLLiV1ULLLi", "") |
||
| 318 | BUILTIN(__builtin_altivec_vcmpequq_p, "iiV1ULLLiV1LLLi", "") |
||
| 319 | BUILTIN(__builtin_altivec_vcmpgtsq_p, "iiV1SLLLiV1SLLLi", "") |
||
| 320 | BUILTIN(__builtin_altivec_vcmpgtuq_p, "iiV1ULLLiV1ULLLi", "") |
||
| 321 | |||
| 322 | BUILTIN(__builtin_altivec_vmaxsb, "V16ScV16ScV16Sc", "") |
||
| 323 | BUILTIN(__builtin_altivec_vmaxub, "V16UcV16UcV16Uc", "") |
||
| 324 | BUILTIN(__builtin_altivec_vmaxsh, "V8SsV8SsV8Ss", "") |
||
| 325 | BUILTIN(__builtin_altivec_vmaxuh, "V8UsV8UsV8Us", "") |
||
| 326 | BUILTIN(__builtin_altivec_vmaxsw, "V4SiV4SiV4Si", "") |
||
| 327 | BUILTIN(__builtin_altivec_vmaxuw, "V4UiV4UiV4Ui", "") |
||
| 328 | BUILTIN(__builtin_altivec_vmaxsd, "V2LLiV2LLiV2LLi", "") |
||
| 329 | BUILTIN(__builtin_altivec_vmaxud, "V2ULLiV2ULLiV2ULLi", "") |
||
| 330 | BUILTIN(__builtin_altivec_vmaxfp, "V4fV4fV4f", "") |
||
| 331 | |||
| 332 | BUILTIN(__builtin_altivec_mfvscr, "V8Us", "") |
||
| 333 | |||
| 334 | BUILTIN(__builtin_altivec_vminsb, "V16ScV16ScV16Sc", "") |
||
| 335 | BUILTIN(__builtin_altivec_vminub, "V16UcV16UcV16Uc", "") |
||
| 336 | BUILTIN(__builtin_altivec_vminsh, "V8SsV8SsV8Ss", "") |
||
| 337 | BUILTIN(__builtin_altivec_vminuh, "V8UsV8UsV8Us", "") |
||
| 338 | BUILTIN(__builtin_altivec_vminsw, "V4SiV4SiV4Si", "") |
||
| 339 | BUILTIN(__builtin_altivec_vminuw, "V4UiV4UiV4Ui", "") |
||
| 340 | BUILTIN(__builtin_altivec_vminsd, "V2LLiV2LLiV2LLi", "") |
||
| 341 | BUILTIN(__builtin_altivec_vminud, "V2ULLiV2ULLiV2ULLi", "") |
||
| 342 | BUILTIN(__builtin_altivec_vminfp, "V4fV4fV4f", "") |
||
| 343 | |||
| 344 | BUILTIN(__builtin_altivec_mtvscr, "vV4i", "") |
||
| 345 | |||
| 346 | BUILTIN(__builtin_altivec_vrefp, "V4fV4f", "") |
||
| 347 | |||
| 348 | BUILTIN(__builtin_altivec_vrlb, "V16cV16cV16Uc", "") |
||
| 349 | BUILTIN(__builtin_altivec_vrlh, "V8sV8sV8Us", "") |
||
| 350 | BUILTIN(__builtin_altivec_vrlw, "V4iV4iV4Ui", "") |
||
| 351 | BUILTIN(__builtin_altivec_vrld, "V2LLiV2LLiV2ULLi", "") |
||
| 352 | |||
| 353 | BUILTIN(__builtin_altivec_vsel_4si, "V4iV4iV4iV4Ui", "") |
||
| 354 | |||
| 355 | BUILTIN(__builtin_altivec_vsl, "V4iV4iV4i", "") |
||
| 356 | BUILTIN(__builtin_altivec_vslo, "V4iV4iV4i", "") |
||
| 357 | |||
| 358 | BUILTIN(__builtin_altivec_vsrab, "V16cV16cV16Uc", "") |
||
| 359 | BUILTIN(__builtin_altivec_vsrah, "V8sV8sV8Us", "") |
||
| 360 | BUILTIN(__builtin_altivec_vsraw, "V4iV4iV4Ui", "") |
||
| 361 | |||
| 362 | BUILTIN(__builtin_altivec_vsr, "V4iV4iV4i", "") |
||
| 363 | BUILTIN(__builtin_altivec_vsro, "V4iV4iV4i", "") |
||
| 364 | |||
| 365 | BUILTIN(__builtin_altivec_vrfin, "V4fV4f", "") |
||
| 366 | |||
| 367 | BUILTIN(__builtin_altivec_vrsqrtefp, "V4fV4f", "") |
||
| 368 | |||
| 369 | BUILTIN(__builtin_altivec_vsubcuw, "V4UiV4UiV4Ui", "") |
||
| 370 | |||
| 371 | BUILTIN(__builtin_altivec_vsum4sbs, "V4SiV16ScV4Si", "") |
||
| 372 | BUILTIN(__builtin_altivec_vsum4ubs, "V4UiV16UcV4Ui", "") |
||
| 373 | BUILTIN(__builtin_altivec_vsum4shs, "V4SiV8SsV4Si", "") |
||
| 374 | |||
| 375 | BUILTIN(__builtin_altivec_vsum2sws, "V4SiV4SiV4Si", "") |
||
| 376 | |||
| 377 | BUILTIN(__builtin_altivec_vsumsws, "V4SiV4SiV4Si", "") |
||
| 378 | |||
| 379 | BUILTIN(__builtin_altivec_vrfiz, "V4fV4f", "") |
||
| 380 | |||
| 381 | BUILTIN(__builtin_altivec_vupkhsb, "V8sV16c", "") |
||
| 382 | BUILTIN(__builtin_altivec_vupkhpx, "V4UiV8s", "") |
||
| 383 | BUILTIN(__builtin_altivec_vupkhsh, "V4iV8s", "") |
||
| 384 | BUILTIN(__builtin_altivec_vupkhsw, "V2LLiV4i", "") |
||
| 385 | |||
| 386 | BUILTIN(__builtin_altivec_vupklsb, "V8sV16c", "") |
||
| 387 | BUILTIN(__builtin_altivec_vupklpx, "V4UiV8s", "") |
||
| 388 | BUILTIN(__builtin_altivec_vupklsh, "V4iV8s", "") |
||
| 389 | BUILTIN(__builtin_altivec_vupklsw, "V2LLiV4i", "") |
||
| 390 | |||
| 391 | BUILTIN(__builtin_altivec_vcmpbfp_p, "iiV4fV4f", "") |
||
| 392 | |||
| 393 | BUILTIN(__builtin_altivec_vcmpgefp_p, "iiV4fV4f", "") |
||
| 394 | |||
| 395 | BUILTIN(__builtin_altivec_vcmpequb_p, "iiV16cV16c", "") |
||
| 396 | BUILTIN(__builtin_altivec_vcmpequh_p, "iiV8sV8s", "") |
||
| 397 | BUILTIN(__builtin_altivec_vcmpequw_p, "iiV4iV4i", "") |
||
| 398 | BUILTIN(__builtin_altivec_vcmpequd_p, "iiV2LLiV2LLi", "") |
||
| 399 | BUILTIN(__builtin_altivec_vcmpeqfp_p, "iiV4fV4f", "") |
||
| 400 | |||
| 401 | BUILTIN(__builtin_altivec_vcmpneb_p, "iiV16cV16c", "") |
||
| 402 | BUILTIN(__builtin_altivec_vcmpneh_p, "iiV8sV8s", "") |
||
| 403 | BUILTIN(__builtin_altivec_vcmpnew_p, "iiV4iV4i", "") |
||
| 404 | BUILTIN(__builtin_altivec_vcmpned_p, "iiV2LLiV2LLi", "") |
||
| 405 | |||
| 406 | BUILTIN(__builtin_altivec_vcmpgtsb_p, "iiV16ScV16Sc", "") |
||
| 407 | BUILTIN(__builtin_altivec_vcmpgtub_p, "iiV16UcV16Uc", "") |
||
| 408 | BUILTIN(__builtin_altivec_vcmpgtsh_p, "iiV8SsV8Ss", "") |
||
| 409 | BUILTIN(__builtin_altivec_vcmpgtuh_p, "iiV8UsV8Us", "") |
||
| 410 | BUILTIN(__builtin_altivec_vcmpgtsw_p, "iiV4SiV4Si", "") |
||
| 411 | BUILTIN(__builtin_altivec_vcmpgtuw_p, "iiV4UiV4Ui", "") |
||
| 412 | BUILTIN(__builtin_altivec_vcmpgtsd_p, "iiV2LLiV2LLi", "") |
||
| 413 | BUILTIN(__builtin_altivec_vcmpgtud_p, "iiV2ULLiV2ULLi", "") |
||
| 414 | BUILTIN(__builtin_altivec_vcmpgtfp_p, "iiV4fV4f", "") |
||
| 415 | |||
| 416 | BUILTIN(__builtin_altivec_vgbbd, "V16UcV16Uc", "") |
||
| 417 | BUILTIN(__builtin_altivec_vbpermq, "V2ULLiV16UcV16Uc", "") |
||
| 418 | BUILTIN(__builtin_altivec_vbpermd, "V2ULLiV2ULLiV16Uc", "") |
||
| 419 | |||
| 420 | // P8 Crypto built-ins. |
||
| 421 | BUILTIN(__builtin_altivec_crypto_vsbox, "V16UcV16Uc", "") |
||
| 422 | BUILTIN(__builtin_altivec_crypto_vpermxor, "V16UcV16UcV16UcV16Uc", "") |
||
| 423 | BUILTIN(__builtin_altivec_crypto_vpermxor_be, "V16UcV16UcV16UcV16Uc", "") |
||
| 424 | BUILTIN(__builtin_altivec_crypto_vshasigmaw, "V4UiV4UiIiIi", "") |
||
| 425 | BUILTIN(__builtin_altivec_crypto_vshasigmad, "V2ULLiV2ULLiIiIi", "") |
||
| 426 | BUILTIN(__builtin_altivec_crypto_vcipher, "V16UcV16UcV16Uc", "") |
||
| 427 | BUILTIN(__builtin_altivec_crypto_vcipherlast, "V16UcV16UcV16Uc", "") |
||
| 428 | BUILTIN(__builtin_altivec_crypto_vncipher, "V16UcV16UcV16Uc", "") |
||
| 429 | BUILTIN(__builtin_altivec_crypto_vncipherlast, "V16UcV16UcV16Uc", "") |
||
| 430 | BUILTIN(__builtin_altivec_crypto_vpmsumb, "V16UcV16UcV16Uc", "") |
||
| 431 | BUILTIN(__builtin_altivec_crypto_vpmsumh, "V8UsV8UsV8Us", "") |
||
| 432 | BUILTIN(__builtin_altivec_crypto_vpmsumw, "V4UiV4UiV4Ui", "") |
||
| 433 | BUILTIN(__builtin_altivec_crypto_vpmsumd, "V2ULLiV2ULLiV2ULLi", "") |
||
| 434 | |||
| 435 | BUILTIN(__builtin_altivec_vclzb, "V16UcV16Uc", "") |
||
| 436 | BUILTIN(__builtin_altivec_vclzh, "V8UsV8Us", "") |
||
| 437 | BUILTIN(__builtin_altivec_vclzw, "V4UiV4Ui", "") |
||
| 438 | BUILTIN(__builtin_altivec_vclzd, "V2ULLiV2ULLi", "") |
||
| 439 | BUILTIN(__builtin_altivec_vctzb, "V16UcV16Uc", "") |
||
| 440 | BUILTIN(__builtin_altivec_vctzh, "V8UsV8Us", "") |
||
| 441 | BUILTIN(__builtin_altivec_vctzw, "V4UiV4Ui", "") |
||
| 442 | BUILTIN(__builtin_altivec_vctzd, "V2ULLiV2ULLi", "") |
||
| 443 | |||
| 444 | // P8 BCD builtins. |
||
| 445 | BUILTIN(__builtin_ppc_bcdadd, "V16UcV16UcV16UcIi", "") |
||
| 446 | BUILTIN(__builtin_ppc_bcdsub, "V16UcV16UcV16UcIi", "") |
||
| 447 | BUILTIN(__builtin_ppc_bcdadd_p, "iiV16UcV16Uc", "") |
||
| 448 | BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "") |
||
| 449 | |||
| 450 | BUILTIN(__builtin_altivec_vclzlsbb, "SiV16Uc", "") |
||
| 451 | BUILTIN(__builtin_altivec_vctzlsbb, "SiV16Uc", "") |
||
| 452 | BUILTIN(__builtin_altivec_vprtybw, "V4UiV4Ui", "") |
||
| 453 | BUILTIN(__builtin_altivec_vprtybd, "V2ULLiV2ULLi", "") |
||
| 454 | BUILTIN(__builtin_altivec_vprtybq, "V1ULLLiV1ULLLi", "") |
||
| 455 | |||
| 456 | // Vector population count built-ins |
||
| 457 | BUILTIN(__builtin_altivec_vpopcntb, "V16UcV16Uc", "") |
||
| 458 | BUILTIN(__builtin_altivec_vpopcnth, "V8UsV8Us", "") |
||
| 459 | BUILTIN(__builtin_altivec_vpopcntw, "V4UiV4Ui", "") |
||
| 460 | BUILTIN(__builtin_altivec_vpopcntd, "V2ULLiV2ULLi", "") |
||
| 461 | |||
| 462 | // Absolute difference built-ins |
||
| 463 | BUILTIN(__builtin_altivec_vabsdub, "V16UcV16UcV16Uc", "") |
||
| 464 | BUILTIN(__builtin_altivec_vabsduh, "V8UsV8UsV8Us", "") |
||
| 465 | BUILTIN(__builtin_altivec_vabsduw, "V4UiV4UiV4Ui", "") |
||
| 466 | |||
| 467 | // P9 Shift built-ins. |
||
| 468 | BUILTIN(__builtin_altivec_vslv, "V16UcV16UcV16Uc", "") |
||
| 469 | BUILTIN(__builtin_altivec_vsrv, "V16UcV16UcV16Uc", "") |
||
| 470 | |||
| 471 | // P9 Vector rotate built-ins |
||
| 472 | BUILTIN(__builtin_altivec_vrlwmi, "V4UiV4UiV4UiV4Ui", "") |
||
| 473 | BUILTIN(__builtin_altivec_vrldmi, "V2ULLiV2ULLiV2ULLiV2ULLi", "") |
||
| 474 | BUILTIN(__builtin_altivec_vrlwnm, "V4UiV4UiV4Ui", "") |
||
| 475 | BUILTIN(__builtin_altivec_vrldnm, "V2ULLiV2ULLiV2ULLi", "") |
||
| 476 | |||
| 477 | // P9 Vector extend sign builtins. |
||
| 478 | BUILTIN(__builtin_altivec_vextsb2w, "V4SiV16Sc", "") |
||
| 479 | BUILTIN(__builtin_altivec_vextsb2d, "V2SLLiV16Sc", "") |
||
| 480 | BUILTIN(__builtin_altivec_vextsh2w, "V4SiV8Ss", "") |
||
| 481 | BUILTIN(__builtin_altivec_vextsh2d, "V2SLLiV8Ss", "") |
||
| 482 | BUILTIN(__builtin_altivec_vextsw2d, "V2SLLiV4Si", "") |
||
| 483 | |||
| 484 | // P10 Vector extend sign builtins. |
||
| 485 | BUILTIN(__builtin_altivec_vextsd2q, "V1SLLLiV2SLLi", "") |
||
| 486 | |||
| 487 | // P10 Vector Extract with Mask built-ins. |
||
| 488 | BUILTIN(__builtin_altivec_vextractbm, "UiV16Uc", "") |
||
| 489 | BUILTIN(__builtin_altivec_vextracthm, "UiV8Us", "") |
||
| 490 | BUILTIN(__builtin_altivec_vextractwm, "UiV4Ui", "") |
||
| 491 | BUILTIN(__builtin_altivec_vextractdm, "UiV2ULLi", "") |
||
| 492 | BUILTIN(__builtin_altivec_vextractqm, "UiV1ULLLi", "") |
||
| 493 | |||
| 494 | // P10 Vector Divide Extended built-ins. |
||
| 495 | BUILTIN(__builtin_altivec_vdivesw, "V4SiV4SiV4Si", "") |
||
| 496 | BUILTIN(__builtin_altivec_vdiveuw, "V4UiV4UiV4Ui", "") |
||
| 497 | BUILTIN(__builtin_altivec_vdivesd, "V2LLiV2LLiV2LLi", "") |
||
| 498 | BUILTIN(__builtin_altivec_vdiveud, "V2ULLiV2ULLiV2ULLi", "") |
||
| 499 | BUILTIN(__builtin_altivec_vdivesq, "V1SLLLiV1SLLLiV1SLLLi", "") |
||
| 500 | BUILTIN(__builtin_altivec_vdiveuq, "V1ULLLiV1ULLLiV1ULLLi", "") |
||
| 501 | |||
| 502 | // P10 Vector Multiply High built-ins. |
||
| 503 | BUILTIN(__builtin_altivec_vmulhsw, "V4SiV4SiV4Si", "") |
||
| 504 | BUILTIN(__builtin_altivec_vmulhuw, "V4UiV4UiV4Ui", "") |
||
| 505 | BUILTIN(__builtin_altivec_vmulhsd, "V2LLiV2LLiV2LLi", "") |
||
| 506 | BUILTIN(__builtin_altivec_vmulhud, "V2ULLiV2ULLiV2ULLi", "") |
||
| 507 | |||
| 508 | // P10 Vector Expand with Mask built-ins. |
||
| 509 | BUILTIN(__builtin_altivec_vexpandbm, "V16UcV16Uc", "") |
||
| 510 | BUILTIN(__builtin_altivec_vexpandhm, "V8UsV8Us", "") |
||
| 511 | BUILTIN(__builtin_altivec_vexpandwm, "V4UiV4Ui", "") |
||
| 512 | BUILTIN(__builtin_altivec_vexpanddm, "V2ULLiV2ULLi", "") |
||
| 513 | BUILTIN(__builtin_altivec_vexpandqm, "V1ULLLiV1ULLLi", "") |
||
| 514 | |||
| 515 | // P10 Vector Count with Mask built-ins. |
||
| 516 | BUILTIN(__builtin_altivec_vcntmbb, "ULLiV16UcUi", "") |
||
| 517 | BUILTIN(__builtin_altivec_vcntmbh, "ULLiV8UsUi", "") |
||
| 518 | BUILTIN(__builtin_altivec_vcntmbw, "ULLiV4UiUi", "") |
||
| 519 | BUILTIN(__builtin_altivec_vcntmbd, "ULLiV2ULLiUi", "") |
||
| 520 | |||
| 521 | // P10 Move to VSR with Mask built-ins. |
||
| 522 | BUILTIN(__builtin_altivec_mtvsrbm, "V16UcULLi", "") |
||
| 523 | BUILTIN(__builtin_altivec_mtvsrhm, "V8UsULLi", "") |
||
| 524 | BUILTIN(__builtin_altivec_mtvsrwm, "V4UiULLi", "") |
||
| 525 | BUILTIN(__builtin_altivec_mtvsrdm, "V2ULLiULLi", "") |
||
| 526 | BUILTIN(__builtin_altivec_mtvsrqm, "V1ULLLiULLi", "") |
||
| 527 | |||
| 528 | // P10 Vector Parallel Bits built-ins. |
||
| 529 | BUILTIN(__builtin_altivec_vpdepd, "V2ULLiV2ULLiV2ULLi", "") |
||
| 530 | BUILTIN(__builtin_altivec_vpextd, "V2ULLiV2ULLiV2ULLi", "") |
||
| 531 | |||
| 532 | // P10 Vector String Isolate Built-ins. |
||
| 533 | BUILTIN(__builtin_altivec_vstribr, "V16UcV16Uc", "") |
||
| 534 | BUILTIN(__builtin_altivec_vstribl, "V16UcV16Uc", "") |
||
| 535 | BUILTIN(__builtin_altivec_vstrihr, "V8sV8s", "") |
||
| 536 | BUILTIN(__builtin_altivec_vstrihl, "V8sV8s", "") |
||
| 537 | BUILTIN(__builtin_altivec_vstribr_p, "iiV16Uc", "") |
||
| 538 | BUILTIN(__builtin_altivec_vstribl_p, "iiV16Uc", "") |
||
| 539 | BUILTIN(__builtin_altivec_vstrihr_p, "iiV8s", "") |
||
| 540 | BUILTIN(__builtin_altivec_vstrihl_p, "iiV8s", "") |
||
| 541 | |||
| 542 | // P10 Vector Centrifuge built-in. |
||
| 543 | BUILTIN(__builtin_altivec_vcfuged, "V2ULLiV2ULLiV2ULLi", "") |
||
| 544 | |||
| 545 | // P10 Vector Gather Every N-th Bit built-in. |
||
| 546 | BUILTIN(__builtin_altivec_vgnb, "ULLiV1ULLLiIi", "") |
||
| 547 | |||
| 548 | // P10 Vector Clear Bytes built-ins. |
||
| 549 | BUILTIN(__builtin_altivec_vclrlb, "V16UcV16UcUi", "") |
||
| 550 | BUILTIN(__builtin_altivec_vclrrb, "V16UcV16UcUi", "") |
||
| 551 | |||
| 552 | // P10 Vector Count Leading / Trailing Zeroes under bit Mask built-ins. |
||
| 553 | BUILTIN(__builtin_altivec_vclzdm, "V2ULLiV2ULLiV2ULLi", "") |
||
| 554 | BUILTIN(__builtin_altivec_vctzdm, "V2ULLiV2ULLiV2ULLi", "") |
||
| 555 | |||
| 556 | // P10 Vector Shift built-ins. |
||
| 557 | BUILTIN(__builtin_altivec_vsldbi, "V16UcV16UcV16UcIi", "") |
||
| 558 | BUILTIN(__builtin_altivec_vsrdbi, "V16UcV16UcV16UcIi", "") |
||
| 559 | |||
| 560 | // P10 Vector Insert built-ins. |
||
| 561 | BUILTIN(__builtin_altivec_vinsblx, "V16UcV16UcUiUi", "") |
||
| 562 | BUILTIN(__builtin_altivec_vinsbrx, "V16UcV16UcUiUi", "") |
||
| 563 | BUILTIN(__builtin_altivec_vinshlx, "V8UsV8UsUiUi", "") |
||
| 564 | BUILTIN(__builtin_altivec_vinshrx, "V8UsV8UsUiUi", "") |
||
| 565 | BUILTIN(__builtin_altivec_vinswlx, "V4UiV4UiUiUi", "") |
||
| 566 | BUILTIN(__builtin_altivec_vinswrx, "V4UiV4UiUiUi", "") |
||
| 567 | BUILTIN(__builtin_altivec_vinsdlx, "V2ULLiV2ULLiULLiULLi", "") |
||
| 568 | BUILTIN(__builtin_altivec_vinsdrx, "V2ULLiV2ULLiULLiULLi", "") |
||
| 569 | BUILTIN(__builtin_altivec_vinsbvlx, "V16UcV16UcUiV16Uc", "") |
||
| 570 | BUILTIN(__builtin_altivec_vinsbvrx, "V16UcV16UcUiV16Uc", "") |
||
| 571 | BUILTIN(__builtin_altivec_vinshvlx, "V8UsV8UsUiV8Us", "") |
||
| 572 | BUILTIN(__builtin_altivec_vinshvrx, "V8UsV8UsUiV8Us", "") |
||
| 573 | BUILTIN(__builtin_altivec_vinswvlx, "V4UiV4UiUiV4Ui", "") |
||
| 574 | BUILTIN(__builtin_altivec_vinswvrx, "V4UiV4UiUiV4Ui", "") |
||
| 575 | BUILTIN(__builtin_altivec_vinsw, "V16UcV16UcUiIi", "") |
||
| 576 | BUILTIN(__builtin_altivec_vinsd, "V16UcV16UcULLiIi", "") |
||
| 577 | BUILTIN(__builtin_altivec_vinsw_elt, "V16UcV16UcUiiC", "") |
||
| 578 | BUILTIN(__builtin_altivec_vinsd_elt, "V16UcV16UcULLiiC", "") |
||
| 579 | |||
| 580 | // P10 Vector Extract built-ins. |
||
| 581 | BUILTIN(__builtin_altivec_vextdubvlx, "V2ULLiV16UcV16UcUi", "") |
||
| 582 | BUILTIN(__builtin_altivec_vextdubvrx, "V2ULLiV16UcV16UcUi", "") |
||
| 583 | BUILTIN(__builtin_altivec_vextduhvlx, "V2ULLiV8UsV8UsUi", "") |
||
| 584 | BUILTIN(__builtin_altivec_vextduhvrx, "V2ULLiV8UsV8UsUi", "") |
||
| 585 | BUILTIN(__builtin_altivec_vextduwvlx, "V2ULLiV4UiV4UiUi", "") |
||
| 586 | BUILTIN(__builtin_altivec_vextduwvrx, "V2ULLiV4UiV4UiUi", "") |
||
| 587 | BUILTIN(__builtin_altivec_vextddvlx, "V2ULLiV2ULLiV2ULLiUi", "") |
||
| 588 | BUILTIN(__builtin_altivec_vextddvrx, "V2ULLiV2ULLiV2ULLiUi", "") |
||
| 589 | |||
| 590 | // P10 Vector rotate built-ins. |
||
| 591 | BUILTIN(__builtin_altivec_vrlqmi, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi", "") |
||
| 592 | BUILTIN(__builtin_altivec_vrlqnm, "V1ULLLiV1ULLLiV1ULLLi", "") |
||
| 593 | |||
| 594 | // VSX built-ins. |
||
| 595 | |||
| 596 | BUILTIN(__builtin_vsx_lxvd2x, "V2dLivC*", "") |
||
| 597 | BUILTIN(__builtin_vsx_lxvw4x, "V4iLivC*", "") |
||
| 598 | BUILTIN(__builtin_vsx_lxvd2x_be, "V2dSLLivC*", "") |
||
| 599 | BUILTIN(__builtin_vsx_lxvw4x_be, "V4iSLLivC*", "") |
||
| 600 | |||
| 601 | BUILTIN(__builtin_vsx_stxvd2x, "vV2dLiv*", "") |
||
| 602 | BUILTIN(__builtin_vsx_stxvw4x, "vV4iLiv*", "") |
||
| 603 | BUILTIN(__builtin_vsx_stxvd2x_be, "vV2dSLLivC*", "") |
||
| 604 | BUILTIN(__builtin_vsx_stxvw4x_be, "vV4iSLLivC*", "") |
||
| 605 | |||
| 606 | BUILTIN(__builtin_vsx_lxvl, "V4ivC*ULLi", "") |
||
| 607 | BUILTIN(__builtin_vsx_lxvll, "V4ivC*ULLi", "") |
||
| 608 | BUILTIN(__builtin_vsx_stxvl, "vV4iv*ULLi", "") |
||
| 609 | BUILTIN(__builtin_vsx_stxvll, "vV4iv*ULLi", "") |
||
| 610 | BUILTIN(__builtin_vsx_ldrmb, "V16UcCc*Ii", "") |
||
| 611 | BUILTIN(__builtin_vsx_strmb, "vCc*IiV16Uc", "") |
||
| 612 | |||
| 613 | BUILTIN(__builtin_vsx_xvmaxdp, "V2dV2dV2d", "") |
||
| 614 | BUILTIN(__builtin_vsx_xvmaxsp, "V4fV4fV4f", "") |
||
| 615 | BUILTIN(__builtin_vsx_xsmaxdp, "ddd", "") |
||
| 616 | |||
| 617 | BUILTIN(__builtin_vsx_xvmindp, "V2dV2dV2d", "") |
||
| 618 | BUILTIN(__builtin_vsx_xvminsp, "V4fV4fV4f", "") |
||
| 619 | BUILTIN(__builtin_vsx_xsmindp, "ddd", "") |
||
| 620 | |||
| 621 | BUILTIN(__builtin_vsx_xvdivdp, "V2dV2dV2d", "") |
||
| 622 | BUILTIN(__builtin_vsx_xvdivsp, "V4fV4fV4f", "") |
||
| 623 | |||
| 624 | BUILTIN(__builtin_vsx_xvrdpip, "V2dV2d", "") |
||
| 625 | BUILTIN(__builtin_vsx_xvrspip, "V4fV4f", "") |
||
| 626 | |||
| 627 | BUILTIN(__builtin_vsx_xvcmpeqdp, "V2ULLiV2dV2d", "") |
||
| 628 | BUILTIN(__builtin_vsx_xvcmpeqsp, "V4UiV4fV4f", "") |
||
| 629 | |||
| 630 | BUILTIN(__builtin_vsx_xvcmpeqdp_p, "iiV2dV2d", "") |
||
| 631 | BUILTIN(__builtin_vsx_xvcmpeqsp_p, "iiV4fV4f", "") |
||
| 632 | |||
| 633 | BUILTIN(__builtin_vsx_xvcmpgedp, "V2ULLiV2dV2d", "") |
||
| 634 | BUILTIN(__builtin_vsx_xvcmpgesp, "V4UiV4fV4f", "") |
||
| 635 | |||
| 636 | BUILTIN(__builtin_vsx_xvcmpgedp_p, "iiV2dV2d", "") |
||
| 637 | BUILTIN(__builtin_vsx_xvcmpgesp_p, "iiV4fV4f", "") |
||
| 638 | |||
| 639 | BUILTIN(__builtin_vsx_xvcmpgtdp, "V2ULLiV2dV2d", "") |
||
| 640 | BUILTIN(__builtin_vsx_xvcmpgtsp, "V4UiV4fV4f", "") |
||
| 641 | |||
| 642 | BUILTIN(__builtin_vsx_xvcmpgtdp_p, "iiV2dV2d", "") |
||
| 643 | BUILTIN(__builtin_vsx_xvcmpgtsp_p, "iiV4fV4f", "") |
||
| 644 | |||
| 645 | BUILTIN(__builtin_vsx_xvrdpim, "V2dV2d", "") |
||
| 646 | BUILTIN(__builtin_vsx_xvrspim, "V4fV4f", "") |
||
| 647 | |||
| 648 | BUILTIN(__builtin_vsx_xvrdpi, "V2dV2d", "") |
||
| 649 | BUILTIN(__builtin_vsx_xvrspi, "V4fV4f", "") |
||
| 650 | |||
| 651 | BUILTIN(__builtin_vsx_xvrdpic, "V2dV2d", "") |
||
| 652 | BUILTIN(__builtin_vsx_xvrspic, "V4fV4f", "") |
||
| 653 | |||
| 654 | BUILTIN(__builtin_vsx_xvrdpiz, "V2dV2d", "") |
||
| 655 | BUILTIN(__builtin_vsx_xvrspiz, "V4fV4f", "") |
||
| 656 | |||
| 657 | BUILTIN(__builtin_vsx_xvmaddadp, "V2dV2dV2dV2d", "") |
||
| 658 | BUILTIN(__builtin_vsx_xvmaddasp, "V4fV4fV4fV4f", "") |
||
| 659 | |||
| 660 | BUILTIN(__builtin_vsx_xvmsubadp, "V2dV2dV2dV2d", "") |
||
| 661 | BUILTIN(__builtin_vsx_xvmsubasp, "V4fV4fV4fV4f", "") |
||
| 662 | |||
| 663 | BUILTIN(__builtin_vsx_xvmuldp, "V2dV2dV2d", "") |
||
| 664 | BUILTIN(__builtin_vsx_xvmulsp, "V4fV4fV4f", "") |
||
| 665 | |||
| 666 | BUILTIN(__builtin_vsx_xvnmaddadp, "V2dV2dV2dV2d", "") |
||
| 667 | BUILTIN(__builtin_vsx_xvnmaddasp, "V4fV4fV4fV4f", "") |
||
| 668 | |||
| 669 | BUILTIN(__builtin_vsx_xvnmsubadp, "V2dV2dV2dV2d", "") |
||
| 670 | BUILTIN(__builtin_vsx_xvnmsubasp, "V4fV4fV4fV4f", "") |
||
| 671 | |||
| 672 | BUILTIN(__builtin_vsx_xvredp, "V2dV2d", "") |
||
| 673 | BUILTIN(__builtin_vsx_xvresp, "V4fV4f", "") |
||
| 674 | |||
| 675 | BUILTIN(__builtin_vsx_xvrsqrtedp, "V2dV2d", "") |
||
| 676 | BUILTIN(__builtin_vsx_xvrsqrtesp, "V4fV4f", "") |
||
| 677 | |||
| 678 | BUILTIN(__builtin_vsx_xvsqrtdp, "V2dV2d", "") |
||
| 679 | BUILTIN(__builtin_vsx_xvsqrtsp, "V4fV4f", "") |
||
| 680 | |||
| 681 | BUILTIN(__builtin_vsx_xxleqv, "V4UiV4UiV4Ui", "") |
||
| 682 | |||
| 683 | BUILTIN(__builtin_vsx_xvcpsgndp, "V2dV2dV2d", "") |
||
| 684 | BUILTIN(__builtin_vsx_xvcpsgnsp, "V4fV4fV4f", "") |
||
| 685 | |||
| 686 | BUILTIN(__builtin_vsx_xvabssp, "V4fV4f", "") |
||
| 687 | BUILTIN(__builtin_vsx_xvabsdp, "V2dV2d", "") |
||
| 688 | |||
| 689 | BUILTIN(__builtin_vsx_xxgenpcvbm, "V16UcV16Uci", "") |
||
| 690 | BUILTIN(__builtin_vsx_xxgenpcvhm, "V8UsV8Usi", "") |
||
| 691 | BUILTIN(__builtin_vsx_xxgenpcvwm, "V4UiV4Uii", "") |
||
| 692 | BUILTIN(__builtin_vsx_xxgenpcvdm, "V2ULLiV2ULLii", "") |
||
| 693 | |||
| 694 | // vector Insert/Extract exponent/significand builtins |
||
| 695 | BUILTIN(__builtin_vsx_xviexpdp, "V2dV2ULLiV2ULLi", "") |
||
| 696 | BUILTIN(__builtin_vsx_xviexpsp, "V4fV4UiV4Ui", "") |
||
| 697 | BUILTIN(__builtin_vsx_xvxexpdp, "V2ULLiV2d", "") |
||
| 698 | BUILTIN(__builtin_vsx_xvxexpsp, "V4UiV4f", "") |
||
| 699 | BUILTIN(__builtin_vsx_xvxsigdp, "V2ULLiV2d", "") |
||
| 700 | BUILTIN(__builtin_vsx_xvxsigsp, "V4UiV4f", "") |
||
| 701 | |||
| 702 | // Conversion builtins |
||
| 703 | BUILTIN(__builtin_vsx_xvcvdpsxws, "V4SiV2d", "") |
||
| 704 | BUILTIN(__builtin_vsx_xvcvdpuxws, "V4UiV2d", "") |
||
| 705 | BUILTIN(__builtin_vsx_xvcvspsxds, "V2SLLiV4f", "") |
||
| 706 | BUILTIN(__builtin_vsx_xvcvspuxds, "V2ULLiV4f", "") |
||
| 707 | BUILTIN(__builtin_vsx_xvcvsxwdp, "V2dV4Si", "") |
||
| 708 | BUILTIN(__builtin_vsx_xvcvuxwdp, "V2dV4Ui", "") |
||
| 709 | BUILTIN(__builtin_vsx_xvcvspdp, "V2dV4f", "") |
||
| 710 | BUILTIN(__builtin_vsx_xvcvsxdsp, "V4fV2SLLi", "") |
||
| 711 | BUILTIN(__builtin_vsx_xvcvuxdsp, "V4fV2ULLi", "") |
||
| 712 | BUILTIN(__builtin_vsx_xvcvdpsp, "V4fV2d", "") |
||
| 713 | |||
| 714 | BUILTIN(__builtin_vsx_xvcvsphp, "V4fV4f", "") |
||
| 715 | BUILTIN(__builtin_vsx_xvcvhpsp, "V4fV8Us", "") |
||
| 716 | |||
| 717 | BUILTIN(__builtin_vsx_xvcvspbf16, "V16UcV16Uc", "") |
||
| 718 | BUILTIN(__builtin_vsx_xvcvbf16spn, "V16UcV16Uc", "") |
||
| 719 | |||
| 720 | // Vector Test Data Class builtins |
||
| 721 | BUILTIN(__builtin_vsx_xvtstdcdp, "V2ULLiV2dIi", "") |
||
| 722 | BUILTIN(__builtin_vsx_xvtstdcsp, "V4UiV4fIi", "") |
||
| 723 | |||
| 724 | BUILTIN(__builtin_vsx_insertword, "V16UcV4UiV16UcIi", "") |
||
| 725 | BUILTIN(__builtin_vsx_extractuword, "V2ULLiV16UcIi", "") |
||
| 726 | |||
| 727 | BUILTIN(__builtin_vsx_xxpermdi, "v.", "t") |
||
| 728 | BUILTIN(__builtin_vsx_xxsldwi, "v.", "t") |
||
| 729 | |||
| 730 | BUILTIN(__builtin_vsx_xxeval, "V2ULLiV2ULLiV2ULLiV2ULLiIi", "") |
||
| 731 | |||
| 732 | BUILTIN(__builtin_vsx_xvtlsbb, "iV16UcUi", "") |
||
| 733 | |||
| 734 | BUILTIN(__builtin_vsx_xvtdivdp, "iV2dV2d", "") |
||
| 735 | BUILTIN(__builtin_vsx_xvtdivsp, "iV4fV4f", "") |
||
| 736 | BUILTIN(__builtin_vsx_xvtsqrtdp, "iV2d", "") |
||
| 737 | BUILTIN(__builtin_vsx_xvtsqrtsp, "iV4f", "") |
||
| 738 | |||
| 739 | // P10 Vector Permute Extended built-in. |
||
| 740 | BUILTIN(__builtin_vsx_xxpermx, "V16UcV16UcV16UcV16UcIi", "") |
||
| 741 | |||
| 742 | // P10 Vector Blend built-ins. |
||
| 743 | BUILTIN(__builtin_vsx_xxblendvb, "V16UcV16UcV16UcV16Uc", "") |
||
| 744 | BUILTIN(__builtin_vsx_xxblendvh, "V8UsV8UsV8UsV8Us", "") |
||
| 745 | BUILTIN(__builtin_vsx_xxblendvw, "V4UiV4UiV4UiV4Ui", "") |
||
| 746 | BUILTIN(__builtin_vsx_xxblendvd, "V2ULLiV2ULLiV2ULLiV2ULLi", "") |
||
| 747 | |||
| 748 | // Float 128 built-ins |
||
| 749 | BUILTIN(__builtin_sqrtf128_round_to_odd, "LLdLLd", "") |
||
| 750 | BUILTIN(__builtin_addf128_round_to_odd, "LLdLLdLLd", "") |
||
| 751 | BUILTIN(__builtin_subf128_round_to_odd, "LLdLLdLLd", "") |
||
| 752 | BUILTIN(__builtin_mulf128_round_to_odd, "LLdLLdLLd", "") |
||
| 753 | BUILTIN(__builtin_divf128_round_to_odd, "LLdLLdLLd", "") |
||
| 754 | BUILTIN(__builtin_fmaf128_round_to_odd, "LLdLLdLLdLLd", "") |
||
| 755 | BUILTIN(__builtin_truncf128_round_to_odd, "dLLd", "") |
||
| 756 | BUILTIN(__builtin_vsx_scalar_extract_expq, "ULLiLLd", "") |
||
| 757 | BUILTIN(__builtin_vsx_scalar_insert_exp_qp, "LLdLLdULLi", "") |
||
| 758 | |||
| 759 | // Fastmath by default builtins |
||
| 760 | BUILTIN(__builtin_ppc_rsqrtf, "V4fV4f", "") |
||
| 761 | BUILTIN(__builtin_ppc_rsqrtd, "V2dV2d", "") |
||
| 762 | BUILTIN(__builtin_ppc_recipdivf, "V4fV4fV4f", "") |
||
| 763 | BUILTIN(__builtin_ppc_recipdivd, "V2dV2dV2d", "") |
||
| 764 | |||
| 765 | // HTM builtins |
||
| 766 | BUILTIN(__builtin_tbegin, "UiUIi", "") |
||
| 767 | BUILTIN(__builtin_tend, "UiUIi", "") |
||
| 768 | |||
| 769 | BUILTIN(__builtin_tabort, "UiUi", "") |
||
| 770 | BUILTIN(__builtin_tabortdc, "UiUiUiUi", "") |
||
| 771 | BUILTIN(__builtin_tabortdci, "UiUiUii", "") |
||
| 772 | BUILTIN(__builtin_tabortwc, "UiUiUiUi", "") |
||
| 773 | BUILTIN(__builtin_tabortwci, "UiUiUii", "") |
||
| 774 | |||
| 775 | BUILTIN(__builtin_tcheck, "Ui", "") |
||
| 776 | BUILTIN(__builtin_treclaim, "UiUi", "") |
||
| 777 | BUILTIN(__builtin_trechkpt, "Ui", "") |
||
| 778 | BUILTIN(__builtin_tsr, "UiUi", "") |
||
| 779 | |||
| 780 | BUILTIN(__builtin_tendall, "Ui", "") |
||
| 781 | BUILTIN(__builtin_tresume, "Ui", "") |
||
| 782 | BUILTIN(__builtin_tsuspend, "Ui", "") |
||
| 783 | |||
| 784 | BUILTIN(__builtin_get_texasr, "LUi", "c") |
||
| 785 | BUILTIN(__builtin_get_texasru, "LUi", "c") |
||
| 786 | BUILTIN(__builtin_get_tfhar, "LUi", "c") |
||
| 787 | BUILTIN(__builtin_get_tfiar, "LUi", "c") |
||
| 788 | |||
| 789 | BUILTIN(__builtin_set_texasr, "vLUi", "c") |
||
| 790 | BUILTIN(__builtin_set_texasru, "vLUi", "c") |
||
| 791 | BUILTIN(__builtin_set_tfhar, "vLUi", "c") |
||
| 792 | BUILTIN(__builtin_set_tfiar, "vLUi", "c") |
||
| 793 | |||
| 794 | BUILTIN(__builtin_ttest, "LUi", "") |
||
| 795 | |||
| 796 | // Scalar built-ins |
||
| 797 | BUILTIN(__builtin_divwe, "SiSiSi", "") |
||
| 798 | BUILTIN(__builtin_divweu, "UiUiUi", "") |
||
| 799 | BUILTIN(__builtin_divde, "SLLiSLLiSLLi", "") |
||
| 800 | BUILTIN(__builtin_divdeu, "ULLiULLiULLi", "") |
||
| 801 | BUILTIN(__builtin_bpermd, "SLLiSLLiSLLi", "") |
||
| 802 | BUILTIN(__builtin_pdepd, "ULLiULLiULLi", "") |
||
| 803 | BUILTIN(__builtin_pextd, "ULLiULLiULLi", "") |
||
| 804 | BUILTIN(__builtin_cfuged, "ULLiULLiULLi", "") |
||
| 805 | BUILTIN(__builtin_cntlzdm, "ULLiULLiULLi", "") |
||
| 806 | BUILTIN(__builtin_cnttzdm, "ULLiULLiULLi", "") |
||
| 807 | |||
| 808 | // Double-double (un)pack |
||
| 809 | BUILTIN(__builtin_unpack_longdouble, "dLdIi", "") |
||
| 810 | BUILTIN(__builtin_pack_longdouble, "Lddd", "") |
||
| 811 | |||
| 812 | // Generate random number |
||
| 813 | BUILTIN(__builtin_darn, "LLi", "") |
||
| 814 | BUILTIN(__builtin_darn_raw, "LLi", "") |
||
| 815 | BUILTIN(__builtin_darn_32, "i", "") |
||
| 816 | |||
| 817 | // Vector int128 (un)pack |
||
| 818 | BUILTIN(__builtin_unpack_vector_int128, "ULLiV1LLLii", "") |
||
| 819 | BUILTIN(__builtin_pack_vector_int128, "V1LLLiULLiULLi", "") |
||
| 820 | |||
| 821 | // Set the floating point rounding mode |
||
| 822 | BUILTIN(__builtin_setrnd, "di", "") |
||
| 823 | |||
| 824 | // Get content from current FPSCR |
||
| 825 | BUILTIN(__builtin_readflm, "d", "") |
||
| 826 | |||
| 827 | // Set content of FPSCR, and return its content before update |
||
| 828 | BUILTIN(__builtin_setflm, "dd", "") |
||
| 829 | |||
| 830 | // Cache built-ins |
||
| 831 | BUILTIN(__builtin_dcbf, "vvC*", "") |
||
| 832 | |||
| 833 | // Built-ins requiring custom code generation. |
||
| 834 | // Because these built-ins rely on target-dependent types and to avoid pervasive |
||
| 835 | // change, they are type checked manually in Sema using custom type descriptors. |
||
| 836 | // The first argument of the CUSTOM_BUILTIN macro is the name of the built-in |
||
| 837 | // with its prefix, the second argument is the name of the intrinsic this |
||
| 838 | // built-in generates, the third argument specifies the type of the function |
||
| 839 | // (result value, then each argument) as follows: |
||
| 840 | // i -> Unsigned integer followed by the greatest possible value for that |
||
| 841 | // argument or 0 if no constraint on the value. |
||
| 842 | // (e.g. i15 for a 4-bits value) |
||
| 843 | // V -> Vector type used with MMA built-ins (vector unsigned char) |
||
| 844 | // W -> PPC Vector type followed by the size of the vector type. |
||
| 845 | // (e.g. W512 for __vector_quad) |
||
| 846 | // any other descriptor -> Fall back to generic type descriptor decoding. |
||
| 847 | // The 'C' suffix can be used as a suffix to specify the const type. |
||
| 848 | // The '*' suffix can be used as a suffix to specify a pointer to a type. |
||
| 849 | // The fourth argument is set to true if the built-in accumulates its result into |
||
| 850 | // its given accumulator. |
||
| 851 | |||
| 852 | // Provided builtins with _mma_ prefix for compatibility. |
||
| 853 | CUSTOM_BUILTIN(mma_lxvp, vsx_lxvp, "W256SLiW256C*", false) |
||
| 854 | CUSTOM_BUILTIN(mma_stxvp, vsx_stxvp, "vW256SLiW256*", false) |
||
| 855 | CUSTOM_BUILTIN(mma_assemble_pair, vsx_assemble_pair, "vW256*VV", false) |
||
| 856 | CUSTOM_BUILTIN(mma_disassemble_pair, vsx_disassemble_pair, "vv*W256*", false) |
||
| 857 | CUSTOM_BUILTIN(vsx_build_pair, vsx_assemble_pair, "vW256*VV", false) |
||
| 858 | CUSTOM_BUILTIN(mma_build_acc, mma_assemble_acc, "vW512*VVVV", false) |
||
| 859 | |||
| 860 | // UNALIASED_CUSTOM_BUILTIN macro is used for built-ins that have |
||
| 861 | // the same name as that of the intrinsic they generate, i.e. the |
||
| 862 | // ID and INTR are the same. |
||
| 863 | // This avoids repeating the ID and INTR in the macro expression. |
||
| 864 | |||
| 865 | UNALIASED_CUSTOM_BUILTIN(vsx_lxvp, "W256SLiW256C*", false) |
||
| 866 | UNALIASED_CUSTOM_BUILTIN(vsx_stxvp, "vW256SLiW256*", false) |
||
| 867 | UNALIASED_CUSTOM_BUILTIN(vsx_assemble_pair, "vW256*VV", false) |
||
| 868 | UNALIASED_CUSTOM_BUILTIN(vsx_disassemble_pair, "vv*W256*", false) |
||
| 869 | |||
| 870 | UNALIASED_CUSTOM_BUILTIN(mma_assemble_acc, "vW512*VVVV", false) |
||
| 871 | UNALIASED_CUSTOM_BUILTIN(mma_disassemble_acc, "vv*W512*", false) |
||
| 872 | UNALIASED_CUSTOM_BUILTIN(mma_xxmtacc, "vW512*", true) |
||
| 873 | UNALIASED_CUSTOM_BUILTIN(mma_xxmfacc, "vW512*", true) |
||
| 874 | UNALIASED_CUSTOM_BUILTIN(mma_xxsetaccz, "vW512*", false) |
||
| 875 | UNALIASED_CUSTOM_BUILTIN(mma_xvi4ger8, "vW512*VV", false) |
||
| 876 | UNALIASED_CUSTOM_BUILTIN(mma_xvi8ger4, "vW512*VV", false) |
||
| 877 | UNALIASED_CUSTOM_BUILTIN(mma_xvi16ger2, "vW512*VV", false) |
||
| 878 | UNALIASED_CUSTOM_BUILTIN(mma_xvi16ger2s, "vW512*VV", false) |
||
| 879 | UNALIASED_CUSTOM_BUILTIN(mma_xvf16ger2, "vW512*VV", false) |
||
| 880 | UNALIASED_CUSTOM_BUILTIN(mma_xvf32ger, "vW512*VV", false) |
||
| 881 | UNALIASED_CUSTOM_BUILTIN(mma_xvf64ger, "vW512*W256V", false) |
||
| 882 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvi4ger8, "vW512*VVi15i15i255", false) |
||
| 883 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvi8ger4, "vW512*VVi15i15i15", false) |
||
| 884 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvi16ger2, "vW512*VVi15i15i3", false) |
||
| 885 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvi16ger2s, "vW512*VVi15i15i3", false) |
||
| 886 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvf16ger2, "vW512*VVi15i15i3", false) |
||
| 887 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvf32ger, "vW512*VVi15i15", false) |
||
| 888 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvf64ger, "vW512*W256Vi15i3", false) |
||
| 889 | UNALIASED_CUSTOM_BUILTIN(mma_xvi4ger8pp, "vW512*VV", true) |
||
| 890 | UNALIASED_CUSTOM_BUILTIN(mma_xvi8ger4pp, "vW512*VV", true) |
||
| 891 | UNALIASED_CUSTOM_BUILTIN(mma_xvi8ger4spp, "vW512*VV", true) |
||
| 892 | UNALIASED_CUSTOM_BUILTIN(mma_xvi16ger2pp, "vW512*VV", true) |
||
| 893 | UNALIASED_CUSTOM_BUILTIN(mma_xvi16ger2spp, "vW512*VV", true) |
||
| 894 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvi4ger8pp, "vW512*VVi15i15i255", true) |
||
| 895 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvi8ger4pp, "vW512*VVi15i15i15", true) |
||
| 896 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvi8ger4spp, "vW512*VVi15i15i15", true) |
||
| 897 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvi16ger2pp, "vW512*VVi15i15i3", true) |
||
| 898 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvi16ger2spp, "vW512*VVi15i15i3", true) |
||
| 899 | UNALIASED_CUSTOM_BUILTIN(mma_xvf16ger2pp, "vW512*VV", true) |
||
| 900 | UNALIASED_CUSTOM_BUILTIN(mma_xvf16ger2pn, "vW512*VV", true) |
||
| 901 | UNALIASED_CUSTOM_BUILTIN(mma_xvf16ger2np, "vW512*VV", true) |
||
| 902 | UNALIASED_CUSTOM_BUILTIN(mma_xvf16ger2nn, "vW512*VV", true) |
||
| 903 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvf16ger2pp, "vW512*VVi15i15i3", true) |
||
| 904 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvf16ger2pn, "vW512*VVi15i15i3", true) |
||
| 905 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvf16ger2np, "vW512*VVi15i15i3", true) |
||
| 906 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvf16ger2nn, "vW512*VVi15i15i3", true) |
||
| 907 | UNALIASED_CUSTOM_BUILTIN(mma_xvf32gerpp, "vW512*VV", true) |
||
| 908 | UNALIASED_CUSTOM_BUILTIN(mma_xvf32gerpn, "vW512*VV", true) |
||
| 909 | UNALIASED_CUSTOM_BUILTIN(mma_xvf32gernp, "vW512*VV", true) |
||
| 910 | UNALIASED_CUSTOM_BUILTIN(mma_xvf32gernn, "vW512*VV", true) |
||
| 911 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvf32gerpp, "vW512*VVi15i15", true) |
||
| 912 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvf32gerpn, "vW512*VVi15i15", true) |
||
| 913 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvf32gernp, "vW512*VVi15i15", true) |
||
| 914 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvf32gernn, "vW512*VVi15i15", true) |
||
| 915 | UNALIASED_CUSTOM_BUILTIN(mma_xvf64gerpp, "vW512*W256V", true) |
||
| 916 | UNALIASED_CUSTOM_BUILTIN(mma_xvf64gerpn, "vW512*W256V", true) |
||
| 917 | UNALIASED_CUSTOM_BUILTIN(mma_xvf64gernp, "vW512*W256V", true) |
||
| 918 | UNALIASED_CUSTOM_BUILTIN(mma_xvf64gernn, "vW512*W256V", true) |
||
| 919 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvf64gerpp, "vW512*W256Vi15i3", true) |
||
| 920 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvf64gerpn, "vW512*W256Vi15i3", true) |
||
| 921 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvf64gernp, "vW512*W256Vi15i3", true) |
||
| 922 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvf64gernn, "vW512*W256Vi15i3", true) |
||
| 923 | UNALIASED_CUSTOM_BUILTIN(mma_xvbf16ger2, "vW512*VV", false) |
||
| 924 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvbf16ger2, "vW512*VVi15i15i3", false) |
||
| 925 | UNALIASED_CUSTOM_BUILTIN(mma_xvbf16ger2pp, "vW512*VV", true) |
||
| 926 | UNALIASED_CUSTOM_BUILTIN(mma_xvbf16ger2pn, "vW512*VV", true) |
||
| 927 | UNALIASED_CUSTOM_BUILTIN(mma_xvbf16ger2np, "vW512*VV", true) |
||
| 928 | UNALIASED_CUSTOM_BUILTIN(mma_xvbf16ger2nn, "vW512*VV", true) |
||
| 929 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvbf16ger2pp, "vW512*VVi15i15i3", true) |
||
| 930 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvbf16ger2pn, "vW512*VVi15i15i3", true) |
||
| 931 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvbf16ger2np, "vW512*VVi15i15i3", true) |
||
| 932 | UNALIASED_CUSTOM_BUILTIN(mma_pmxvbf16ger2nn, "vW512*VVi15i15i3", true) |
||
| 933 | |||
| 934 | // FIXME: Obviously incomplete. |
||
| 935 | |||
| 936 | #undef BUILTIN |
||
| 937 | #undef CUSTOM_BUILTIN |
||
| 938 | #undef UNALIASED_CUSTOM_BUILTIN |